Xicheng Jiang - researchr alias

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Viewing Publication 1 - 30 from 30

2016

F2: Data-converter calibration and dynamic-matching techniquesKostas Doris, Alyosha Molnar, Xicheng Jiang, Seung-Tak Ryu. isscc 2016: 495-497 [doi]

An 8-Bit Compressive Sensing ADC With 4-GS/s Equivalent Speed Utilizing Self-Timed Pipeline SAR-Binary-SearchBoyu Hu, Fengbo Ren, Zuow-Zun Chen, Xicheng Jiang, Mau-Chung Frank Chang. tcas, 63-II(10):934-938, 2016. [doi]

EE1: Class of 2025 - Where will be the best jobs?Xicheng Jiang, Axel Thomsen, Piero Malcovati, M.-C. Frank Chang. isscc 2016: 518 [doi]

A 2.7 mW/Channel 48-1000 MHz Direct Sampling Full-Band Cable ReceiverJiangfeng Wu, Giuseppe Cusmai, Acer Wei-Te Chou, Tao Wang, Bo Shen, Vijayaramalingam Periasamy, Ming-Hung Hsieh, Chun-Ying Chen, Lin He, Loke Kun Tan, Aravind Padyana, Vincent Cheng-Hsun Yang, Gregory Unruh, Jackie Koon Lun Wong, Bryan Juo-Jung Hung, Massimo Brandolini, Maco Sha-Ting Lin, Xi Chen, Yen Ding, Yen-Jen Ko, Young J. Shin, Ada Hing T. Hung, Binning Chen, Cynthia Dang, Deepak Lakshminarasimhan, Iris Hong Liu, Jerry Lin, Kowen Lai, Larry Wassermann, Ayaskant Shrivastava, Chi-Ming Hsiao, Chun-Sheng Huang, Jianlong Chen, Lakshminarasimhan Krishnan, Ning-Yi Wang, Pin-en Su, Tianwei Li, Wei-Ta Shih, Yau-Cheng Yang, Peter Cangiane, Randall Perlow, William Ngai, Hanson Hung-Sen Huang, James Y. C. Chang, Xicheng Jiang, Ardie Venes, Ramon Ray Gomez. jssc, 51(4):845-859, 2016. [doi]

2015

Self-Dithering Technique for High-Resolution SAR ADC DesignLin He, Lele Jin, Jiaqi Yang, Fujiang Lin, Libin Yao, Xicheng Jiang. tcas, 62-II(12):1124-1128, 2015. [doi]

A Speed-Enhancing Dual-Trial Instantaneous Switching Architecture for SAR ADCsLin He, Jiaqi Yang, Duona Luo, Lele Jin, Shuangshuang Zhang, Fujiang Lin, Libin Yao, Xicheng Jiang. tcas, 62-II(1):26-30, 2015. [doi]

A Multibit Delta-Sigma Modulator With Double Noise-Shaped SegmentationLin He, Guanglong Zhu, Fang Long, Yuncheng Zhang, Li Wang, Fujiang Lin, Libin Yao, Xicheng Jiang. tcas, 62-II(3):241-245, 2015. [doi]

Session 5 overview: Analog techniques: Analog subcommitteeXicheng Jiang, Ed van Tuijl. isscc 2015: 86-87 [doi]

Analysis of Current Efficiency for CMOS Class-B LC OscillatorsZisong Wang, Shengxi Diao, Lin He, Xicheng Jiang, Fujiang Lin. tcas, 62-I(5):1345-1352, 2015. [doi]

2014

A 40 nm Fully Integrated 82 mW Stereo Headphone Module for Mobile ApplicationsKhaled Abdelfattah, Sherif Galal, Iuri Mehr, Alex Jianzhong Chen, Chengyue Yu, Maurice Tjie, Ahmet Tekin, Xicheng Jiang, Todd Brooks. jssc, 49(8):1702-1714, 2014. [doi]

Sub-session: Data converter techniquesJorge A. Grilo, Xicheng Jiang. cicc 2014: 1 [doi]

Digital Noise-Coupling Technique for Delta-Sigma Modulators With Segmented QuantizationLin He, Yuncheng Zhang, Fang Long, Fengcheng Mei, Mingyuan Yu, Fujiang Lin, Libin Yao, Xicheng Jiang. tcas, 61-II(6):403-407, 2014. [doi]

Integrated Class-D Audio Amplifier With 95% Efficiency and 105 dB SNRXicheng Jiang, Jungwoo Song, Darwin Cheung, Minsheng Wang, Sasi Kumar Arunachalam. jssc, 49(11):2387-2396, 2014. [doi]

Digitally-assisted analog and analog-assisted digital design techniques for a 28 nm mobile System-on-ChipXicheng Jiang, Narayan Prasad Ramachandran, Dae Woon Kang, Chee Kiong Chen, Mark Rutherford, Yonghua Cong, David Chang. esscirc 2014: 475-478 [doi]

F1: Digitally assisted analog and analog-assisted digital in high-performance scaled CMOS processXicheng Jiang, Piero Malcovati, Vladimir Stojanovic, Tetsuya Lizuka. isscc 2014: 510-511 [doi]

Configurable incremental sigma-delta ADC for DC measure and audio conversionZhengyu Wang, Tay Hui Zheng, Dongtian Lu, Sasi Kumar Arunachalam, Xicheng Jiang. cicc 2014: 1-4 [doi]

2013

2012

A Low-Power, High-Fidelity Stereo Audio Codec in 0.13 µm CMOSXicheng Jiang, Jungwoo Song, Jianlong Chen, Vinay Chandrasekhar, Sherif Galal, Felix Y. L. Cheung, Darwin Cheung, Todd Brooks. jssc, 47(5):1221-1231, 2012. [doi]

Circuit techniques to overcome Class-D audio amplifier limitations in mobile devicesXicheng Jiang, Jungwoo Song, Minsheng Wang, Jianlong Chen, Sasi Kumar Arunachalam, Todd L. Brooks. vlsic 2012: 18-19 [doi]

Analog TechniquesDon Thelen, Xicheng Jiang. cicc 2012: 1 [doi]

2010

2009

th-order PWM modulatorMinsheng Wang, Xicheng Jiang, Jungwoo Song, Todd Brooks. cicc 2009: 13-16 [doi]

2005

A 1-GHz signal bandwidth 6-bit CMOS ADC with power-efficient averagingXicheng Jiang, Mau-Chung Frank Chang. jssc, 40(2):532-535, 2005. [doi]

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