Table of Contents

• Future silicon technologyKinam Kim. 1-6 [doi]
• The industrialization of the Silicon Photonics: Technology road map and applicationsMaurizio Zuffada. 7-13 [doi]
• Solid-state and biological systems interfaceNan Sun, Yong Liu, Ling Qin, Guangyu Xu, Donhee Ham. 14-17 [doi]
• Advancing high performance heterogeneous integration through die stackingLiam Madden, Ephrem Wu, Namhoon Kim, Bahareh Banijamali, Khaldoon Abugharbieh, Suresh Ramalingam, Xin Wu. 18-24 [doi]
• Graphene for microelectronics: Can it make a difference?Max C. Lemme. 25-27 [doi]
• Challenges and opportunities for circuit design in nano-scale CMOS technologiesKevin Zhang. 28-29 [doi]
• BSIM - Industry standard compact MOSFET modelsYogesh Singh Chauhan, Sriramkumar Venugopalan, Mohammed A. Karim, Sourabh Khandelwal, Navid Paydavosi, Pankaj Thakur, Ali M. Niknejad, Chenming Hu. 30-33 [doi]
• Evaluation of the BSIM6 compact MOSFET model's scalability in 40nm CMOS technologyMaria-Anna Chalkiadaki, Anurag Mangia, Christian C. Enz, Yogesh Singh Chauhan, Mohammed Ahosan Ul Karim, Sriramkumar Venugopalan, Ali M. Niknejad, Chenming Hu. 34-37 [doi]
• 4-Port isolated MOS modeling and extraction for mmW applicationsBenjamin Dormieu, Patrick Scheer, Clement Charbuillet, Sebastien Jan, Francois Danneville. 38-41 [doi]
• Variability aware cell library optimization for reliable sub-threshold operationTobias Gemmeke, Maryam Ashouei. 42-45 [doi]
• Advancements on reliability-aware analog circuit designBertrand Ardouin, Jean-Yves Dupuy, Jean Godin, Virginie Nodjiadjim, Muriel Riet, François Marc, Gilles Amadou Koné, Sudip Ghosh 0002, Brice Grandchamp, Cristell Maneux. 46-52 [doi]
• Direct-digital modulation (DIDIMO) transmitter with -156dBc/Hz Rx-band noise using FIR structureShuichi Fukuda, Shinji Miya, Miho Io, Koichi Hamashita, Bram Nauta. 53-56 [doi]
• A WCDMA/WLAN digital polar transmitter with AM replica feedback linearization in 65nm CMOSShiyuan Zheng, Howard C. Luong. 57-60 [doi]
• A 375 mW, 2.2 GHz signal bandwidth DAC-based transmitter with an in-band IM3 <-58 dBc in 40 nm CMOSSilvian Spiridon, Johan van der Tang, Han Yan, Hua-feng Chen. 61-64 [doi]
• 2 65 nm CMOS gigabit MIMO iterative detection and decoding receiverFilippo Borlenghi, Ernst Martin Witte, Gerd Ascheid, Heinrich Meyr, Andreas Burg. 65-68 [doi]
• A nano-watt power CMOS amplifier with adaptive biasing for power-aware analog LSIsYumiko Tsuruya, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa, Osamu Kobayashi. 69-72 [doi]
• A capacitively-coupled chopper operational amplifier with 3μV Offset and outside-the-rail capabilityQinwen Fan, Johan H. Huijsing, Kofi A. A. Makinwa. 73-76 [doi]
• A 0.8-V 1.2-μW rail-to-rail fully differential OpAmp with adaptive biasingMaría de Rodanas Valero, Santiago Celma, Nicolás J. Medrano-Marqués, Belén Calvo. 77-80 [doi]
• Measurement and analysis of input current noise in chopper amplifiersJiawei Xu, Qinwen Fan, Johan H. Huijsing, Chris Van Hoof, Refet Firat Yazicioglu, Kofi A. A. Makinwa. 81-84 [doi]
• A reconfigurable 14-bit 60GPhoton/s Single-Photon receiver for visible light communicationsEdward Fisher, Ian Underwood, Robert Henderson. 85-88 [doi]
• 2 multi-digital silicon photomultiplier with column-parallel time-to-digital converterShingo Mandai, Vishwas Jain, Edoardo Charbon. 89-92 [doi]
• A 160×160-pixel image sensor for multispectral visible, infrared and terahertz detectionMatteo Perenzoni, Nicola Massari, David Stoppa, Stéphane Pocas, Baptiste Delplanque, Jérôme Meilhan, François Simoens, Wilfried Rabaud. 93-96 [doi]
• A system containing an ambient light and a proximity sensor with intrinsic ambient light rejectionLuca Sant, Andrea Fant, Patrick Torta, Lukas Dörrer. 97-100 [doi]
• Autonomous and self-starting efficient micro energy harvesting interface with adaptive MPPT, buffer monitoring, and voltage stabilizationJoachim Leicht, Dominic Maurath, Yiannos Manoli. 101-104 [doi]
• Thermoelectric energy harvesting with 1mV low input voltage and 390nA quiescent current for 99.6% maximum power point trackingChao-Jen Huang, Wei-Chung Chen, Chia-Lung Ni, Ke-Horng Chen, Chien-Chun Lu, Yuan-Hua Chu, Ming-Ching Kuo. 105-108 [doi]
• A 868MHz CMOS RF-DC power converter with -17dBm input power sensitivity and efficiency higher than 40% over 14dB input power rangeStefano Scorcioni, Alessandro Bertacchini, Luca Larcher. 109-112 [doi]
• An RF energy harvester with supply management for co-integration into a 2.4 GHz transceiverJens Masuch, Manuel Delgado-Restituto. 113-116 [doi]
• Effects of LO harmonics and overlap shunting on N-phase passive mixer based receiversCaroline Andrews, Changhyuk Lee, Alyosha C. Molnar. 117-120 [doi]
• A frequency-selective nested dual-loop broadband low-noise amplifier in 90 nm CMOSSumit Bagga, André Mansano, Wouter A. Serdijn, John R. Long, Kathleen Philips, John J. Pekarik. 121-124 [doi]
• Hardware-efficient non-decimation RF sampling receiver front-end with reconfigurable FIR filteringJaeyoung Choi, Donggu Im, Bum-Kyum Kim, Kwyro Lee. 125-128 [doi]
• A fully integrated down-converter for Ka-band VSAT satellite receptionGerben W. de Jong, Domine Leenaerts, Edwin van der Heijden. 129-132 [doi]
• A programmable calibration/BIST engine for RF/analog blocks in SoCsJorge Hermosillo, Jorge Carballido, Arturo Veloz-Guerrero, David Arditti, Alberto Del Rio, Edgar Borrayo Sandoval, Manuel E. Guzman-Renteria, Hasnain Lakdawala, Marian Verhelst. 133-136 [doi]
• A 2.4-GHz MEMS-based PLL-free multi-channel receiver with channel filtering at RFAravind Heragu, David Ruffieux, Christian C. Enz. 137-140 [doi]
• A synchronous rail-to-rail latched comparator based on double-gate organic thin-film-transistorsDaniele Raiteri, Fabrizio Torricelli, Pieter van Lieshout, Arthur H. M. van Roermund, Eugenio Cantatore. 141-144 [doi]
• Design of analog and digital building blocks in a fully printed complementary organic technologySahel Abdinia, Mohamed Benwadih, Eugenio Cantatore, Isabelle Chartier, Stéphanie Jacob, Lidia Maddiona, Giorgio Maiellaro, Luigi Mariucci, Giuseppe Palmisano, Matteo Rapisarda, Francesca Tramontana, Arthur H. M. van Roermund. 145-148 [doi]
• A 3us wake-up time nonvolatile processor based on ferroelectric flip-flopsYiqun Wang, Yongpan Liu, Shuangchen Li, Daming Zhang, Bo Zhao, Mei-Fang Chiang, Yanxin Yan, Baiko Sai, Huazhong Yang. 149-152 [doi]
• 28nm CMOS, energy efficient and variability tolerant, 350mV-to-1.0V, 10MHz/700MHz, 252bits frame error-decoderFady Abouzeid, Sylvain Clerc, Bertrand Pelloux-Prayer, Fabrice Argoud, Philippe Roche. 153-156 [doi]
• A single-inductor multiple-output boost converter with freewheel charge-pump controlChia-Min Chen, Te-Wen Liao, Kai-Hsiu Hsu, Chung-Chih Hung. 157-160 [doi]
• A single-inductor dual-output (SIDO) based power management with adaptive bus voltage modulation and zero cross-regulation in 40nm CMOSYu-Huei Lee, Tzu-Chi Huang, Kuan-Yu Chu, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Ching-Yuan Yeh, Chen-Chih Huang, Chao-Cheng Lee. 161-164 [doi]
• A fast-transient-response hybrid buck converter with automatic and nearly-seamless loop transition for portable applicationsYonggen Liu, Chenchang Zhan, Wing-Hung Ki. 165-168 [doi]
• Dual-output capacitive DC-DC converter with power distribution regulator in 90 nm CMOSNico De Clercq, Tom Van Breussegem, Wim Dehaene, Michiel Steyaert. 169-172 [doi]
• 2 9.6 mW implementation of a multicarrier Faster-than-Nyquist signaling iterative decoder in 65nm CMOSDeepak Dasalukunte, Fredrik Rusek, Viktor Öwall. 173-176 [doi]
• A 260mV 468GOPS/W 256b 4-way to 32-way vector shifter with permute-assisted skip in 22nm tri-gate CMOSAmit Agarwal, Steven Hsu, Sanu Mathew, Mark Anders, Himanshu Kaul, Farhana Sheikh, Ram Krishnamurthy. 177-180 [doi]
• A low-power and small-area all-digital delay-locked loop with closed-loop duty-cycle correctionDong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung. 181-184 [doi]
• Digital associative memory for word-parrallel Manhattan-distance-based vector quantizationSeiryu Sasaki, Masahiro Yasuda, Hans Jürgen Mattausch. 185-188 [doi]
• nd-order noise-shaping TDC and a transformer-coupled QVCOAlan W. L. Ng, Shiyuan Zheng, Howard C. Luong. 189-192 [doi]
• 2 6-bit PVT and mismatch insensitive TDCHyung Seok Kim, Carlos Ornelas, Kailash Chandrashekar, Pin-en Su, Paolo Madoglio, Yee William Li, Ashoke Ravi. 193-196 [doi]
• A low power low phase noise fractional-N synthesizer with linearization and mismatch noise shaping techniques for sub-GHz multi-band transceiver with narrow channel spacingTheodore R. Blank, Per Torstein Røine, Jan-Tore Marienborg, Sudipto Chakraborty, Jörg Ackermann, Edward P. Coleman, Joel A. Zolnier, C. Bulla, P. Kristoffersen, Walter A. Budziak, Patrick Seem, Kevin Faison, Torjus Kallerud, Arne Nettum, Chiang-Hua Yeh. 197-200 [doi]
• A 58.1-to-65.0GHz frequency synthesizer with background calibration for millimeter-wave TDD transceiversWei Deng, Teerachot Siriburanon, Ahmed Musa, Kenichi Okada, Akira Matsuzawa. 201-204 [doi]
• An instrumentation 128dB-SNR 750μA SDMJesus Guinea, Enrico Sentieri, Andrea Baschirotto. 205-208 [doi]
• A 15bit 140μW scalable-bandwidth inverter-based audio ΔΣ modulator with >78dB PSRRThomas Christen. 209-212 [doi]
• A very compact 1MS/s Nyquist-rate A/D-converter with 12 effective bitsPieter Rombouts, Pierre Woestyn, Maarten De Bock, Johan Raman. 213-216 [doi]
• A 9.6 GS/s 112 mW 58 dB DR 150 MHz bandwidth RF bandpass transmission line ΣΔ modulatorAli Zahabi, Muhammad Anis, Maurits Ortmanns. 217-220 [doi]
• A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto. 221-224 [doi]
• A low jitter 2.7mW/Gbps 180Gb/s 12-lane transmitter in a 40nm CMOS technologyKamran Farzan, Mehrdad Ramezani, Angus McLaren, Roman Pahuta, Nadeesha Amarasinghe, David Cassan, Saman Sadr. 225-228 [doi]
• A differential self-biased slew rate controlled driver for accurate cross-over and rise-fall time matchingSumantra Seth, Jayesh Wadekar. 229-232 [doi]
• A 22Gb/s, 10mm on-chip serial link over lossy transmission line with resistive terminationHyo-Gyuem Rhew, Michael P. Flynn, Junyoung Park. 233-236 [doi]
• A low-noise differential front-end and its controller for capacitive touch screen panelsDong-Hyuk Lim, Jun-Eun Park, Deog Kyoon Jeong. 237-240 [doi]
• A 3-axis PZT-based MEMS gyroscope in 0.18μm CMOSImran Ahmed, David Halupka, Bertram Leesti, James A. Cherry, Robert McKenzie, Alireza Nilchi, Hamed Mazhab-Jafari, W. Martin Snelgrove, Raymond Chik. 241-244 [doi]
• A low power 16-channel fully integrated GMR-based current sensorFrédéric Rothan, Cyril Condemine, Bertrand Delaet, Olivier Redon, Alain Giraud. 245-248 [doi]
• A -131-dBc/Hz, 20-MHz MEMS oscillator with a 6.9-mW, 69-kΩ, gain-tunable CMOS TIASiddharth Seth, Shasha Wang, Thomas W. Kenny, Boris Murmann. 249-252 [doi]
• A ring-VCO-based sub-sampling PLL CMOS circuit with -119 dBc/Hz phase noise and 0.73 ps jitterKenta Sogo, Akihiro Toya, Takamaro Kikkawa. 253-256 [doi]
• A programmable, multi-GHz, wide-range duty cycle correction circuit in 45nm CMOS processRavi Mehta, Sumantra Seth, Siddharth Shashidharan, Biman Chattopadhyay, Sujoy Chakravarty. 257-260 [doi]
• A 127 μW exact timing reference for Wireless Sensor Networks based on injection lockingValentijn De Smedt, Georges G. E. Gielen, Wim Dehaene. 262-264 [doi]
• A 12-bit 110MS/s 4-stage single-opamp pipelined SAR ADC with ratio-based GEC techniqueRui Wang, U-Fat Chio, Sai-Weng Sin, Seng-Pan U., Zhihua Wang, Rui Paulo Martins. 265-268 [doi]
• A 2.9-mW 11-b 20-MS/s pipelined ADC with dual-mode-based digital background calibrationNan Sun, Hae-Seung Lee, Donhee Ham. 269-272 [doi]
• A multi-channel wide range time-to-digital converter with better than 9ps RMS precision for pulsed time-of-flight laser rangefindingJussi-Pekka Jansson, Antti Mäntyniemi, Juha Kostamovaara. 273-276 [doi]
• An implantable 3-D vestibular stimulator with neural recordingDai Jiang, Andreas Demosthenous, Timothy Perkins, Dominik Cirmirakis, Xiao Liu, Nick Donaldson. 277-280 [doi]
• 64-Channel UWB wireless neural vector analyzer and phase synchrony-triggered stimulator SoCKarim Abdelhalim, Hamed Mazhab-Jafari, Larysa Kokarovtseva, José Luis Pérez Velazquez, Roman Genov. 281-284 [doi]
• A 1.2-0.55V general-purpose biomedical processor with configurable machine-learning accelerators for high-order, patient-adaptive monitoringKyong-Ho Lee, Naveen Verma. 285-288 [doi]
• A 288-GHz lens-integrated balanced triple-push source in a 65-nm CMOS technologyYan Zhao, Janus Grzyb, Ullrich R. Pfeiffer. 289-292 [doi]
• A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technologyXiang Yi, Chirn Chye Boon, Jia-fu Lin, Wei Meng Lim. 293-296 [doi]
• A 49-to-62GHz CMOS quadrature VCO with bimodal enhanced magnetic tuningLiang Wu, Howard C. Luong. 297-300 [doi]
• A fast passive phase shift keying modulator for inductively coupled implanted medical devicesDominik Cirmirakis, Dai Jiang, Andreas Demosthenous, Nick Donaldson, Timothy Perkins. 301-304 [doi]
• BFSK MICS direct-DCO transmitter with adaptive background frequency regulationTuan Vu Cao, Christoph Maier, Dag T. Wisland, Tor Sverre Lande, Gert Cauwenberghs. 305-308 [doi]
• A multichannel neurostimulator with transcutaneous closed-loop power control and self-adaptive supplyHongcheng Xu, Emilia Noorsal, Kriangkrai Sooksood, Joachim Becker, Maurits Ortmanns. 309-312 [doi]
• A 65nm SRAM achieving 250mV retention and 350mV, 1MHz, 55fJ/bit access energy, with bit-interleaved radiation Soft Error toleranceSylvain Clerc, Fady Abouzeid, Gilles Gasiot, David Gauthier, Philippe Roche. 313-316 [doi]
• 60% Cycle time acceleration, 55% energy reduction, 32Kbit SRAM by auto-selective boost (ASB) scheme for slow memory cells in random variationsYasue Yamamoto, Atsushi Kawasumi, Shinichi Moriwaki, Toshikazu Suzuki, Shinji Miyano, Hirofumi Shinohara. 317-320 [doi]
• A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory in 65nm CMOSPascal Andreas Meinerzhagen, Oskar Andersson, Babak Mohammadi, S. M. Yasser Sherazi, Andreas Peter Burg, Joachim Neves Rodrigues. 321-324 [doi]
• Monolithic integration of a class DE inverter for on-chip resonant DC-DC convertersPiet Callemeyn, Michiel Steyaert. 325-328 [doi]
• Capacitor-less LVR for a 32-bit automotive microcontroller SoC in 65nm CMOSThomas Jackum, Wolfgang Pribyl, Frank Praemassing, Gerhard Maderbacher, Roman Riederer. 329-332 [doi]
• A 10MHz ripple-based on-time controlled buck converter with dual ripple compensation and real-time efficiency optimizationDanzhu Lu, Jiale Yu, Zhiliang Hong, Jingwen Mao, Hui Zhao, Eric Cirot. 333-336 [doi]
• A 60 GHz dual-mode power amplifier with 17.4 dBm output power and 29.3% PAE in 40-nm CMOSDixian Zhao, Shailesh Kulkarni, Patrick Reynaert. 337-340 [doi]
• A CMOS IQ Digital Doherty Transmitter using modulated tuning capacitorsWagdy M. Gaber, Piet Wambacq, Jan Craninckx, Mark Ingels. 341-344 [doi]
• 2.1 Times increase of drain efficiency by dual supply voltage scheme in 315MHz class-F Power amplifier at output power of -20dBmShunta Iguchi, Akira Saito, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya. 345-348 [doi]
• A real-time temperature-compensated CMOS RF on-chip power detector with high linearity for wireless applicationsHiroyuki Nakamoto, Masahiro Kudo, Kimitoshi Niratsuka, Toshihiko Mori, Shinji Yamaura. 349-352 [doi]
• A 1.75-15 GHz stepped frequency receiver for breast cancer imaging in 65 nm CMOSMatteo Bassi, Michele Caruso, Andrea Bevilacqua, Andrea Neviani. 353-356 [doi]
• Complex IF harmonic rejection mixer for non-contiguous dual carrier reception in 65 nm CMOSLars Sundström, Staffan Ek, Jim Svensson, Martin Anderson, Roland Strandberg, Fenghao Mu, Imad ud Din, Thomas Olsson, Leif R. Wilhelmsson, Daniel Eckerbert. 357-360 [doi]
• Improving harmonic rejection for spectrum sensing using crosscorrelationMark S. Oude Alink, André B. J. Kokkeler, Eric A. M. Klumperink, Zhiyu Ru, Wei Cheng, Bram Nauta. 361-364 [doi]
• A low-noise, 8.95-11GHz all-digital frequency synthesizer with a metastability-free time-to-digital converter and a sleepy counter in 65nm CMOSChen Jiang, Junren Liu, Yumei Huang, Zhiliang Hong. 365-368 [doi]
• A 3-nW 9.1-ENOB SAR ADC at 0.7 V and 1 kS/sDai Zhang, Atila Alvandpour. 369-372 [doi]
• A 0.7V 7-to-10bit 0-to-2MS/s flexible SAR ADC for ultra low-power wireless sensor nodesPieter Harpe, Guido Dolmans, Kathleen Philips, Harmke de Groot. 373-376 [doi]
• 2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOSGuohe Yin, He Gong Wei, U-Fat Chio, Sai-Weng Sin, Seng-Pan U., Zhihua Wang, Rui Paulo Martins. 377-380 [doi]
• An 8bit 0.35-0.8V 0.5-30MS/s 2bit/step SAR ADC with wide range threshold configuring comparatorKentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro. 381-384 [doi]
• A 20bit continuous-time ΣΔ modulator with a Gm-C integrator, 120dB CMRR and 15 ppm INLGaurav Singh, Rong Wu, Youngcheol Chae, Kofi A. A. Makinwa. 385-388 [doi]
• An incremental ADC sensor interface with input switch-Less integrator featuring 220-nVrms resolution with ±30-mV input rangeEdoardo Bonizzoni, Aldo Pena-Perez, Hervé Caracciolo, David Stoppa, Franco Maloberti. 389-392 [doi]
• Design of a 10-bit CMOS image sensor based on an 8-bit configurable hold-and-go counterChangsun Baek, Chaeyeol Lim, Daeyun Kim, Minkyu Song. 393-397 [doi]
• Design of a fully integrated CMOS self-testable RF power amplifier using a thermal sensorNathalie Deltimple, José Luis González, Josep Altet, Yohann Luque, Eric Kerherve. 398-401 [doi]
• A SiGe bipolar VCO for backhaul E-band communication systemsFabio Padovan, Marc Tiebout, Koen L. R. Mertens, Andrea Bevilacqua, Andrea Neviani. 402-405 [doi]
• Low-phase-noise 3.4-4.5 GHz dynamic-bias class-C CMOS VCOs with a FoM of 191 dBc/HzLuca Fanori, Pietro Andreani. 406-409 [doi]
• A Δ∑-modulator-less digitally-controlled oscillator using fractional capacitors for GSM/EDGE transmitterTakahiro Nakamura, Takayasu Norimatsu, Toshiya Uozumi, Keisuke Ueda, Taizo Yamawaki. 410-413 [doi]
• A 40 nm CMOS analog front end with enhanced audio for HSPA/EDGE multimedia applicationsXicheng Jiang, Min Gyu Kim, Felix Cheung, Fang Lin, Hui Zheng, Jianlong Chen, Alex Jianzhong Chen, Darwin Cheung, Khaled Abdelfattah, Seong Ho Lee, Hanson Huang, Kishore Kasichainula, Yonghua Cong, Jiangfeng Wu, Chang-Hyeon Lee, George Chih, Yun Tu, Todd Brooks, Edison Jiang, Hongwei Kong, Chaoyang Zhao, Mustafa Keskin. 414-417 [doi]
• A high-input-swing common-mode-robust programmable gain amplifier in 65nm CMOSDaniel Gruber, Martin Clara, Berthold Seger. 418-421 [doi]
• A synchronized self oscillating Class-D amplifier for mobile applicationRemy Cellier, Angelo Nagari, Souha Hacine, Gaël Pillonnet, Nacer Abouchi. 422-425 [doi]
• 10ns Start-up techniques for a duty cycled Impulse Radio receiverCui Zhou, Pieter Harpe, Xiaoyan Wang, Kathleen Philips, Harmke de Groot. 426-429 [doi]
• Ultra-low power FSK receiver for body area networks with automatic frequency controlMaarten Lont, Dusan M. Milosevic, Arthur H. M. van Roermund, Guido Dolmans. 430-433 [doi]
• Active RFID: Perpetual wireless communications platform for sensorsJesse Richmond, Mervin John, Louis P. Alarcón, Wenting Zhou, Wen Li, Tsung-Te Liu, Massimo Alioto, Seth Sanders, Jan M. Rabaey. 434-437 [doi]
• A 265VRMS mains interface integrated in 0.35μm CMOSHans Meyvaert, Patrick Smeets, Michiel Steyaert. 438-441 [doi]
• Inductorless and electrolytic capacitorless pseudo-sine current controller in LED lighting system with 1.1W/2.2W power reductionYi-Ping Su, Shao-Wei Chiu, Chun-Chieh Kuo, Yu-Huei Lee, Ke-Horng Chen, Ying-Hsi Lin, Chen-Chih Huang, Chao-Cheng Lee, Yu-Wen Chen. 442-445 [doi]
• Emulated multi-path PID compensator for buck converters with large step-down ratioSe-Won Wang, Young-Jin Woo, Gyu-Ha Cho, Gyu-Hyeong Cho. 446-449 [doi]
• A 86mW 98GOPS ANN-searching processor for Full-HD 30fps video object recognition with zeroless locality-sensitive hashingGyeonghoon Kim, Jinwook Oh, Hoi-Jun Yoo. 450-453 [doi]
• A 3.0 Gb/s clock data recovery circuits based on digital DLL for clock-embedded display interfaceJae-Wook Kwon, Xuefan Jin, Gyoo-Cheol Hwang, Jung-Hoon Chun, Kee-Won Kwon. 454-457 [doi]
• A 576 Mb DRAM with 16-channel 10.3125Gbps serial I/O and 14.5 ns latencySocrates D. Vamvakos, Bendik Kleveland, Dipak Sikdar, B. K. Ahuja, Haidang Lin, Jayaprakash Balachandran, Wignes Balakrishnan, Aldo Bottelli, Jawji Chen, Xiaole Chen, Jae Choi, Jeong Choi, Rajesh Chopra, Sanjay Dabral, Kalyan Dasari, Ron David, Shaishav Desai, Claude Gauthier, Mahmudul Hassan, Kuo-Chiang Hsieh, Ramosan Canagasaby, Jeff Kumala, E. P. Kwon, Ben Lee, Ming Liu, Gurupada Mandal, Sundari Mitra, Byeong Cheol Na, Siddharth Panwar, Jay Patel, Chethan Rao, Vithal Rao, Rich Rouse, Ritesh Saraf, Subramanian Seshadri, Jae-K. Sim, Clement Szeto, Alvin Wang, Jason Yeung. 458-461 [doi]
• A CMOS LDO regulator with high PSR using Gain Boost-Up and Differential Feed Forward Noise Cancellation in 65nm processYoung-sub Yuk, Seungchul Jung, Byunghun Lee, Se-Won Wang, Chul Kim, Gyu-Hyeong Cho. 462-465 [doi]
• Complementary constant-gm biasing of Nauta-transconductors in low-power gm-C filters to +/-2% accuracy over temperatureRichard J. E. Jansen, Johan Haanstra, David Sillars Greenpeak. 466-469 [doi]
• A 4.75-34.75 MHz digitally tunable active-RC LPF for >60dB mean RX IRR in 65nm CMOSMartin Anderson, Roland Strandberg, Staffan Ek, Leif R. Wilhelmsson, Lars Sundström, Mattias Andersson, Imad ud Din, Jim Svensson, Thomas Olsson, Daniel Eckerbert. 470-473 [doi]
• Variation-resilient sub-threshold circuit solutions for ultra-low-power Digital Signal Processors with 10MHz clock frequencyNele Reynders, Wim Dehaene. 474-477 [doi]
• SLC: Split-control Level Converter for dense and stable wide-range voltage conversionYejoong Kim, Yoonmyung Lee, Dennis Sylvester, David Blaauw. 478-481 [doi]
• A 6.5 GHz Arbitrary Digital Waveform GeneratorFrank Leong, Robert Rutten, Nenad Pavlovic, Amine Mounaim. 482-485 [doi]
• Experimental evaluation of Physically Unclonable Functions in 65 nm CMOSRoel Maes, Vladimir Rozic, Ingrid Verbauwhede, Patrick Koeberl, Erik van der Sluis, Vincent van der Leest. 486-489 [doi]