Dimitri Soussan - researchr alias

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Viewing Publication 1 - 7 from 7

2016

®-A53 using static biasing-anticipationFady Abouzeid, Christophe Bernicot, Sylvain Clerc, Jean-Marc Daveau, Gilles Gasiot, Daniel Noblet, Dimitri Soussan, Philippe Roche. esscirc 2016: 37-40 [doi]

2015

28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processorsFady Abouzeid, Sylvain Clerc, Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Damien Croain, Gilles Gasiot, Dimitri Soussan, Philippe Roche. esscirc 2015: 108-111 [doi]

8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasingSylvain Clerc, Mehdi Saligane, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Cyril Bottoni, David Bol, Julien De Vos, Dominique Zamora, Benjamin Coeffic, Dimitri Soussan, Damien Croain, Mehdi Naceur, Pierre Schamberger, Philippe Roche, Dennis Sylvester. isscc 2015: 1-3 [doi]

Muons and thermal neutrons SEU characterization of 28nm UTBB FD-SOI and Bulk eSRAMsGilles Gasiot, Dimitri Soussan, Jean-Luc Autran, Victor Malherbe, Philippe Roche. irps 2015: 2 [doi]

Alpha soft error rate of FDSOI 28 nm SRAMs: Experimental testing and simulation analysisVictor Malherbe, Gilles Gasiot, Dimitri Soussan, Aurelien Patris, Jean-Luc Autran, Philippe Roche. irps 2015: 11 [doi]

2012

A 0.32V, 55fJ per bit access energy, CMOS 65nm bit-interleaved SRAM with radiation Soft Error toleranceSylvain Clerc, Fady Abouzeid, Gilles Gasiot, David Gauthier, Dimitri Soussan, Philippe Roche. icicdt 2012: 1-4 [doi]

A mixed LPDDR2 impedance calibration technique exploiting 28nm Fully-Depleted SOI Back-BiasingDimitri Soussan, Alexandre Valentian, Sylvain Majcherczak, Marc Belleville. icicdt 2012: 1-4 [doi]

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