Jean-Marc Daveau - researchr alias

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Viewing Publication 1 - 29 from 29

2023

Fast analysis of combinatorial netlists correctness rate based on binomial law and partitioningEsther Goudet, Luis Peña Treviño, Lirida A. B. Naviner, Jean-Marc Daveau, Philippe Roche. latw 2023: 1-6 [doi]

Formal Temporal Characterization of Register Vulnerability in Digital CircuitsDamiano Zuccalà, Jean-Marc Daveau, Philippe Roche, Katell Morin-Allory. isvlsi 2023: 1-6 [doi]

2022

Software Product Reliability Based on Basic Block Metrics RecompositionTiziano Fiorucci, Giorgio Di Natale, Jean-Marc Daveau, Philippe Roche. iolts 2022: 1-5 [doi]

2021

Automated Dysfunctional Model Extraction for Model Based Safety Assessment of Digital SystemsTiziano Fiorucci, Jean-Marc Daveau, Giorgio Di Natale, Philippe Roche. iolts 2021: 1-6 [doi]

FIRECAP: Fail-Reason Capturing hardware module for a RISC-V based System on a ChipSébastien Thomet, Serge De Paoli, Jean-Marc Daveau, Valérie Bertin, Fady Abouzeid, Philippe Roche, Fakhreddine Ghaffari, Olivier Romain. dft 2021: 1-6 [doi]

2018

A 2.7 pJ/cycle 16 MHz, 0.7 µW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOIGuenole Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran. jssc, 53(7):2088-2100, 2018. [doi]

2017

A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOIGuenoie Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran. esscirc 2017: 153-162 [doi]

2016

®-A53 using static biasing-anticipationFady Abouzeid, Christophe Bernicot, Sylvain Clerc, Jean-Marc Daveau, Gilles Gasiot, Daniel Noblet, Dimitri Soussan, Philippe Roche. esscirc 2016: 37-40 [doi]

2015

28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processorsFady Abouzeid, Sylvain Clerc, Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Damien Croain, Gilles Gasiot, Dimitri Soussan, Philippe Roche. esscirc 2015: 108-111 [doi]

Partial triplication of a SPARC-V8 microprocessor using fault injectionCyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche. lascas 2015: 1-4 [doi]

Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation testCyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, Fady Abouzeid, Sylvain Clerc, Lirida A. B. Naviner, Philippe Roche. irps 2015: 12 [doi]

Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technologySylvain Clerc, Fady Abouzeid, Darayus Adil Patel, Jean-Marc Daveau, Cyril Bottoni, Lorenzo Ciampolini, Fabien Giner, David Meyer, Robin Wilson, Philippe Roche, Sylvie Naudet, Arnaud Virazel, Alberto Bosio, Patrick Girard. isqed 2015: 366-370 [doi]

8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasingSylvain Clerc, Mehdi Saligane, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Cyril Bottoni, David Bol, Julien De Vos, Dominique Zamora, Benjamin Coeffic, Dimitri Soussan, Damien Croain, Mehdi Naceur, Pierre Schamberger, Philippe Roche, Dennis Sylvester. isscc 2015: 1-3 [doi]

2011

An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilitiesJosep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche. iolts 2011: 98-103 [doi]

2010

2008

Growing Interest of Advanced Commercial CMOS Technologies for Space and Medical Applications. Illustration with a New Nano-Power and Radiation-Hardened SRAM in 130nm CMOSPhilippe Roche, Mark Lysinger, Gilles Gasiot, Jean-Marc Daveau, Mehdi Zamanian, Pierre Dautriche. iolts 2008: 46-48 [doi]

2004

A retargetable register allocation framework for embedded processorsJean-Marc Daveau, Thomas Thery, Thierry Lepley, Miguel Santana. lctrts 2004: 202-210 [doi]

2002

FlexCC2: An Optimizing Retargetable C Compiler for DSP ProcessorsValérie Bertin, Jean-Marc Daveau, Philippe Guillaume, Thierry Lepley, Denis Pilat, Claire Richard, Miguel Santana, Thomas Thery. emsoft 2002: 382-398 [doi]

2001

Automating the Design of SOCs Using CoresReinaldo A. Bergamaschi, Subhrajit Bhattacharya, Ronoldo Wagner, Colleen Fellenz, Michael Muhlada, William R. Lee, Foster White, Jean-Marc Daveau. dt, 18(5):32-45, 2001. [doi]

2000

Interlanguage Communication Synthesis for Heterogeneous SpecificationsFabiano Hessel, Pascal Coste, Philippe Le Marrec, Nacer-Eddine Zergainoh, Gabriela Nicolescu, Jean-Marc Daveau, Ahmed Amine Jerraya. dafes, 5(3-4):223-236, 2000. [doi]

1999

Communication Interface Synthesis for Multilanguage SpecificationsF. Hessel, Philippe Coste, P. LeMarrec, Nacer-Eddine Zergainoh, Jean-Marc Daveau, Ahmed Amine Jerraya. rsp 1999: 15-20 [doi]

1998

Hardware/Software Co-Design Methodology for Design of Embedded SystemsMohamed Abid, Tarek Ben Ismail, Adel Changuel, Carlos A. Valderrama, Mohamed Romdhani, Gilberto Fernandes Marchioro, Jean-Marc Daveau, Ahmed Amine Jerraya. icae, 5(1):69-84, 1998. [doi]

Hardware/software co-design of an ATM network interface card: a case studyJean-Marc Daveau, Gilberto Fernandes Marchioro, Ahmed Amine Jerraya. codes 1998: 111-115 [doi]

1997

Protocol selection and interface generation for HW-SW codesignJean-Marc Daveau, Gilberto Fernandes Marchioro, Tarek Ben Ismail, Ahmed Amine Jerraya. tvlsi, 5(1):136-144, 1997. [doi]

Transformational partitioning for co-design of multiprocessor systemsGilberto Fernandes Marchioro, Jean-Marc Daveau, Ahmed Amine Jerraya. iccad 1997: 508-515 [doi]

1996

A system-level communication synthesis approach for hardware/software systemsTarek Ben Ismail, Jean-Marc Daveau, Kevin O'Brien, Ahmed Amine Jerraya. mam, 20(3):149-157, 1996. [doi]

1995

Synthesis of system-level communication by an allocation-based approachJean-Marc Daveau, Tarek Ben Ismail, Ahmed Amine Jerraya. isss 1995: 150-155 [doi]

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