Abstract is missing.
- Overview of 5G requirements and future wireless networksSven Mattisson. 1-6 [doi]
- A frequency-locked loop based on an oxide electrothermal filter in standard CMOSLorenzo Pedala, Cagn Gurleyuk, Sining Pan, Fabio Sebastiano, Kofi A. A. Makinwa. 7-10 [doi]
- A compact programmable differential voltage reference with unbuffered 4 mA output current capability and ±0.4 % untrimmed spreadSimone Del Cesta, Andrea Ria, Roberto Simmarano, Massimo Piotto, Paolo Bruschi. 11-14 [doi]
- A 420 fW self-regulated 3T voltage reference generator achieving 0.47%/V line regulation from 0.4-to-1.2 VHui Wang, Patrick P. Mercier. 15-18 [doi]
- A 1.02nW PMOS-only, trim-free current reference with 282ppm/°C from -40°C to 120°C and 1.6% within-wafer inaccuracyQing Dong, Inhee Lee, Kaiyuan Yang, David Blaauw, Dennis Sylvester. 19-22 [doi]
- A noise-efficient, in-pixel readout for FET-based THz detectors with direct incremental A/D conversionMoustafa Khatib, Matteo Perenzoni, David Stoppa. 23-26 [doi]
- A 0.7-2 GHz auxiliary receiver with enhanced compression for SAW-less FDDD. Montanari, Danilo Manstretta, Rinaldo Castello, Gerardo Castellano. 27-30 [doi]
- A HBT-based 300 MHz-12 GHz blocker-tolerant mixer-first receiverRobin Ying, Matthew Morton, Alyosha Molnar. 31-34 [doi]
- A 400 MHz 4.5 nW -63.8 dBm sensitivity wake-up receiver employing an active pseudo-balun envelope detectorPo-Han Peter Wang, Haowei Jiang, Li Gao, Pinar Sen, Young Han Kim, Gabriel M. Rebeiz, Patrick P. Mercier, Drew A. Hall. 35-38 [doi]
- A 3-GHz reconfigurable 2/3-level 96/48-channel cross-correlator for synthetic aperture radiometryErik Ryman, Anders Emrich, Lars J. Svensson, Per Larsson-Edefors. 39-42 [doi]
- Accuracy/energy-flexible stochastic configurable 2D Gabor filter with instant-on capabilityNaoya Onizawa, Kazumichi Matsumiya, Warren J. Gross, Takahiro Hanyu. 43-46 [doi]
- 2 3.19-nJ/transform 256-point fast fourier transform core based on spatiotemporally fine-grained active leakage suppressionJoao Pedro Cerqueira, Mingoo Seok. 47-50 [doi]
- Improved power side channel attack resistance of a 128-bit AES engine with random fast voltage ditheringArvind Singh, Monodeep Kar, Sanu Mathew, Anand Rajan, Vivek De, Saibal Mukhopadhyay. 51-54 [doi]
- A <25 μW CMOS monolithic photoplethysmographic sensor with distributed 1b delta-sigma light-to-digital convertorHyung-Gi Kim, Dong-Woo Jee. 55-58 [doi]
- An 80 × 25 pixel CMOS single-photon range image sensor with a flexible on-chip time gating topology for solid state 3D scanningHenna Ruokamo, Lauri Hallman, Harri Rapakko, Juha Kostamovaara. 59-62 [doi]
- Pixel array with 5×5 spatial highpass filter for a retinal implantHenning Schutz, Stefan Gambach, Hans Kaim, Albrecht Rothermel. 63-66 [doi]
- A sun sensor implemented with an asynchronous luminance vision sensorJuan Antonio Leñero-Bardallo, J. M. Guerrero-Rodriguez, Lukasz Farian, R. Carmona-Galain, Ángel Rodríguez-Vázquez. 67-70 [doi]
- A 30fJ/comparison dynamic bias comparatorHarijot Singh Bindra, Chris E. Lokin, Anne-Johan Annema, Bram Nauta. 71-74 [doi]
- A 1.6μW tunable organic transimpedance amplifier for photodetector applications based on gain-boosted common-gate input stage and voltage-controlled resistor with ±0.5% nonlinearitySamar Elsaegh, Hans Zappe, Yiannos Manoli, Yiannos Manoli, Hagen Klauk, Ute Zschieschang. 75-78 [doi]
- A transimpedance amplifier using a widely tunable PVT-independent pseudo-resistor for high-performance current sensing applicationsDenis Djekic, Georg Fantner, Jan Behrends, Klaus Lips, Maurits Ortmanns, Jens Anders. 79-82 [doi]
- Push-pull amplifier with constant transconductance for a current sense applicationAdriano Sambucco, Emiliano A. Puia. 83-86 [doi]
- 3 cornerYizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski. 87-90 [doi]
- A 21GHz 20.5%-tuning range Colpitts VCO with -119 dBc/Hz phase noise at 1MHz offsetFabio Boscolo, Fabio Padovan, Fabio Quadrelli, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua. 91-94 [doi]
- A 1-MHz on-chip relaxation oscillator with comparator delay cancelationJosip Mikulic, Gregor Schatzberger, Adrijan Baric. 95-98 [doi]
- A 1.6%/V 124.2 pW 9.3 Hz relaxation oscillator featuring a 49.7 pW voltage and current reference generatorHui Wang, Patrick P. Mercier. 99-102 [doi]
- A 120GHz in-band full-duplex PMF transceiver with tunable electrical-balance duplexer in 40nm CMOSNiels Van Thienen, Patrick Reynaert. 103-106 [doi]
- A 20Gbps 1.2GHz full-duplex integrated AFE in 28nm CMOS for copper accessThibaut Gurne, Maarten Strackx, Maarten Tytgat, Jan Cools, Patrick Reynaert. 107-110 [doi]
- Highly integrated wavelength-locked Si photonic ring transmitter using direct monitoring of drop-port OMASaurabh Agarwal, Mark Ingels, Marianna Pantouvaki, Michiel Steyaert, Philippe Absil, Joris Van Campenhout. 111-114 [doi]
- DDR4 transmitter with AC-boost equalization and wide-band voltage regulators for thin-oxide protection in 14-nm SOI CMOS technologyMarcel A. Kossel, Christian Menolfi, Pier Andrea Francese, Lukas Kull, Thomas Morf, Thomas Toifl, Matthias Braendli, Alessandro Cevrero, Danny Luu, Ilter Özkaya, Hazar Yueksel. 115-118 [doi]
- A piezoelectric energy harvester interface circuit with adaptive conjugate impedance matching, self-startup and 71% broader bandwidthYifeng Cai, Yiannos Manoli. 119-122 [doi]
- A 2.4μW input power electronic interface circuit for piezoelectric MEMS harvestersG. E. Biccario, M. De Vittorio, S. D'Amico. 123-126 [doi]
- A 25 mV-startup cold start system with on-chip magnetics for thermal energy harvestingPreet Garcha, Dina El-Damak, Nachiket V. Desai, Jorge Troncoso, Erika Mazotti, Joyce Mullenix, Shaoping Tang, Django Trombley, Dennis Buss, Jeffrey Lang, Anantha Chandrakasan. 127-130 [doi]
- A 13mW 64dB SNDR 280MS/s pipelined ADC using linearized open-loop class-AB amplifiersRohan Sehgal, Frank M. L. van der Goes, Klaas Bult. 131-134 [doi]
- 2 164dB-FOM 0.18μm CMOS pipelined ADC with novel passive amplificationTakashi Oshima, Taizo Yamawaki, Koji Maeda. 135-138 [doi]
- A CT ΔΣ ADC with 9/50MHz BW achieving 73/71dB DR designed for robust blocker tolerance in 14nm FinFETFrancesco Conzatti, Lukas Dörrer, Patrick Torta, Claus Kropf, Dirk Patzold, Jacinto San Pablo Garcia, Venerando Rallos, Norbert Schembera. 139-142 [doi]
- A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technologyHechen Wang, Fa Foster Dai. 143-146 [doi]
- Quantizer-less proportional path fractional-N digital PLL with a low-power high-gain time amplifier and background multi-point spur calibrationMinuk Heo, Sunghyun Bae, Jayeol Lee, Cheonsu Kim, MinJae Lee. 147-150 [doi]
- A 7GS/s direct digital frequency synthesizer with a two-times interleaved RDAC in 65nm CMOSAbdel Martinez Alonso, Masaya Miyahara, Akira Matsuzawa. 151-154 [doi]
- A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOIGuenoie Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran. 153-162 [doi]
- Design margin elimination in a near-threshold timing error masking-aware 32-bit ARM Cortex M0 in 40nm CMOSHans Reyserhove, Wim Dehaene. 155-158 [doi]
- Near-Vt adaptive microprocessor and power-management-unit system based on direct error regulationSeongjong Kim, Joao Pedro Cerqueira, Mingoo Seok. 163-166 [doi]
- A 36.4dB SNDR @ 5GHz 1.25GS/s 7b 3.56mW single-channel SAR ADC in 28nm bulk CMOSAthanasios Ramkaj, Maarten Strackx, Michiel Steyaert, Filip Tavernier. 167-170 [doi]
- A 28 nm 2 GS/s 5-b single-channel SAR ADC with gm-boosted StrongARM comparatorPierluigi Cenci, Muhammed Bolatkale, Robert Rutten, Gerard Lassche, Kofi A. A. Makinwa, Lucien J. Breems. 171-174 [doi]
- A 43.6-dB SNDR 1-GS/s single-channel SAR ADC using coarse and fine comparators with background comparator offset calibrationGuanhua Wang, Kexu Sun, Qing Zhang, Salam Elahmadi, Ping Gui. 175-178 [doi]
- A 12b, 1 GSps TI pipelined-SAR converter with 65 dB SFDR through buffer linearization and gain mismatch correction in 28nm FD-SOIMattias Palm, Daniele Mastantuono, Roland Strandberg, Lars Sundström, Sven Mattisson. 179-180 [doi]
- Background calibration using noisy reference ADC for a 12 b 600 MS/s 2 × TI SAR ADC in 14nm CMOS FinFETDanny Luu, Lukas Kull, Thomas Toifl, Christian Menolfi, Matthias Braendli, Pier Andrea Francese, Thomas Morf, Marcel A. Kossel, Hazar Yueksel, Alessandro Cevrero, Ilter Özkaya, Qiuting Huang. 183-186 [doi]
- Class-AB and class-J 22 dBm SiGe HBT PAs for X-band radar systemsP. Scaramuzza, C. Rubino, Marc Tiebout, Michele Caruso, M. Ortner, Andrea Neviani, Alessandro Bevilacqua. 187-190 [doi]
- A 13.2-dBm, 138-GHz I/Q RF-DAC with 64-QAM and OFDM free-space constellation formationStefan Shopov, Ozan D. Gurbuz, Gabriel M. Rebeiz, Sorin P. Voinigescu. 191-194 [doi]
- Single-BAW multi-channel transmitter with low power and fast start-up timePhillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan. 195-198 [doi]
- A 15-bit 28nm CMOS fully-integrated 1.6W digital power amplifier for LTE IoTJ. Fuhrmann, J. Moreira, P. Osmann, Andreas Springer, Robert Weigel, Harald Pretl. 199-202 [doi]
- A 60GHz 8-way phased array front-end with TR switching and calibration-free beamsteering in 28nm CMOSKhaled Khalaf, Kristof Vaesen, Steven Brebels, Giovanni Mangraviti, Michael Libois, Charlotte Soens, Piet Wambacq. 203-206 [doi]
- A 25 Gb/s 60 GHz digital power amplifier in 28nm CMOSKaushik Dasgupta, Saeid Daneshgar, Chintan Thakkar, Kunal Datta, James E. Jaussi, Bryan Casper. 207-210 [doi]
- A reconfigurable 24 × 40 element transceiver ASIC for compact 3D medical ultrasound probesE. Kang, Q. Ding, Maysam Shabanimotlagh, P. Kruizinga, Zu-yao Chang, Emile Noothout, Hendrik J. Vos, Johan G. Bosch, Martin D. Verweij, N. de Jong, Michiel A. P. Pertijs. 211-214 [doi]
- A multi-sensor and parallel processing SoC for wearable and implantable telemetry systemsPhilipp Schönle, Giovanni Rovere, Florian Glaser, Jonathan Bosser, Noé Brun, X. Han, Thomas Burger, Schekeb Fateh, Q. Wang, Luca Benini, Q. Huang. 215-218 [doi]
- 0.3 V ultra-low power sensor interface for EMGSirma Orguc, Harneet Singh Khurana, Hae-Seung Lee, Anantha P. Chandrakasan. 219-222 [doi]
- A 24 μW 38.51 mΩrms resolution bio-impedance sensor with dual path instrumentation amplifierKwantae Kim, Kiseok Song, Kyeongryeol Bong, Jaehyuk Lee, Kwonjoon Lee, Yongsu Lee, Unsoo Ha, Hoi-Jun Yoo. 223-226 [doi]
- A CMOS current driver with built-in common-mode signal reduction capability for EITYu Wu, Dai Jiang, Peter J. Langlois, Richard H. Bayford, Andreas Demosthenous. 227-230 [doi]
- A 10b 20MS/s SAR ADC with a low-power and area-efficient DAC-compensated referenceMaoqiang Liu, Arthur H. M. van Roermund, Pieter Harpe. 231-234 [doi]
- An energy reduced sampling technique applied to a 10b 1MS/s SAR ADCHarijot Singh Bindra, Anne-Johan Annema, Simon M. Louwsma, Ed J. M. van Tuijl, Bram Nauta. 235-238 [doi]
- A missing-code-detection gain error calibration achieving 63dB SNR for an 11-bit ADCGuan-Cheng Wang, Yan Zhu 0001, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins. 239-242 [doi]
- A 54-64.8 GHz subharmonically injection-locked frequency synthesizer with transmitter EVM between -26.5 dB and -28.8 dB in 28 nm CMOSCheng-Hsueh Tsai, Giovanni Mangraviti, Qixian Shi, Khaled Khalaf, André Bourdoux, Piet Wambacq. 243-246 [doi]
- A 491.52 MHz 840 uW crystal oscillator in 28 nm FD-SOI CMOS for 5G applicationsChristian Elgaard, Lars Sundström. 247-250 [doi]
- A 16-20 GHz LO system with 115 fs jitter for 24-30 GHz 5G in 28 nm FD-SOI CMOSStaffan Ek, Tony Påhlsson, Anders Carlsson, Andreas Axholt, Anna-Karin Stenman, Henrik Sjöland. 251-254 [doi]
- An ultra-low-power and mixed-mode event-driven face detection SoC for always-on mobile applicationsChanghyeon Kim, Kyeongryeol Bong, Injoon Hong, Kyuho Jason Lee, Sungpill Choi, Hoi-Jun Yoo. 255-258 [doi]
- OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network acceleratorsChixiao Chen, Hongwei Ding, Huwan Peng, Haozhe Zhu, Rui Ma, Peiyong Zhang, Xiaolang Yan, Yu Wang 0046, Mingyu Wang, Hao Min, C.-J. Richard Shi. 259-262 [doi]
- A 19.4 nJ/decision 364K decisions/s in-memory random forest classifier in 6T SRAM arrayMingu Kang, Sujan K. Gonugondla, Naresh R. Shanbhag. 263-266 [doi]
- A highly accurate spike sorting processor with reconfigurable embedded frames for unsupervised and adaptive analysis of neural signalsMajid Zamani, Dai Jiang, Andreas Demosthenous. 267-270 [doi]
- A synthesizable time-based LDO using digital standard cells and analog pass transistorAhmed Fahmy, Jun Liu 0038, Pavan Terdal, Ryan Madler, Rizwan Bashirullah, Nima Maghari. 271-274 [doi]
- A digitally controlled linear regulator for per-core wide-range DVFS of atom™ cores in 14nm tri-gate CMOS featuring non-linear control, adaptive gain and code roamingRamnarayanan Muthukaruppan, Tarun Mahajan, Harish K. Krishnamurthy, Sumedha Mangal, Am Dhanashekar, Rupak Ghayal, Vivek De. 275-278 [doi]
- A sub-100nW power supply unit embedding untrimmed timing and voltage references for duty-cycled μW-range load in FDSOI 28nmAnthony Quelen, Franck Badets, Gaël Pillonnet. 279-282 [doi]
- Switched capacitor DC-DC converter with switch conductance modulation and Pesudo-fixed frequency controlDennis Oland Larsen, Martin Vinter, Ivan H. H. Jørgensen. 283-286 [doi]
- Unsymmetrical parallel switched-capacitor (UP-SC) regulator with fast searching optimum ratio techniqueYen-Ting Lin, Wen-Hau Yang, Yu-Sheng Ma, Yan-Jiun Lai, Hung-Wei Chen, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai. 287-290 [doi]
- A 100-mW fully integrated DC-DC converter with double galvanic isolationNunzio Greco, Alessandro Parisi, Pierpaolo Lombardo, Giuseppe Palmisano, Nunzio Spina, Egidio Ragonese. 291-294 [doi]
- Wide-input-voltage-range and high-efficiency energy harvester with a 155-mV startup voltage for solar powerHung-Hsien Wu, Liang-Yun Chen, Chia-Ling Wei. 295-298 [doi]
- A 900 MHz RF energy harvesting system in 40 nm CMOS technology with efficiency peaking at 47% and higher than 30% over a 22dB wide input power rangeJialue Wang, Yang Jiang, Johan Dijkhuis, Guido Dolmans, Hao Gao, Peter G. M. Baltus. 299-302 [doi]
- A system of array families and synthesized soft arrays for the POWER9™ processor in 14nm SOI FinFET technologyP. Salz, A. Frisch, Wolfgang Penth, J. Noack, T. Kalla, Rolf Sautter, Michael Kugel, Otto A. Torreiter, G. Sapp, M. Lee, Eric Fluhr, A. Rozenfeld, Jürgen Pille, Dieter F. Wendel. 303-307 [doi]
- An 800 Mhz mixed-VT 4T gain-cell embedded DRAM in 28 nm CMOS bulk process for approximate computing applicationsRobert Giterman, Alexander Fish, Narkis Geuli, Elad Mentovich, Andreas Burg, Adam Teman. 308-311 [doi]
- An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generationThomas Haine, Quoc-Khoi Nguyen, François Stas, Ludovic Moreau, Denis Flandre, David Bol. 312-315 [doi]
- 1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcellNavneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel. 316-319 [doi]
- A 32KB 18ns random access time embedded PCM with enhanced program throughput for automotive and smart power applicationsMarco Pasotti, M. Carissimi, C. Auricchio, D. Brambilla, E. Calvetti, L. Capecchi, L. Croce, D. Gallinari, C. Mazzaglia, V. Rana, Riccardo Zurla, Alessandro Cabrini, Guido Torelli. 320-323 [doi]
- A 2×14bit digital transmitter with memoryless current unit cells and integrated AM/PM calibrationMark Ingels, Davide Dermit, Yao Liu, Hans Cappelle, Jan Craninckx. 324-327 [doi]
- A low voltage 0.8V RF receiver in 28nm CMOS for 5GHz WLANAtsushi Shirane, Shusuke Kawai, Hiromitsu Aoyama, Rui Ito, Toshiya Mitomo, Hiroyuki Kobayashi, Hiroshi Yoshida, Hideaki Majima, Ryuichi Fujimoto, Hiroshi Tsurumi. 328-331 [doi]
- A 65nm CMOS 2×2 MIMO multi-band LTE RF transceiver for small cell base stationsKyoohyun Lim, Sang-Hoon Lee, Byeongmoo Moon, Hwahyeong Shin, Kisub Kang, Yongha Lee, Seungbeom Kim, Jinhyeok Lee, Hyungsuk Lee, Hyunchul Shim, Cheolhoon Sung, Geumyoung Park, Garam Lee, Minjung Kim, Seokyoung Park, Hyosun Jung, Jong-Ryul Lee. 332-335 [doi]
- A low-noise reconfigurable full-duplex front-end with self-interference cancellation and harmonic-rejection power amplifier for low power radio applicationsTong Zhang, Yongdong Chen, Chenxi Huang, Jacques C. Rudell. 336-339 [doi]
- A SAW-less RF-SoC for cellular IoT supporting EC-GSM-IoT -121.7 dBm sensitivity through EGPRS2A 592 kbps throughputBenjamin Weber, Matthias Korb, David Tschopp, Stefan Altorfer, Jürgen Rogin, Harald Kroll, Qiuting Huang. 340-343 [doi]
- A 92.2% peak-efficiency self-resonant hybrid switched-capacitor LED driver in 0.18μm CMOSJuan C. Castellanos, Mert Turhan, Marcel A. M. Hendrix, Arthur H. M. van Roermund, Eugenio Cantatore. 344-347 [doi]
- A 12-48 V wide-vin 9-15 MHz soft-switching controlled resonant DCDC converterJuergen Wittmann, Tobias Funk, Thoralf Rosahl, Bernhard Wicht. 348-351 [doi]
- A low quiescent current and cross regulation single-inductor dual-output converter with stacking MOSFET driving techniqueYu-Sheng Ma, Wen-Hau Yang, Yen-Ting Lin, Hsin Chen, Li-Chi Lin, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai, Jui-Lung Chen. 352-355 [doi]
- A 1.85 fA/√Hz fully integrated read-out interface for sub-pA current sensing applicationsMohammad Amayreh, Yiannos Manoli, Matthias Keller. 356-359 [doi]
- Integrated hall-based magnetic platform for position sensingSebastien Leroy, Stefan Rigert, Arnaud Laville, Andrea Ajbl, Gael F. Close. 360-363 [doi]
- A 5.5 nW battery-powered wireless ion sensing systemHui Wang, Xiaoyang Wang, Jiwoong Park, Abbas Barfidokht, Joseph Wang, Patrick P. Mercier. 364-367 [doi]
- A 64×64 high-density redox amplified coulostatic discharge-based biosensor array in 180nm CMOSAlexander Sun, Enrique Alvarez-Fontecilla, A. G. Venkatesh, Eliah Aronoff Spencer, Drew A. Hall. 368-371 [doi]
- Isolator-less near-field RFID reader for sub-cranial powering/data link of mm-sized implantsChristopher Sutardja, Jan M. Rabaey. 372-375 [doi]
- A 8mW-RX/113mW-TX, Sub-GHz SoC with time-dithered PA ramping for LPWAN applicationsHasan Gul, Jac Romme, Paul Mateman, Johan Dijkhuis, Xiongchuan Huang, Cui Zhou, Benjamin Busze, Gert-Jan van Schaik, Elbert Bechthum, Ming Ding, Arjan Breeschoten, Yao-Hong Liu, Christian Bachmann, Guido Dolmans, Kathleen Philips. 376-379 [doi]
- A low-power compact IEEE 802.15.6 compatible human body communication transceiver with digital sigma-delta IIR mask shapingBo Zhao, Yong Lian, Ali M. Niknejad, Chun-Huat Heng. 380-383 [doi]