Abstract is missing.
- Energy-Efficient Neural Network Inference through Golomb-Rice Compression of Activations for Edge DevicesMounika Vaddeboina, Alper Yilmazer, Wolfgang Ecker. 1-6 [doi]
- LLM-assisted Performance Estimation of Embedded Software on RISC-V ProcessorsWeiyan Zhang, Muhammad Hassan 0002, Rolf Drechsler. 7-12 [doi]
- Design of a Low-Power 4.3 Gb/s Transceiver Using Pre-computed Lookup TablesHussien Abdo, Jan Lappas, Mohammadreza Esmaeilpour, Christian Weis, Norbert Wehn. 8-13 [doi]
- DEAR-CNN: Data-Efficient Assessment of Resiliency in Convolutional Neural NetworksNicolò Bellarmino, Alberto Bosio, Riccardo Cantoro, Annachiara Ruospo, Ernesto Sánchez 0001. 13-18 [doi]
- Towards an Automated Debugging Approach for Fault Identification in Quantum CircuitsAnton Maidl, Abhoy Kole, Kamalika Datta, Jannis Stoppe, Rolf Drechsler. 19-24 [doi]
- River: Sneak Path Aware READ-based In-Memory Computing for 1T1M Memristive CrossbarsTill Schnittka, Chandan Kumar Jha 0001, Sallar Ahmadi-Pour, Rolf Drechsler. 31-36 [doi]
- An Innovative Data Mining Technique for Automatic Anomaly Detection in Physical Unclonable FunctionsMohammad Reza Heidari Iman, Sergio Vinagrero Gutierrez, Elena Ioana Vatajelu, Giorgio Di Natale. 37-42 [doi]
- Comparative Study of Safety and Security-Protected AES DesignsDaniel Thirion, Jean-Marc Daveau, Valentin Egloff, David Hély, Vincent Beroulle, Philippe Roche. 43-48 [doi]
- Mitigating DoS Attacks on CAN: A Priority-Raise Approach and Its Timing AnalysisMingqing Zhang, Alejandro Masrur. 49-54 [doi]
- A Survey on Automatic Assertion MinersMohammad Reza Heidari Iman, Giorgio Di Natale, Katell Morin-Allory. 55-60 [doi]
- S4V: A Benchmark Suite of Transient Execution Attacks for RISC-V ProcessorsElia Lazzeri, Matteo Colella, Gianluca Furano, Luca Cassano. 61-67 [doi]
- Accuracy Enhancement of Resistor-String Digital-to-Analog Converters through Averaging Dynamic Element MatchingFrancesco Gagliardi 0002, Michele Dei. 74-79 [doi]
- Tunable Voltage Reference circuit in a standard 65nm CMOS technologyRóbert Ondica, David Maljar, Miroslav Potocný, Daniel Arbet, Viera Stopjaková. 80-85 [doi]
- Implementation of Dynamic SISD-SIMD Integer DividersGianluca Radi, Ares Tahiraga, Robert Kunzelmann, Ties Jan Henderikus Kluter, Wolfgang Ecker. 86-91 [doi]
- Lazy Man's Resynthesis For Glitching-Aware Power MinimizationAndrea Costamagna, Xiaoqing Xu, Giovanni De Micheli, Dino Ruic. 92-98 [doi]
- Boosting SW Development Efficiency with Function Lifetime DiagramsChristoph Hazott, Daniel Große. 99-104 [doi]
- Ultra-Thin-Body and Buried Oxide FD-SOI next generation nodes and eNVM technologies for advanced IC designClaire Fenouillet-Béranger, Laurent Fesquet, Rihab Chouk, Gabriel Pares, Baudoin Martineau, Marie-Claire Cyrille, Thierry Poiroux, Olivier Billoint, Dominique Noguet. 105-114 [doi]
- Modeling and Simulation of Thermal Faults in Batteries for Enhanced SafetyFrancesco Tosoni 0002, Sara Vinco, Franco Fummi. 115-118 [doi]
- A Two-Stage Approximation Methodology for Efficient DNN Hardware ImplementationAmir Hossein Hadipour, Atousa Jafari, Muhammad Awais 0009, Marco Platzner. 119-122 [doi]
- Bridging Quantization and Deployment: A Fixed-Point Workflow for FPGA AcceleratorsObed M. Mogaka, Håkan Forsberg, Masoud Daneshtalab. 123-126 [doi]
- Controllability-Based Circuit Similarity EstimationMichal Zácek, Petr Fiser. 127-130 [doi]
- Analysis and Mitigation of Soft-errors in GPU-accelerated Hyperspectral Image ClassifiersSergiu-Mohamed Abed, Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Gianluca De Lucia, Marco Lapegna, Matteo Sonza Reorda. 131-134 [doi]
- Study of an OPTO-ASIC for a Functionally Safe Speed Sensor Using the Spatial Frequency Filter MethodFrank Wasinski, Werner Bonath, Ubbo Ricklefs, Michael Schwarz, Josef Börcsök. 135-138 [doi]
- Automatic generation of input-aware approximate arithmetic circuitsMario Barbareschi, Salvatore Barone, Alberto Bosio, Bastien Deveautour, Ali Piri, Marcello Traiola. 139-144 [doi]
- RL-Agent-based Early-Exit DNN Architecture Search FrameworkMahdi Taheri, Parth Patne, Natalia Cherezova, Ali Mahani 0001, Christian Herglotz, Maksim Jenihhin. 145-148 [doi]
- Domain-Specific Design Abstraction with Emphasis on Neural NetworksMaryam Rajabalipanah, Zahra Hojati, Zahra Jahanpeima, Zainalabedin Navabi. 149-152 [doi]
- CrosSym: Cross-Level Verification of SystemC Peripherals using Symbolic ExecutionKarl Aaron Rudkowski, Sallar Ahmadi-Pour, Rolf Drechsler. 153-156 [doi]
- Stratified sampling: fast estimation of quantization effects on DNNQuentin Milot, Mickaël Dardaillon, Daniel Ménard. 157-160 [doi]
- Inference Energy Analysis in Context of Hardware-Aware NASMichal Pinos, Jan Klhufek, Vojtech Mrazek, Lukás Sekanina. 161-164 [doi]
- Duality and resonance in RLC-circuits. Exact formulas for phase, amplitude resonance and bandwidthDaniel Blokhin. 165-168 [doi]