Rolf Drechsler - researchr alias

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Viewing Publication 1 - 100 from 885

2023

Benchmarking Multiplier Architectures for MAGIC Based In-Memory ComputingChandan Kumar Jha 0001, Rolf Drechsler. newcas 2023: 1-5 [doi]

MARADIV: Library of MAGIC-Based Approximate Restoring Array Divider Benchmark Circuits for In-Memory Computing Using MemristorsChandan Kumar Jha 0001, Sallar Ahmadi-Pour, Rolf Drechsler. tcasII, 70(7):2635-2639, July 2023. [doi]

Processor Verification using Symbolic Execution: A RISC-V Case-StudyNiklas Bruns, Vladimir Herdt, Rolf Drechsler. date 2023: 1-6 [doi]

VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow TrackingEce Nur Demirhan Coskun, Muhammad Hassan 0002, Mehran Goli, Rolf Drechsler. isqed 2023: 1-8 [doi]

Memristors: Device Modeling, Design and VerificationKamalika Datta, Rolf Drechsler. ifip5-5 2023: 254-259 [doi]

Verification of In-Memory Logic Design using ReRAM CrossbarsKamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler. newcas 2023: 1-5 [doi]

Impact of sneak paths on in-memory logic design in memristive crossbarsKamalika Datta, Arighna Deb, Abhoy Kole, Rolf Drechsler. it, 65(1-2):29-39, May 2023. [doi]

Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal ArchitectureKamalika Datta, Abhoy Kole, Indranil Sengupta 0001, Rolf Drechsler. RC 2023: 218-231 [doi]

Automated Equivalence Checking Method for Majority Based In-Memory Computing on ReRAM CrossbarsArighna Deb, Kamalika Datta, Muhammad Hassan 0002, Saeideh Shirinzadeh, Rolf Drechsler. aspdac 2023: 19-25 [doi]

Automated Polynomial Formal Verification: Human-Readable Proof GenerationRolf Drechsler, Martha Schnieber. ifip5-5 2023: 1-3 [doi]

Towards Polynomial Formal Verification of AI-Generated Arithmetic CircuitsRolf Drechsler, Alireza Mahzoon. isdcs 2023: 1-4 [doi]

Next-Generation Automatic Human-Readable Proofs Enabling Polynomial Formal VerificationRolf Drechsler, Martha Schnieber. memocode 2023: 122-125 [doi]

Divide and Verify: Using a Divide-and-Conquer Strategy for Polynomial Formal Verification of Complex CircuitsRolf Drechsler, Alireza Mahzoon. date 2023: 1-2 [doi]

Identification of ISA-Level Mutation-Classes for Qualification of RISC-V Formal VerificationMilan Funck, Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler. fdl 2023: 1-8 [doi]

RC-IJTAG: A Methodology for Designing Remotely-Controlled IEEE 1687 Scan NetworksPayam Habiby, Sebastian Huhn 0001, Rolf Drechsler. dft 2023: 1-6 [doi]

Synthesis of IJTAG Networks for Multi-Power Domain Systems on ChipsPayam Habiby, Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich, Sebastian Huhn 0001, Rolf Drechsler. ets 2023: 1-6 [doi]

Classifying Crowdsouring Platform Users' Engagement Behaviour using Machine Learning and XAISana Hassan Imam, Christopher A. Metz, Lars Hornuf, Rolf Drechsler. mc 2023: [doi]

Polynomial Formal Verification of Floating Point AddersJan Kleinekathöfer, Alireza Mahzoon, Rolf Drechsler. date 2023: 1-2 [doi]

Extending the Design Space of Dynamic Quantum Circuits for Toffoli based NetworkAbhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler. date 2023: 1-6 [doi]

Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across ArchitecturesAbhoy Kole, Kamalika Datta, Philipp Niemann 0001, Indranil Sengupta 0001, Rolf Drechsler. RC 2023: 232-244 [doi]

Efficient Binary Decision Diagram Manipulation by Reducing the Number of Intermediate NodesRune Krauss, Mehran Goli, Rolf Drechsler. ddecs 2023: 73-78 [doi]

EDDY: A Multi-Core BDD Package with Dynamic Memory Management and Reduced FragmentationRune Krauss, Mehran Goli, Rolf Drechsler. aspdac 2023: 423-428 [doi]

Polynomial Formal Verification of Complex Circuits Using a Hybrid Proof EngineAlireza Mahzoon, Rolf Drechsler. BIRTHDAY 2023: 308-319 [doi]

Quality Assessment of Logic Locking Mechanisms using Pseudo-Boolean Optimization TechniquesMarcel Merten, Muhammad Hassan 0002, Rolf Drechsler. ddecs 2023: 105-110 [doi]

Increasing SAT-Resilience of Logic Locking Mechanisms using Formal MethodsMarcel Merten, Sebastian Huhn 0001, Rolf Drechsler. ets 2023: 1-6 [doi]

Scalable Neuroevolution of Ensemble LearnersMarcel Merten, Rune Krauss, Rolf Drechsler. gecco 2023: 667-670 [doi]

Fast and Accurate: Machine Learning Techniques for Performance Estimation of CNNs for GPGPUsChristopher A. Metz, Mehran Goli, Rolf Drechsler. ipps 2023: 754-760 [doi]

Hybrid PTX Analysis for GPU accelerated CNN inferencing aiding Computer Architecture DesignChristopher A. Metz, Christina Plump, Bernhard J. Berger, Rolf Drechsler. fdl 2023: 1-8 [doi]

Coverage-Guided Fuzzing for Plan-Based RoboticsTim Meywerk, Vladimir Herdt, Rolf Drechsler. icaart 2023: 106-114 [doi]

Lo-RISK: Design of a Low Optical Leakage and High Performance RISC-V CoreSajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha 0001, Frank Sill Torres, Rolf Drechsler. coins 2023: 1-4 [doi]

Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case StudySajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler. aspdac 2023: 683-689 [doi]

FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical ProbingSajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler. date 2023: 1-2 [doi]

LAT-UP: Exposing Layout-Level Analog Hardware Trojans Using Contactless Optical ProbingSajjad Parvin, Mehran Goli, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler. isvlsi 2023: 1-6 [doi]

Repetitive Processes and Their Surrogate-Model Congruent Encoding for Evolutionary Algorithms - A Theoretic ProposalChristina Plump, Bernhard J. Berger, Rolf Drechsler. gecco 2023: 2289-2296 [doi]

Polynomial Formal Verification of KFDD CircuitsMartha Schnieber, Rolf Drechsler. memocode 2023: 82-89 [doi]

Finite State Automata Design using 1T1R ReRAM CrossbarSimranjeet Singh, Omar Ghazal, Chandan Kumar Jha 0001, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant. newcas 2023: 1-5 [doi]

Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design StyleSimranjeet Singh, Chandan Kumar Jha 0001, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant. esl, 15(4):230-233, December 2023. [doi]

Workshop: "Aktuelle Entwicklungen und Perspektiven (an Hochschulen) im Bereich Data Science"Lena Steinmann, Dirk Nowotka, Lea Oberländer, Helen Pfuhl, Heiner Stuckenschmidt, Rolf Drechsler. gi 2023: 73-80 [doi]

Minimally Invasive Generation of RISC-V Instruction Set Simulators from Formal ISA ModelsSören Tempel, Tobias Brandt, Christoph Lüth, Rolf Drechsler. fdl 2023: 1-8 [doi]

Specification-Based Symbolic Execution for Stateful Network Protocol Implementations in IoTSören Tempel, Vladimir Herdt, Rolf Drechsler. iotj, 10(11):9544-9555, June 2023. [doi]

Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable TransistorsJens Trommer, N. Bhattacharjee, Thomas Mikolajick, S. Huhn, Marcel Merten, M. E. Djeridane, Muhammad Hassan 0002, Rolf Drechsler, S. Rai, N. Kavand, A. Darjani, A. Kumar, V. Sessi, M. Drescher, S. Kolodinski, M. Wiatr. date 2023: 1-6 [doi]

Polynomial Formal Verification of a Processor: A RISC-V Case StudyLennart Weingarten, Alireza Mahzoon, Mehran Goli, Rolf Drechsler. isqed 2023: 1-7 [doi]

PolyMiR: Polynomial Formal Verification of the MicroRV32 ProcessorLennart Weingarten, Kamalika Datta, Rolf Drechsler. NANOARCH 2023: [doi]

Efficient ML-Based Performance Estimation Approach Across Different Microarchitectures for RISC-V ProcessorsWeiyan Zhang, Mehran Goli, Muhammad Hassan 0002, Rolf Drechsler. dsd 2023: 693-699 [doi]

Virtual Prototype Driven Application Specific Hardware OptimizationJan Zielasko, Rolf Drechsler. fdl 2023: 1-8 [doi]

Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear CircuitsKemal Çaglar Coskun, Muhammad Hassan 0002, Rolf Drechsler. date 2023: 1-6 [doi]

2022

Polynomial-Time Formal Verification of Adder Circuits for Multiple-Valued LogicPhilipp Niemann 0001, Rolf Drechsler. ismvl 2022: 9-14 [doi]

Next Generation Design For Testability, Debug and Reliability Using Formal TechniquesSebastian Huhn 0001, Rolf Drechsler. itc 2022: 609-618 [doi]

Template-based mapping of reversible circuits to IBM quantum computersPhilipp Niemann 0001, Alexandre A. A. de Almeida, Gerhard W. Dueck, Rolf Drechsler. mam, 90:104487, April 2022. [doi]

Task Mapping and Scheduling in FPGA-based Heterogeneous Real-time Systems: A RISC-V Case-StudySallar Ahmadi-Pour, Sangeet Saha, Vladimir Herdt, Rolf Drechsler, Klaus D. McDonald-Maier. dsd 2022: 134-141 [doi]

The MicroRV32 framework: An accessible and configurable open source RISC-V cross-level platform for education and researchSallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler. jsa, 133:102757, 2022. [doi]

Das Bremen Ambient Assisted Living Lab und darüber hinaus - Intelligente Umgebungen, smarte Services und Künstliche Intelligenz in der Medizin für den MenschenSerge Autexier, Christoph Lüth, Rolf Drechsler. In Mario A. Pfannstiel, editor, Künstliche Intelligenz im Gesundheitswesen: Entwicklungen, Beispiele und Perspektiven. pages 835-850, Springer Fachmedien Wiesbaden, 2022. [doi]

Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided AgingNiklas Bruns, Vladimir Herdt, Eyck Jentzsch, Rolf Drechsler. date 2022: 1123-1126 [doi]

Unified HW/SW Coverage: A Novel Metric to Boost Coverage-guided Fuzzing for Virtual Prototype based HW/SW Co-VerificationNiklas Bruns, Vladimir Herdt, Rolf Drechsler. fdl 2022: 1-8 [doi]

Efficient Cross-Level Processor Verification using Coverage-guided FuzzingNiklas Bruns, Vladimir Herdt, Daniel Große, Rolf Drechsler. glvlsi 2022: 97-103 [doi]

Unlocking Sneak Path Analysis in Memristor Based Logic Design StylesKamalika Datta, Saeideh Shirinzadeh, Phrangboklang Lyngton Thangkhiew, Indranil Sengupta 0001, Rolf Drechsler. dsd 2022: 793-800 [doi]

Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit ArchitectureKamalika Datta, Abhoy Kole, Indranil Sengupta 0001, Rolf Drechsler. ismvl 2022: 35-42 [doi]

Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant ApplicationsKamalika Datta, Saman Fröhlich, Saeideh Shirinzadeh, Dev Narayan Yadav, Indranil Sengupta 0001, Rolf Drechsler. vlsi 2022: 1-6 [doi]

Mapping Quantum Circuits to 2-Dimensional Quantum ArchitecturesKamalika Datta, Abhoy Kole, Indranil Sengupta 0001, Rolf Drechsler. gi 2022: 1109-1120 [doi]

Preserving Design Hierarchy Information for Polynomial Formal VerificationRolf Drechsler, Alireza Mahzoon. vlsi 2022: 1-7 [doi]

Polynomial Formal Verification: Ensuring Correctness under Resource ConstraintsRolf Drechsler, Alireza Mahzoon. iccad 2022: [doi]

Towards Polynomial Formal Verification of Complex Arithmetic CircuitsRolf Drechsler, Alireza Mahzoon, Mehran Goli. ddecs 2022: 1-6 [doi]

Fast and Exact is Doable: Polynomial Algorithms in Test and VerificationRolf Drechsler. latw 2022: 1-2 [doi]

Self-Explanation in Systems of SystemsGörschwin Fey, Martin Fränzle, Rolf Drechsler. RE 2022: 85-91 [doi]

Virtual Prototype based Analysis of Neural Network Cache Behavior for Tiny Edge DeviceAlexander Fratzer, Vladimir Herdt, Christoph Lüth, Rolf Drechsler. fdl 2022: 1-6 [doi]

Generation of Verified Programs for In-Memory ComputingSaman Fröhlich, Rolf Drechsler. dsd 2022: 815-820 [doi]

LiM-HDL: HDL-Based Synthesis for In-Memory ComputingSaman Fröhlich, Rolf Drechsler. date 2022: 1395-1400 [doi]

Parallel Computing of Graph-based Functions in ReRAMSaman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler. jetc, 18(2), 2022. [doi]

Unlocking approximation for in-memory computing with Cartesian genetic programming and computer algebra for arithmetic circuitsSaman Fröhlich, Rolf Drechsler. it, 64(3):99-107, 2022. [doi]

Virtual Prototype driven Design, Implementation and Evaluation of RISC-V Instruction Set ExtensionsMilan Funck, Vladimir Herdt, Rolf Drechsler. ddecs 2022: 14-19 [doi]

Simulation-based Verification of SystemC-based VPs at the ESLMehran Goli, Rolf Drechsler. mbmv 2022: 1-4 [doi]

Through the Looking Glass: Automated Design Understanding of SystemC-Based VPs at the ESLMehran Goli, Rolf Drechsler. tcad, 41(4):1181-1185, 2022. [doi]

Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challengesVladimir Herdt, Rolf Drechsler. chinaf, 65(1), 2022. [doi]

SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate LibraryAbhoy Kole, Kamalika Datta, Indranil Sengupta 0001, Rolf Drechsler. dsd 2022: 769-776 [doi]

Polynomial Formal Verification of Complex MultipliersAlireza Mahzoon, Rolf Drechsler. mbmv 2022: 1-4 [doi]

Formal verification of modular multipliers using symbolic computer algebra and boolean satisfiabilityAlireza Mahzoon, Daniel Große, Christoph Scholl 0001, Alexander Konrad, Rolf Drechsler. dac 2022: 1183-1188 [doi]

RevSCA-2.0: SCA-Based Formal Verification of Nontrivial Multipliers Using Reverse Engineering and Local Vanishing RemovalAlireza Mahzoon, Daniel Große, Rolf Drechsler. tcad, 41(5):1573-1586, 2022. [doi]

A Hardware-based Evolutionary Algorithm with Multi-Objective Optimization Operators for On-Chip Transient Fault DetectionMarcel Merten, Sebastian Huhn 0001, Rolf Drechsler. vts 2021: 1-7 [doi]

Quality Assessment of RFET-based Logic Locking Protection Mechanisms using Formal MethodsMarcel Merten, Sebastian Huhn 0001, Rolf Drechsler. ets 2022: 1-2 [doi]

Towards Neural Hardware Search: Power Estimation of CNNs for GPGPUs with Dynamic Frequency ScalingChristopher A. Metz, Mehran Goli, Rolf Drechsler. mlcad 2022: 103-109 [doi]

ML-based Power Estimation of Convolutional Neural Networks on GPGPUsChristopher A. Metz, Mehran Goli, Rolf Drechsler. ddecs 2022: 166-171 [doi]

Simulation-Based Debugging of Formal Environment ModelsTim Meywerk, Arthur Niedzwiecki, Vladimir Herdt, Rolf Drechsler. med 2022: 890-895 [doi]

Toward Optical Probing Resistant Circuits: A Comparison of Logic Styles and Circuit Design TechniquesSajjad Parvin, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler. aspdac 2022: 429-435 [doi]

Verifying SystemC TLM peripherals using modern C++ symbolic execution toolsPascal Pieper, Vladimir Herdt, Daniel Große, Rolf Drechsler. dac 2022: 1177-1182 [doi]

Advanced Environment Modeling and Interaction in an Open Source RISC-V Virtual PrototypePascal Pieper, Vladimir Herdt, Rolf Drechsler. glvlsi 2022: 193-197 [doi]

Using density of training data to improve evolutionary algorithms with approximative fitness functionsChristina Plump, Bernhard J. Berger, Rolf Drechsler. cec 2022: 1-10 [doi]

Adapting mutation and recombination operators to range-aware relations in real-world application dataChristina Plump, Bernhard J. Berger, Rolf Drechsler. gecco 2022: 755-758 [doi]

Polynomial Formal Verification of Approximate AddersMartha Schnieber, Saman Fröhlich, Rolf Drechsler. dsd 2022: 761-768 [doi]

Polynomial Formal Verification of Approximate FunctionsMartha Schnieber, Saman Fröhlich, Rolf Drechsler. isvlsi 2022: 92-97 [doi]

Automated Detection of Spatial Memory Safety Violations for Constrained DevicesSören Tempel, Vladimir Herdt, Rolf Drechsler. aspdac 2022: 160-165 [doi]

SISL: Concolic Testing of Structured Binary Input Formats via Partial SpecificationSören Tempel, Vladimir Herdt, Rolf Drechsler. ATVA 2022: 77-82 [doi]

SymEx-VP: An open source virtual prototype for OS-agnostic concolic testing of IoT firmwareSören Tempel, Vladimir Herdt, Rolf Drechsler. jsa, 126:102456, 2022. [doi]

Towards Quantification and Visualization of the Effects of Concretization During Concolic TestingSören Tempel, Vladimir Herdt, Rolf Drechsler. esl, 14(4):195-198, 2022. [doi]

Introduction to the Special Issue on Design Automation for Quantum ComputingRobert Wille, Rolf Drechsler. jetc, 18(1), 2022. [doi]

FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic ApplicationsDev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta 0001. et, 38(2):145-163, 2022. [doi]

Feed-Forward learning algorithm for resistive memoriesDev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta 0001. jsa, 131:102730, 2022. [doi]

Early Performance Estimation of Embedded Software on RISC-V Processor using Linear RegressionWeiyan Zhang, Mehran Goli, Rolf Drechsler. ddecs 2022: 20-25 [doi]

ANN-based Performance Estimation of Embedded Software for RISC-V ProcessorsWeiyan Zhang, Mehran Goli, Alireza Mahzoon, Rolf Drechsler. rsp 2022: 22-28 [doi]

3D Visualization of Symbolic Execution TracesJan Zielasko, Sören Tempel, Vladimir Herdt, Rolf Drechsler. fdl 2022: 1-8 [doi]

Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog FiltersKemal Çaglar Coskun, Muhammad Hassan 0002, Rolf Drechsler. ddecs 2022: 160-165 [doi]

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