Table of Contents

• A High-Performance Stochastic Simulated Bifurcation Ising MachineTingting Zhang, Hongqiao Zhang, Zhengkun Yu, Siting Liu 0001, Jie Han 0001. [doi]
• Late Breaking Result: AQFP-aware Binary Neural Network Architecture SearchZhengang Li, Xuan Shen, Geng Yuan, Masoud Zabihi, Tomoharu Yamauchi, Yanzhi Wang, Olivia Chen. [doi]
• Late Breaking Results: A real-time diffusion-based filter for human pose estimation on edge devicesChiara Bozzini, Michele Boldo, Enrico Martini, Nicola Bombieri. [doi]
• Design of a Quantum Walk Circuit to Solve the Subset-Sum ProblemGiacomo Lancellotti, Simone Perriello, Alessandro Barenghi, Gerardo Pelosi. [doi]
• A Combined Content Addressable Memory and In-Memory Processing Approach for k-Clique Counting AccelerationXidi Ma, Weichen Zhang, Xueyan Wang, Tianyang Yu, Bi-Wu, Gang Qu 0001, Weisheng Zhao. [doi]
• TIGA: Towards Efficient Near Data Processing in SmartNICs-based Disaggregated Memory SystemsZhuohui Duan, Zelin Yu, Haikun Liu, Xiaofei Liao, Hai Jin 0001, Shijie Zheng, Sihan Wu. [doi]
• Unleashing the Potential of AQFP Logic Placement via Entanglement Entropy and ProjectionYinuo Bai, Enxin Yi, Wei W. Xing, Bei Yu 0001, Zhou Jin 0001. [doi]
• EmMark: Robust Watermarks for IP Protection of Embedded Quantized Large Language ModelsRuisi Zhang, Farinaz Koushanfar. [doi]
• zeroTT: A Two-Step State Transition Avoidance Scheme for MLC STT-RAMDong Yin, Huizhang Luo, Jeff Zhang 0001, Mingxing Duan, Wangdong Yang, Zhuo Tang, Kenli Li 0001. [doi]
• TITAN: A Fast and Distributed Large-Scale Trapped-Ion NISQ ComputerCheng Chu, Zhenxiao Fu, Yilun Xu, Gang Huang, Hausi A. Müller, Fan Chen 0001, Lei Jiang 0001. [doi]
• RT-MDM: Real-Time Scheduling Framework for Multi-DNN on MCU Using External MemorySukmin Kang, Seongtae Lee, Hyunwoo Koo, Hoon Sung Chwa, Jinkyu Lee 0001. [doi]
• Fake Node-Based Perception Poisoning Attacks against Federated Object Detection Learning in Mobile Computing NetworksXiong Xiao, Mingxing Duan, Yingjie Song, Zhuo Tang, Wenjing Yang 0002. [doi]
• 3D-Carbon: An Analytical Carbon Modeling Tool for 3D and 2.5D Integrated CircuitsYujie Zhao, Yang Katie Zhao, Cheng Wan 0005, Yingyan Celine Lin. [doi]
• STAGGER: Enabling All-in-One Subarray Sensing for Efficient Module-level Processing in Open-Bitline ReRAMChengning Wang, Dan Feng 0001, Yuchong Hu, Wei Tong 0001, Jingning Liu. [doi]
• G-PASTA: GPU-Accelerated Partitioning Algorithm for Static Timing AnalysisBoyang Zhang, Dian-Lun Lin, Che Chang, Cheng-Hsiang Chiu, Bojue Wang, Wan-Luan Lee, Chih-Chun Chang, Donghao Fang, Tsung-Wei Huang. [doi]
• Data-driven HLS optimization for reconfigurable acceleratorsAggelos Ferikoglou, Andreas Kosmas Kakolyris, Vasilis Kypriotis, Dimosthenis Masouros, Dimitrios Soudris, Sotirios Xydis. [doi]
• A High-Throughput Private Inference Engine Based on 3D Stacked MemoryZhaohui Chen, Ling Liang, Qi Liu, Zhirui Li, Fahong Zhang, YanHeng Lu, Zhen Gu. [doi]
• Concurrent Detailed Routing with Pin Pattern Re-generation for Ultimate Pin Access OptimizationYing-Jie Jiang, Shao-Yun Fang. [doi]
• RCGP: An Automatic Synthesis Framework for Reversible Quantum-Flux-Parametron Logic Circuits based on Efficient Cartesian Genetic ProgrammingRongliang Fu, Robert Wille, Tsung-Yi Ho. [doi]
• C-Nash: A Novel Ferroelectric Computing-in-Memory Architecture for Solving Mixed Strategy Nash EquilibriumYu Qian, Kai Ni 0004, Thomas Kämpfe, Cheng Zhuo, Xunzhao Yin. [doi]
• Late Breaking Results: Efficient Built-in Self-Test for Microfluidic Large-Scale Integration (mLSI)Mengchu Li, Hanchen Gu, Yushen Zhang, Siyuan Liang, Hudson Gasvoda, Rana Altay, Ismail Emre Araci, Tsun-Ming Tseng, Tsung-Yi Ho, Ulf Schlichtmann. [doi]
• Zeroth-Order Optimization of Optical Neural Networks with Linear Combination Natural Gradient and Calibrated ModelHiroshi Sawada, Kazuo Aoyama, Kohei Ikeda. [doi]
• 4-Transistor Ternary Content Addressable Memory Cell Design using Stacked Hybrid IGZO/Si TransistorsMunhyeon Kim, Jae-Joon Kim. [doi]
• PPA-Relevant Clustering-Driven Placement for Large-Scale VLSI DesignsAndrew B. Kahng, Seokhyeong Kang, Sayak Kundu, Kyungjun Min, SeongHyeon Park, Bodhisatta Pramanik. [doi]
• SMILE: LLC-based Shared Memory Expansion to Improve GPU Thread Level ParallelismTianyu Guo, Xuanteng Huang, Kan Wu, XianWei Zhang, Nong Xiao. [doi]
• TATOO: A Flexible Hardware Platform for Binary-Only FuzzingJinting Wu, Haodong Zheng, Yu Wang, Tai Yue, Fengwei Zhang. [doi]
• A RRAM-based High Energy-efficient Accelerator Supporting Multimodal Tasks for Virtual Reality Wearable DevicesXin Zhao, Zhicheng Hu, Zilong Guo, Haodong Fan, Xi Yang, Jing Zhou, Liang Chang 0002. [doi]
• DySpMM: From Fix to Dynamic for Sparse Matrix-Matrix Multiplication AcceleratorsHongyi Wang, Kai Zhong, Haoyu Zhang, Shulin Zeng, Zhenhua Zhu, Xinhao Yang, Shuang Wang, Guohao Dai, Huazhong Yang, Yu Wang 0002. [doi]
• Token-Picker: Accelerating Attention in Text Generation with Minimized Memory Transfer via Probability EstimationJunyoung Park, Myeonggu Kang, Yunki Han, Yanggon Kim, Jaekang Shin, Lee-Sup Kim. [doi]
• VAE-HDC: Efficient and Secure Hyper-dimensional Encoder Leveraging Variation Analog EntropyBoyang Cheng, Jianbo Liu, Steven Davis, Zephan M. Enciso, Yiyang Zhang, Ningyuan Cao. [doi]
• PowPrediCT: Cross-Stage Power Prediction with Circuit-Transformation-Aware LearningYufan Du, Zizheng Guo, Xun Jiang 0002, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang 0001. [doi]
• LOTUS: learning-based online thermal and latency variation management for two-stage detectors on edge devicesYifan Gong 0004, Yushu Wu, Zheng Zhan 0001, Pu Zhao 0001, Liangkai Liu, Chao Wu, Xulong Tang, Yanzhi Wang. [doi]
• Enabling Multiple Tensor-wise Operator Fusion for Transformer Models on Spatial AcceleratorsLei Xu, Zhiwen Mo, Qin Wang 0009, Jianfei Jiang 0001, Naifeng Jing. [doi]
• Knowing The Spec to Explore The Design via Transformed Bayesian OptimizationDonger Luo, Qi Sun, Xinheng Li, Chen Bai, Bei Yu 0001, Hao Geng. [doi]
• Optimal Transistor Folding and Placement for Synthesizing Standard Cells of Complementary FET TechnologySuwan Kim, Taewhan Kim. [doi]
• Toward Controllable Hierarchical Clock Tree Synthesis with Skew-Latency-Load TreeWeiguo Li, Zhipeng Huang 0009, Bei Yu 0001, Wenxing Zhu, Xingquan Li. [doi]
• Predicting Lemmas in Generalization of IC3Yuheng Su, Qiusong Yang, Yiwei Ci. [doi]
• How accurately can soft error impact be estimated in black-box/white-box cases? - a case study with an edge AI SoC -Quan Cheng, Qiufeng Li, Longyang Lin, Wang Liao, Liuyao Dai, Hao Yu 0001, Masanori Hashimoto. [doi]
• Order-Preserving Cryptography for the Confidential Inference in Random Forests: FPGA Design and ImplementationRupesh Raj Karn, Kashif Nawaz, Ibrahim Abe M. Elfadel. [doi]
• Efficient Bilevel Source Mask OptimizationGuojin Chen, Hongquan He, Peng Xu, Hao Geng, Bei Yu 0001. [doi]
• Effectively Sanitizing Embedded Operating SystemsJianzhong Liu, Yuheng Shen, Yiru Xu, Hao Sun, Heyuan Shi, Yu Jiang 0001. [doi]
• Multi-order Differential Neural Network for TCAD Simulation of the Semiconductor DevicesZifei Cai, Anaoxue Huang, Yifeng Xiong, Dejiang Mu, Xiangshui Miao, Xingsheng Wang. [doi]
• Fracturing-aware Curvilinear ILT via Circular E-beam Mask WriterXinyun Zhang, Su Zheng, Guojin Chen, Binwu Zhu, Hong Xu, Bei Yu 0001. [doi]
• Low-Complexity Algorithmic Test Generation for Neuromorphic ChipsHsu-Yu Huang, Chu-Yun Hsiao, Tsung-Te Liu, James Chien-Mo Li. [doi]
• Accelerating Regular Path Queries over Graph Database with Processing-in-MemoryRuoyan Ma, Shengan Zheng, Guifeng Wang, Jin Pu, Yifan Hua, Wentao Wang, Linpeng Huang. [doi]
• Enhancing 3-D Random Walk Capacitance Solver with Analytic Surface Green's Functions of Transition CubesJiechen Huang, Wenjian Yu. [doi]
• DGR: Differentiable Global RouterWei Li 0159, Rongjian Liang, Anthony Agnesina, Haoyu Yang, Chia-Tung Ho, Anand Rajaram, Haoxing Ren. [doi]
• SAS - A Framework for Symmetry-based Approximate SynthesisNiklas Jungnitz, Oliver Keszöcze. [doi]
• FeBiM: Efficient and Compact Bayesian Inference Engine Empowered with Ferroelectric In-Memory ComputingChao Li 0065, Zhicheng Xu, Bo Wen, Ruibin Mao, Can Li, Thomas Kämpfe, Kai Ni 0004, Xunzhao Yin. [doi]
• SPARK: An Efficient Hybrid Acceleration Architecture with Run-Time Sparsity-Aware Scheduling for TinyML LearningMingxuan Li, Qinzhe Zhi, Yanchi Dong, Le Ye, Tianyu Jia. [doi]
• UpDLRM: Accelerating Personalized Recommendation using Real-World PIM ArchitectureSitian Chen, Haobin Tan, Amelie Chi Zhou, Yusen Li, Pavan Balaji. [doi]
• EnTurbo: Accelerate Confidential Serverless Computing via Parallelizing Enclave Startup ProcedureYifan Zhu, Peinan Li, Yunkai Bai, Yubiao Huang, Shiwen Wang, Xingbin Wang, Dan Meng, Rui Hou 0001. [doi]
• VARADE: a Variational-based AutoRegressive model for Anomaly Detection on the EdgeAlessio Mascolini, Sebastiano Gaiardelli, Francesco Ponzio, Nicola Dall'Ora, Enrico Macii, Sara Vinco, Santa Di Cataldo, Franco Fummi. [doi]
• Obstacle-Aware Length-Matching Routing for Any-Direction Traces in Printed Circuit BoardWeijie Fang, Longkun Guo, Jiawei Lin, Silu Xiong, Huan He, Jiacen Xu, Jianli Chen. [doi]
• MASC: A Memory-Efficient Adjoint Sensitivity Analysis through Compression Using Novel Spatiotemporal PredictionChenxi Li, Boyuan Zhang, Yongqiang Duan, Yang Li, Zuochang Ye, Weifeng Liu, Dingwen Tao, Zhou Jin 0001. [doi]
• Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early OptimizationWenji Fang, Shang Liu, Hongce Zhang, Zhiyao Xie. [doi]
• Combining Parameterized Pulses and Contextual Subspace for More Practical VQEZhiding Liang, Zhixin Song, Jinglei Cheng, Hang Ren, Tianyi Hao 0003, Rui Yang, Yiyu Shi 0001, Tongyang Li. [doi]
• SEPE-SQED: Symbolic Quick Error Detection by Semantically Equivalent Program ExecutionYufeng Li, Qiusong Yang, Yiwei Ci, Enyuan Tian. [doi]
• SSRESF: Sensitivity-aware Single-particle Radiation Effects Simulation Framework in SoC Platforms based on SVM AlgorithmMeng Liu, Shuai Li, Fei Xiao, Ruijie Wang, Chunxue Liu, Liang Wang. [doi]
• ML-based Physical Design Parameter Optimization for 3D ICs: From Parameter Selection to OptimizationHao-Hsiang Hsiao, Pruek Vanna-Iampikul, Yi-Chen Lu, Sung Kyu Lim. [doi]
• Hardware-Aware Neural Dropout Search for Reliable Uncertainty Prediction on FPGAZehuan Zhang, Hongxiang Fan, Hao Mark Chen, Lukasz Dudziak, Wayne Luk. [doi]
• DeepRIoT: Continuous Integration and Deployment of Robotic-IoT ApplicationsMeixun Qu, Jie He, Zlatan Tucakovic, Ezio Bartocci, Dejan Nickovic, Haris Isakovic, Radu Grosu. [doi]
• FDCA: Fine-grained Digital-CIM based CNN Accelerator with Hybrid Quantization and Weight-Stationary DataflowBo Liu 0019, Qingwen Wei, Yang Zhang, Xingyu Xu 0008, Zihan Zou, Xinxiang Huang, Xin Si, Hao Cai. [doi]
• Arbitrary-size Multi-layer OARSMT RL Router Trained with Combinatorial Monte-Carlo Tree SearchLiang-Ting Chen, Hung-Ru Kuo, Yih-Lang Li, Mango C.-T. Chao. [doi]
• RWriC: A Dynamic Writing Scheme for Variation Compensation for RRAM-based In-Memory ComputingYucong Huang, Jingyu He, Kwang-Ting (Tim) Cheng, Chi-Ying Tsui, Terry Tao Ye. [doi]
• SecPaging: Secure Enclave Paging with Hardware-Enforced Protection against Controlled-Channel AttacksYunkai Bai, Peinan Li, Yubiao Huang, Shiwen Wang, Xingbin Wang, Dan Meng, Rui Hou 0001. [doi]
• MSMAC: Accelerating Multi-Scalar Multiplication for Zero-Knowledge ProofPengcheng Qiu, Guiming Wu, Tingqiang Chu, Changzheng Wei, Runzhou Luo, Ying Yan, Wei Wang, Hui Zhang. [doi]
• Towards Redundancy-Free Recommendation Model Training via Reusable-aware Near-Memory ProcessingHaifeng Liu 0003, Long Zheng 0003, Yu Huang 0013, Haoyan Huang, Xiaofei Liao, Hai Jin 0001. [doi]
• Top-Level Routing for Multiply-Instantiated Blocks with Topology HashingJiarui Wang, Xun Jiang 0002, Yibo Lin. [doi]
• An In-Memory Computing Accelerator with Reconfigurable Dataflow for Multi-Scale Vision Transformer with Hybrid TopologyZhiyuan Chen, Yufei Ma 0002, Keyi Li, Yifan Jia 0009, Guoxiang Li, Meng Wu 0005, Tianyu Jia, Le Ye, Ru Huang 0001. [doi]
• ALVEARE: a Domain-Specific Framework for Regular ExpressionsFilippo Carloni, Davide Conficconi, Marco D. Santambrogio. [doi]
• FQP: A Fibonacci Quantization Processor with Multiplication-Free Computing and Topological-Order RoutingXiaolong Yang, Yang Wang, Yubin Qin, Jiachen Wang, Shaojun Wei, Yang Hu 0001, Shouyi Yin. [doi]
• Geneva: A Dynamic Confluence of Speculative Execution and In-Order Commitment WindowsYanghee Lee, Jiwon Lee, Jaewon Kwon, Yongju Lee 0003, Won Woo Ro. [doi]
• Cache-aware Task Decomposition for Efficient Intermittent Computing SystemsShuo Xu, Wei Zhang, Mengying Zhao, Zimeng Zhou, Lei Ju 0001. [doi]
• SpaHet: A Software/Hardware Co-design for Accelerating Heterogeneous-Sparsity based Sparse Matrix MultiplicationHaoqin Huang, Pengcheng Yao, Zhaozeng An, Yufei Sun, Ao Hu, Peng Xu, Long Zheng 0003, Xiaofei Liao, Hai Jin 0001. [doi]
• Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware VerificationKhushboo Qayyum, Muhammad Hassan 0002, Sallar Ahmadi-Pour, Chandan Kumar Jha 0001, Rolf Drechsler. [doi]
• AccMoS: Accelerating Model Simulation for Simulink via Code GenerationYifan Cheng, Zehong Yu, Zhuo Su 0005, Ting Chen, Xiaosong Zhang 0001, Yu Jiang 0001. [doi]
• Binding Multi-bit Flip-flop Cells through Design and Technology Co-optimizationJooyeon Jeong, Taewhan Kim. [doi]
• QuGeo: An End-to-end Quantum Learning Framework for Geoscience - A Case Study on Full-Waveform InversionWeiwen Jiang, Youzuo Lin. [doi]
• HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit SizingTianchen Gu, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang 0001, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng 0001. [doi]
• Late Breaking Results: Evaluation of Human Action Quality with Linear Recurrent Units and Graph Attention Networks on Embedded SystemsFilippo Ziche, Nicola Bombieri. [doi]
• ViT-slice: End-to-end Vision Transformer Accelerator with Bit-slice AlgorithmDongjin Shin, Insu Choi, Joon-Sung Yang. [doi]
• LaMUX: Optimized Logic-Gate-Enabled High-Performance Microfluidic Multiplexer DesignSiyuan Liang, Yushen Zhang, Rana Altay, Hudson Gasvoda, Mengchu Li, Ismail Emre Araci, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho. [doi]
• A Software-Hardware Co-design Solution for 3D Inner Structure ReconstructionXingchen Li, Zhe Zhou 0002, Qilin Zheng, Guangyu Sun 0003, Qiankun Wang, Chenhao Xue. [doi]
• Laser Shield: a Physical Defense with Polarizer against Laser Attacks on Autonomous Driving SystemsQingjie Zhang, Lijun Chi, Di Wang, Mounira Msahli, Gérard Memmi, Tianwei Zhang 0004, Chao Zhang, Han Qiu 0001. [doi]
• Efficient ILT via Multigrid-Schwartz MethodShuyuan Sun, Fan Yang, Bei Yu 0001, Li Shang, Dian Zhou, Xuan Zeng 0001. [doi]
• Graph Learning-based Fault Criticality Analysis for Enhancing Functional Safety of E/E SystemsSanjay Das, Shamik Kundu, Pooja Madhusoodhanan, Viswanathan Pillai Prasanth, Rubin A. Parekhji, Arnab Raha, Suvadeep Banerjee, Suriya Natarajan, Kanad Basu. [doi]
• Nona: Accurate Power Prediction Model Using Neural NetworksHoSun Choi, Chanho Park, Euijun Kim, William J. Song. [doi]
• DH-TRNG: A Dynamic Hybrid TRNG with Ultra-High Throughput and Area-Energy EfficiencyYuan Zhang, Kuncai Zhong, Jiliang Zhang 0002. [doi]
• Late Breaking Results: Coulomb Force-Based Routability-Driven Placement Considering Global and Local CongestionJihai Meng, Shaohong Weng, Zhijie Cai, Yilu Chen, Zhifeng Lin, Jianli Chen. [doi]
• SmartATPG: Learning-based Automatic Test Pattern Generation with Graph Convolutional Network and Reinforcement LearningWenxing Li, Hongqin Lyu, Shengwen Liang, Tiancheng Wang, Huawei Li 0001. [doi]
• Auto-ISP: An Efficient Real-Time Automatic Hyperparameter Optimization Framework for ISP Hardware SystemJiaming Liu, Zihao Liu, Xuan Huang, Ruoxi Zhu, Qi Zheng, Zhijian Hao, Tao Liu, Jun Tao, Yibo Fan. [doi]
• OPAL: Outlier-Preserved Microscaling Quantization Accelerator for Generative Large Language ModelsJahyun Koo 0002, Dahoon Park, Sangwoo Jung, Jaeha Kung. [doi]
• An NTT/INTT Accelerator with Ultra-High Throughput and Area Efficiency for FHEZhaojun Lu, Weizong Yu, Peng Xu 0003, Wei Wang 0088, Jiliang Zhang 0002, Dengguo Feng. [doi]
• Late Breaking Results: TriSC: Low-Cost Design of Trigonometric Functions with Quasi Stochastic ComputingSercan Aygun, Mehran Shoushtari Moghadam, M. Hassan Najafi. [doi]
• RexBDDs: Reduction-on-Edge Complement-and-Swap Binary Decision DiagramsGianfranco Ciardo, Andrew S. Miner, Lichuan Deng, Junaid Babar. [doi]
• inGRASS: Incremental Graph Spectral Sparsification via Low-Resistance-Diameter DecompositionAli Aghdaei, Zhuo Feng. [doi]
• OPTIMA: Design-Space Exploration of Discharge-Based In-SRAM Computing: Quantifying Energy-Accuracy Trade-offsSaeed Seyedfaraji, Severin Jager, Salar Shakibhamedan, Asad Aftab, Semeen Rehman. [doi]
• Synthesis of Compact Flow-based Computing Circuits from Boolean ExpressionsSven Thijssen, Muhammad Rashedul Haq Rashed, Sumit Kumar Jha 0001, Rickard Ewetz. [doi]
• Fast Virtual Gate Extraction For Silicon Quantum Dot DevicesShize Che, Seongwoo Oh, Haoyun Qin, Yuhao Liu, Anthony Sigillito, Gushu Li. [doi]
• PathFuzz: Broadening Fuzzing Horizons with Footprint Memory for CPUsYinan Xu 0001, Sa Wang, Dan Tang, Ninghui Sun, Yungang Bao. [doi]
• G-kway: Multilevel GPU-Accelerated k-way Graph PartitionerWan-Luan Lee, Dian-Lun Lin, Tsung-Wei Huang, Shui Jiang, Tsung-Yi Ho, Yibo Lin, Bei Yu 0001. [doi]
• Late Breaking Results: Wiring Reduction for Field-coupled NanotechnologiesSimon Toni Hofmann, Marcel Walter, Robert Wille. [doi]
• Invited: Using Causal Information to Enable More Efficient Robot OperationSemanti Basu, Semir Tatlidil, Moon Hwan Kim, Steven A. Sloman, R. Iris Bahar. [doi]
• Deep Harmonic Finesse: Signal Separation in Wearable Systems with Limited DataMahya Saffarpour, Weitai Qian, Kourosh Vali, Begum Kasap, Herman L. Hedriana, Soheil Ghiasi. [doi]
• Efficient Equivalence Checking of Nonlinear Analog Circuits using Gradient AscentKemal Çaglar Coskun, Muhammad Hassan 0002, Lars Hedrich, Rolf Drechsler. [doi]
• Mixed-Dimensional Qudit State Preparation Using Edge-Weighted Decision DiagramsKevin Mato, Stefan Hillmich, Robert Wille. [doi]
• SPECRUN: The Danger of Speculative Runahead Execution in ProcessorsChaoqun Shen, Gang Qu 0001, Jiliang Zhang 0002. [doi]
• KATO: Knowledge Alignment And Transfer for Transistor Sizing Of Different Design and TechnologyWei W. Xing, Weijian Fan, Zhuohua Liu, Yuan Yao, Yuanqi Hu. [doi]
• Late Breaking Results: Majority-Inverter Graph Minimization by Design Space ExplorationSiang-Yun Lee, Alessandro Tempia Calvino, Heinz Riener, Giovanni De Micheli. [doi]
• Invited: Achieving PetaOps/W Edge-AI ProcessingManil Dev Gomony, Bas Ahn, Rick Luiken, Yashvardhan Biyani, Anteneh Gebregiorgis, Axel Laborieux, Friedemann Zenke, Said Hamdioui, Henk Corporaal. [doi]
• CEDAR: Computing-in-pixel Edge-aware Detection and Reconstruction Architecture for High-resolution 3D ImagingBu Chen, Zhangcheng Huang, Qi Zheng, Weiyi Tang, Jingyi Wang, Hankun Lv, Chixiao Chen, Jianlu Wang, Qi Liu 0010. [doi]
• Efficient Code Generation for Data-Intensive Simulink Models via Redundancy EliminationZehong Yu, Zhuo Su 0005, Yu Jiang 0001, Aiguo Cui, Rui Wang. [doi]
• QUQ: Quadruplet Uniform Quantization for Efficient Vision Transformer InferenceXinkuang Geng, Siting Liu 0001, Leibo Liu, Jie Han 0001, Honglan Jiang. [doi]
• Cross-Layer Exploration and Chip Demonstration of In-Sensor Computing for Large-Area Applications with Differential-Frame ROM-Based Compute-In-MemoryJialong Liu, Wenjun Tang, Deyun Chen, Chen Jiang, Huazhong Yang, Xueqing Li. [doi]
• Conjuring: Leaking Control Flow via Speculative Fetch AttacksAli Hajiabadi, Trevor E. Carlson. [doi]
• EdGeo: A Physics-guided Generative AI Toolkit for Geophysical Monitoring on Edge DevicesJunhuan Yang, Hanchen Wang 0003, Yi-sheng, Youzuo Lin, Lei Yang. [doi]
• Drift: Leveraging Distribution-based Dynamic Precision Quantization for Efficient Deep Neural Network AccelerationLian Liu, Zhaohui Xu, Yintao He, Ying Wang 0001, Huawei Li 0001, Xiaowei Li 0001, Yinhe Han 0001. [doi]
• Ev-Edge: Efficient Execution of Event-based Vision Algorithms on Commodity Edge PlatformsShrihari Sridharan, Surya Selvam, Kaushik Roy 0001, Anand Raghunathan. [doi]
• Reducing DRAM Latency via In-situ Temperature- and Process-Variation-Aware Timing Detection and AdaptionYuxuan Qin, Chuxiong Lin, Mingche Lai, Zhang Luo, Shi Xu, Weifeng He. [doi]
• EDGE-LLM: Enabling Efficient Large Language Model Adaptation on Edge Devices via Unified Compression and Adaptive Layer VotingZhongzhi Yu, Zheng Wang, Yuhan Li, Ruijie Gao, Xiaoya Zhou, Sreenidhi Reddy Bommu, Yang Katie Zhao, Yingyan (Celine) Lin. [doi]
• TSAcc: An Efficient \underline{T}empo-\underline{S}patial Similarity Aware \underline{Acc}elerator for Attention AccelerationZhuoran Song, Chunyu Qi, Yuanzheng Yao, Peng Zhou, Yanyi Zi, Nan Wang, Xiaoyao Liang. [doi]
• TrafficHD: Efficient Hyperdimensional Computing for Real-Time Network Traffic AnalyticsHaodong Lu 0001, Zhiyuan Ma, Xinran Li, Shiyan Bi, Xiaoming He, Kun Wang 0005. [doi]
• Revisiting Automatic Pipelining: Gate-level Forwarding and SpeculationShuyao Cheng, Chongxiao Li, Zidong Du, Rui Zhang 0040, Xing Hu 0001, Xiaqing Li, Guanglin Xu, Yuanbo Wen, Qi Guo. [doi]
• Size-Optimized Depth-Constrained Large Parallel Prefix CircuitsShiju Lin, Bentian Jiang, Weihua Sheng, Evangeline F. Y. Young. [doi]
• Invited: Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAMLingyi Huang, Cheng Yang, Yu Gong, Yang Sui, Xiao Zang, Anthony Goeckner, Qi Zhu, Bo Yuan 0001. [doi]
• A High Level Approach to Co-Designing 3D ICsDaniel Xing, Ankur Srivastava 0001. [doi]
• PowerLens: An Adaptive DVFS Framework for Optimizing Energy Efficiency in Deep Neural NetworksJiawei Geng, Zongwei Zhu, Weihong Liu, Xuehai Zhou, Boyu Li. [doi]
• FastQuery: Communication-efficient Embedding Table Query for Private LLMs inferenceChenqi Lin, Tianshi Xu, Zebin Yang, Runsheng Wang, Ru Huang 0001, Meng Li 0004. [doi]
• Go Beyond Black-box Policies: Rethinking the Design of Learning Agent for Interpretable and Verifiable HVAC ControlZhiyu An, Xianzhong Ding, Wan Du. [doi]
• Lesyn: Placement-aware Logic Resynthesis for Non-Integer Multiple-Cell-Height DesignsYuan Pu, Fangzhou Liu, Yu Zhang 0036, Zhuolun He, Yibo Lin, Kai-Yuan Chao, Bei Yu 0001. [doi]
• On the Design of Novel Attention Mechanism for Enhanced Efficiency of TransformersSumit Kumar Jha 0001, Susmit Jha, Rickard Ewetz, Alvaro Velasquez. [doi]
• HyCiM: A Hybrid Computing-in-Memory QUBO Solver for General Combinatorial Optimization Problems with Inequality ConstraintsYu Qian, Zeyu Yang, Kai Ni 0004, Alptekin Vardar, Thomas Kämpfe, Xunzhao Yin. [doi]
• SC-GNN: A Communication-Efficient Semantic Compression for Distributed Training of GNNsJihe Wang, Ying Wu, Danghui Wang. [doi]
• Minimizing Labeling, Maximizing Performance: A Novel Approach to Nanoscale Scanning Electron Microscope (SEM) Defect SegmentationYibo Qiao, Weiping Xie, Shunyuan Lou, Qian Jin, Lichao Zeng, Yining Chen, Qi Sun, Cheng Zhuo. [doi]
• Invited: Human-Inspired Distributed Wearable AIShreyas Sen, Arunashish Datta. [doi]
• Unleashing the Power of T1-cells in SFQ Arithmetic CircuitsRassul Bairamkulov, Mingfei Yu, Giovanni De Micheli. [doi]
• Using Probabilistic Model Rollouts to Boost the Sample Efficiency of Reinforcement Learning for Automated Analog Circuit SizingMohsen Ahmadzadeh, Georges G. E. Gielen. [doi]
• Efficient Approximate Decomposition Solver using Ising ModelWeihua Xiao, Tingting Zhang, Xingyue Qian, Jie Han 0001, Weikang Qian. [doi]
• Late Breaking Results: On the One-Key Premise of Logic LockingYinghua Hu, Hari Cherupalli, Mike Borza, Deepak D. Sherlekar. [doi]
• Plug Your Volt: Protecting Intel Processors against Dynamic Voltage Frequency Scaling based Fault AttacksNimish Mishra, Rahul Arvind Mool, Anirban Chakraborty 0003, Debdeep Mukhopadhyay. [doi]
• Boolean Matching Reversible Circuits: Algorithm and ComplexityTian-Fu Chen, Jie-Hong Roland Jiang. [doi]
• GATE-SiP: Enabling Authenticated Encryption Testing in Systems-in-PackageGalib Ibne Haidar, Kimia Zamiri Azar, Hadi Mardani Kamali, Mark M. Tehranipoor, Farimah Farahmandi. [doi]
• Every Failure Is A Lesson: Utilizing All Failure Samples To Deliver Tuning-Free Efficient Yield EvaluationWei W. Xing, Yanfang Liu, Weijian Fan, Lei He. [doi]
• Late Breaking Results: Differential and Massively Parallel Sampling of SAT FormulasArash Ardakani, Minwoo Kang, Kevin He, Vighnesh M. Iyer, Suhong Moon, John Wawrzynek. [doi]
• A Cache/Algorithm Co-design for Parallel Real-Time Systems with Data Dependency on Multi/Many-core System-on-ChipsZhe Jiang 0004, Shuai Zhao 0004, Ran Wei, Yiyang Gao, Jing Li 0025. [doi]
• Conclave - Secure and Robust Cooperative Perception for Connected Autonomous Vehicle Using Authenticated Consensus and Trust ScoringEdward Andert, Francis Mendoza, Hans Walter Behrens, Aviral Shrivastava. [doi]
• SPFuzz: Stateful Path based Parallel Fuzzing for Protocols in Autonomous VehiclesJunze Yu, Zhengxiong Luo 0002, Fangshangyuan Xia, Yanyang Zhao, Heyuan Shi, Yu Jiang 0001. [doi]
• Less is More: Hop-Wise Graph Attention for Scalable and Generalizable Learning on CircuitsChenhui Deng, Zichao Yue, Cunxi Yu, Gokce Sarar, Ryan Carey, Rajeev Jain, Zhiru Zhang. [doi]
• NeuroSelect: Learning to Select Clauses in SAT SolversHongduo Liu, Peng Xu, Yuan Pu, Lihao Yin, Hui-Ling Zhen, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu 0001. [doi]
• MTL-Split: Multi-Task Learning for Edge Devices using Split ComputingLuigi Capogrosso, Enrico Fraccaroli, Samarjit Chakraborty, Franco Fummi, Marco Cristani. [doi]
• A Deep Reinforcement Learning based Online Scheduling Policy for Deep Neural Network Multi-Tenant Multi-Accelerator SystemsFrancesco Giulio Blanco, Enrico Russo 0002, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania. [doi]
• Energy-efficient SNN Architecture using 3nm FinFET Multiport SRAM-based CIM with Online LearningLucas Huijbregts, Hsiao-Hsuan Liu, Paul Detterer, Said Hamdioui, Amirreza Yousefzadeh, Rajendra Bishnoi. [doi]
• FinerDedup: Sifting Fingerprints for Efficient Data Deduplication on Mobile DevicesXianzhang Chen, Xingjie Zhou, Wei Li, Xi Yu, Duo Liu, Yujuan Tan, Ao Ren. [doi]
• Improving the Efficiency of In-Memory-Computing Macro with a Hybrid Analog-Digital Computing Mode for Lossless Neural Network InferenceQilin Zheng, Ziru Li, Jonathan Ku, Yitu Wang, Brady Taylor, Deliang Fan, Yiran Chen 0001. [doi]
• PMP: Pattern Morphing-based Memory Partitioning in High-Level SynthesisDajiang Liu, Decai Pan, Xiao-Xiong, Jiaxing Shang, Shouyi Yin. [doi]
• CAMO: Correlation-Aware Mask Optimization with Modulated Reinforcement LearningXiaoxiao Liang, Haoyu Yang, Kang Liu, Bei Yu 0001, Yuzhe Ma. [doi]
• DL2Fence: Integrating Deep Learning and Frame Fusion for Enhanced Detection and Localization of Refined Denial-of-Service in Large-Scale NoCsHaoyu Wang, Basel Halak, Jianjie Ren, Ahmad Atamli. [doi]
• GreenFPGA: Evaluating FPGAs as Environmentally Sustainable Computing SolutionsChetan Choppali Sudarshan, Aman Arora, Vidya A. Chhabria. [doi]
• CDLS: Constraint Driven Generative AI Framework for Analog Layout SynthesisPrasanth Mangalagiri, Lynn Qian, Farrukh Zafar, Praveen Mosalikanti, Phoebe Chang, Arun Kurian, Vinay Saripalli. [doi]
• Trapped by Your WORDs: (Ab)using Processor Exception for Generic Binary Instrumentation on Bare-metal Embedded DevicesShipei Qu, Xiaolin Zhang, Chi Zhang, Dawu Gu. [doi]
• HyCaMi: High-Level Synthesis for Cache Side-Channel MitigationHeiko Mantel, Joachim Schmidt 0006, Thomas Schneider 0003, Maximilian Stillger, Tim Weißmantel, Hossein Yalame. [doi]
• RL-PTQ: RL-based Mixed Precision Quantization for Hybrid Vision TransformersEunji Kwon, Minxuan Zhou, Weihong Xu, Tajana Rosing, Seokhyeong Kang. [doi]
• NSPG: Natural language Processing-based Security Property Generator for Hardware Security AssuranceXingyu Meng, Amisha Srivastava, Ayush Arunachalam, Avik Ray, Pedro Henrique Silva, Rafail Psiakis, Yiorgos Makris, Kanad Basu. [doi]
• Compact and Efficient CAM Architecture through Combinatorial Encoding and Self-Terminating Searching for In-Memory-Searching AcceleratorWeikai Xu, Jin Luo, Qianqian Huang, Ru Huang 0001. [doi]
• TraceFormer: S-parameter Prediction Framework for PCB Traces based on Graph TransformerDoyun Kim, Jaemin Park, Youngmin Oh, Bosun Hwang. [doi]
• Artisan: Automated Operational Amplifier Design via Domain-specific Large Language ModelZihao Chen, Jiangli Huang, Yiting Liu, Fan Yang 0001, Li Shang, Dian Zhou, Xuan Zeng 0001. [doi]
• FNM-Trans: Efficient FPGA-based Transformer Architecture with Full N: M SparsityManting Zhang, Jialin Cao, Kejia Shi, Keqing Zhao, Genhao Zhang, Jun Yu 0010, Kun Wang 0005. [doi]
• Whisper: Timing the Transient Execution to Leak Secrets and Break KASLRYu Jin, Chunlu Wang, Pengfei Qiu, Chang Liu, Yihao Yang, Hongpei Zheng, Yongqiang Lyu 0001, Xiaoyong Li, Gang Qu 0001, Dongsheng Wang 0002. [doi]
• Accelerating DTCO with a Sample-Efficient Active Learning Framework for TCAD Device ModelingChanwoo Park, Junghwan Park, Premkumar Vincent, Hyunbo Cho. [doi]
• Q-Pilot: Field Programmable Qubit Array Compilation with Flying AncillasHanrui Wang 0002, Daniel Bochen Tan, Pengyu Liu, Yilian Liu, Jiaqi Gu 0002, Jason Cong, Song Han 0003. [doi]
• MENDNet: Just-in-time Fault Detection and Mitigation in AI Systems with Uncertainty Quantification and Multi-Exit NetworksShamik Kundu, Mirazul Haque, Sanjay Das, Wei Yang 0013, Kanad Basu. [doi]
• VITA: ViT Acceleration for Efficient 3D Human Mesh Recovery via Hardware-Algorithm Co-DesignShilin Tian, Chase Szafranski, Ce Zheng, Fan Yao, Ahmed Louri, Chen Chen 0001, Hao Zheng 0005. [doi]
• GNN-assisted Back-side Clock Routing Methodology for Advance TechnologiesNesara Eranna Bethur, Pruek Vanna-Iampikul, Odysseas Zografos, Lingjun Zhu, Giuliano Sisto, Dragomir Milojevic, Alberto García Ortiz, Geert Hellings, Julien Ryckaert, Francky Catthoor, Sung Kyu Lim. [doi]
• RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language ModelYunda Tsai, Mingjie Liu, Haoxing Ren. [doi]
• GSPO: A Graph Substitution and Parallelization Joint Optimization Framework for DNN InferenceZheng Xu, Xu Dai, Shaojun Wei, Shouyi Yin, Yang Hu 0001. [doi]
• PPGNN: Fast and Accurate Privacy-Preserving Graph Neural Network Inference via Parallel and Pipelined Arithmetic-and-Logic FHE AcceleratorYuntao Wei, Xueyan Wang, Song Bian 0001, Yicheng Huang, Weisheng Zhao, Yier Jin. [doi]
• DEFA: Efficient Deformable Attention Acceleration via Pruning-Assisted Grid-Sampling and Multi-Scale Parallel ProcessingYansong Xu, Dongxu Lyu, Zhenyu Li, Yuzhou Chen, Zilong Wang, Gang Wang, Zhican Wang, Haomin Li, Guanghui He. [doi]
• ZeroTetris: A Spacial Feature Similarity-based Sparse MLP Engine for Neural Volume RenderingHaochuan Wan, Linjie Ma, Antong Li, Pingqiang Zhou, Jingyi Yu, Xin Lou. [doi]
• Invited: Leveraging Machine Learning for Quantum Compilation OptimizationXiangyu Ren, Tianyu Zhang, Xiong Xu, Yicong Zheng, Shengyu Zhang 0002. [doi]
• GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline ExplorationTong Qiao, Jianlei Yang 0001, Yingjie Qi, Ao Zhou, Chen Bai, Bei Yu 0001, Weisheng Zhao, Chunming Hu. [doi]
• Safe Controller Synthesis for Nonlinear Systems via Reinforcement Learning and PAC ApproximationXia Zeng, Banglong Liu, Zhenbing Zeng, Zhiming Liu 0001, Zhengfeng Yang. [doi]
• SARIS: Accelerating Stencil Computations on Energy-Efficient RISC-V Compute Clusters with Indirect Stream RegistersPaul Scheffler, Luca Colagrande, Luca Benini. [doi]
• Genetic Quantization-Aware Approximation for Non-Linear Operations in TransformersPingcheng Dong, Yonghao Tan, Dong Zhang, Tianwei Ni, Xuejiao Liu, Yu Liu 0007, Peng Luo, Luhong Liang, Shih-Yang Liu, Xijie Huang, Huaiyu Zhu 0004, Yun Pan, Fengwei An, Kwang-Ting Cheng. [doi]
• Evaluating the Security of Logic Locking on Deep Neural NetworksYou Li, Guannan Zhao, Yunqi He, Hai Zhou 0001. [doi]
• Invited: Challenges and Opportunities of Quantum Optimization in FinanceZichang He, Shouvanik Chakrabarti, Dylan Herman, Niraj Kumar, Changhao Li, Pierre Minssen, Pradeep Niroula, Ruslan Shaydulin, Yue Sun, Shree Hari Sureshbabu, Romina Yalovetzky, Marco Pistoia. [doi]
• SymPhase: Phase Symbolization for Fast Simulation of Stabilizer CircuitsWang Fang, Mingsheng Ying. [doi]
• PipeSSD: A Lock-free Pipelined SSD Firmware Design for Multi-core ArchitectureZelin Du, Shaoqi Li, Zixuan Huang, Jin Xue, Kecheng Huang, Tianyu Wang, Zili Shao. [doi]
• Late Breaking Results: Power Rail Routing for Advanced Multi-Layered Printed Circuit BoardsWei-Che Tseng, Zong-Ying Cai, Yi-Ping Huang, Yu-Hsiang Lo, Yao-Wen Chang. [doi]
• WinoGen: A Highly Configurable Winograd Convolution IP Generator for Efficient CNN Acceleration on FPGAMingjun Li, Pengjia Li, Shuo Yin, Shixin Chen, Beichen Li, Chong Tong, Jianlei Yang 0001, Tinghuan Chen, Bei Yu 0001. [doi]
• Late Breaking Results: Machine Learning Based Reference Ripple Error Suppression in Successive Approximation Register Analog-to-Digital ConvertersDebnath Maiti, Sumukh Prashant Bhanushali, Arindam Sanyal. [doi]
• Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum ComputersLudwig Schmid, Sunghye Park, Robert Wille. [doi]
• TAPMM: A Traffic-Aware Page Mapping Method for Multi-level NUMA SystemsFengkun Dong, Guoqing Xiao 0001, Haotian Wang 0006, Yikun Hu, Kenli Li 0001, Wangdong Yang. [doi]
• A Holistic Functionalization Approach to Optimizing Imperative Tensor Programs in Deep LearningJinming Ma, Xiuhong Li, Zihan Wang, Xingcheng Zhang, Shengen Yan, Yuting Chen 0001, Yueqian Zhang, Minxi Jin, Lijuan Jiang, Yun Liang 0001, Chao Yang, Dahua Lin. [doi]
• Towards Cost-Effective Real-Time High-Throughput End Station Design for Time-Sensitive Networking (TSN)Chuanyu Xue, Tianyu Zhang 0001, Song Han 0002. [doi]
• PHD: Parallel Huffman Decoder on FPGA for Extreme Performance and Energy EfficiencyYunkun Liao, Jingya Wu, Wenyan Lu, Xiaowei Li 0001, Guihai Yan. [doi]
• Voronoi Diagram-based Multiple Power Plane Generation on Redistribution Layers in 3D ICsChia-Wei Lin, Jing-Yao Weng, I-Te Lin, Ho-Chieh Hsu, Chia-Ming Liu, Mark Po-Hung Lin. [doi]
• Effective Quantum Resource Optimization via Circuit Resizing in BQSKitSiyuan Niu, Akel Hashim, Costin Iancu, Wibe Albert de Jong, Ed Younis. [doi]
• Planaria: Pattern Directed Cross-page Composite PrefetcherYuhang Liu 0001, Mingyu Chen. [doi]
• Alchemist: A Unified Accelerator Architecture for Cross-Scheme Fully Homomorphic EncryptionJianan Mu, Husheng Han, Shangyi Shi, Jing Ye 0001, Zizhen Liu, Shengwen Liang, Meng Li 0004, Mingzhe Zhang, Song Bian 0001, Xing Hu 0001, Huawei Li 0001, Xiaowei Li 0001. [doi]
• Defending against Adversarial Patches using Dimensionality ReductionNandish Chattopadhyay, Amira Guesmi, Muhammad Abdullah Hanif, Bassem Ouni, Muhammad Shafique 0001. [doi]
• SWAT: Scalable and Efficient Window Attention-based Transformers Acceleration on FPGAsZhenyu Bai, Pranav Dangi, Huize Li, Tulika Mitra. [doi]
• Massively Parallel AIG ResubstitutionYang Sun, Tianji Liu, Martin D. F. Wong, Evangeline F. Y. Young. [doi]
• ChatPattern: Layout Pattern Customization via Natural LanguageZixiao Wang, Yunheng Shen, Xufeng Yao, Wenqian Zhao, Yang Bai, Farzan Farnia, Bei Yu 0001. [doi]
• Series-Parallel Hybrid SOT-MRAM Computing-in-Memory Macro with Multi-Method Modulation for High Area and Energy EfficiencyWeiliang Huang, Jinyu Bai, Wang Kang, Zhaohao Wang, Kaihua Cao, Hongxi Liu, He Zhang 0011, Weisheng Zhao. [doi]
• Architectural Whispers: Robust Machine Learning Models Fingerprinting via Frequency Throttling Side-ChannelsNajmeh Nazari, Chongzhou Fang, Hosein Mohammadi Makrani, Behnam Omidi, Mahdi Eslamimehr, Setareh Rafatirad, Avesta Sasan, Hossein Sayadi, Khaled N. Khasawneh, Houman Homayoun. [doi]
• Duet: A Collaborative User Driven Recommendation System for Edge DevicesVidushi Goyal, Valeria Bertacco, Reetuparna Das. [doi]
• E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic SynthesisChen Chen, Guangyu Hu, Dongsheng Zuo, Cunxi Yu, Yuzhe Ma, Hongce Zhang. [doi]
• SpectraFlux: Harnessing the Flow of Multi-FPGA in Mass Spectrometry ClusteringTianqi Zhang, Neha Prakriya, Sumukh Pinge, Jason Cong, Tajana Rosing. [doi]
• Finding Bugs in RTL Descriptions: High-Level Synthesis to the RescueBaharealsadat Parchamdar, Benjamin Carrión Schäfer. [doi]
• MAFin: Maximizing Accuracy in FinFET based Approximated Real-Time ComputingShounak Chakraborty 0001, Sangeet Saha, Magnus Själander, Klaus D. McDonald-Maier. [doi]
• Net Resource Allocation: A Desirable Initial Routing StepZhisheng Zeng, Jikang Liu, Zhipeng Huang 0009, Ye Cai, Biwei Xie, Yungang Bao, Xingquan Li. [doi]
• Late Breaking Results: Extracting QNNs from NISQ Computers via Ensemble LearningZhenxiao Fu, Fan Chen 0001. [doi]
• EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space ExplorationHaoyi Zhang, Jiahao Song, Xiaohan Gao, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang 0001. [doi]
• PDRC: Package Design Rule Checking via GPU-Accelerated Geometric Intersection Algorithms for Non-Manhattan GeometryJiaxi Jiang, Lancheng Zou, Wenqian Zhao, Zhuolun He, Tinghuan Chen, Bei Yu 0001. [doi]
• HTAG-eNN: Hardening Technique with AND Gates for Embedded Neural NetworksWilfread Guillemé, Angeliki Kritikakou, Youri Helen, Cédric Killian, Daniel Chillet. [doi]
• Engineering an Efficient Preprocessor for Model CountingMate Soos, Kuldeep S. Meel. [doi]
• Disentangle, Align and Generalize: Learning A Timing Predictor from Different Technology NodesXinyun Zhang, Binwu Zhu, Fangzhou Liu, Ziyi Wang, Peng Xu, Hong Xu, Bei Yu 0001. [doi]
• CircuitVAE: Efficient and Scalable Latent Circuit OptimizationJialin Song, Aidan M. Swope, Robert Kirby 0001, Rajarshi Roy 0003, Saad Godil, Jonathan Raiman, Bryan Catanzaro. [doi]
• Cross-Layer Reliability Evaluation and Efficient Hardening of Large Vision Transformers ModelsLucas Roquet, Fernando Fernandes dos Santos, Paolo Rech, Marcello Traiola, Olivier Sentieys, Angeliki Kritikakou. [doi]
• CSTrans-OPU: An FPGA-based Overlay Processor with Full Compilation for Transformer Networks via Sparsity ExplorationYueyin Bai, Keqing Zhao, Yang Liu, Hongji Wang, Hao Zhou, Xiaoxing Wu, Jun Yu 0010, Kun Wang 0005. [doi]
• G2PM: Performance Modeling for ACAP Architecture with Dual-Tiered Graph Representation LearningTuo Dai, Bizhao Shi, Guojie Luo. [doi]
• MERSIT: A Hardware-Efficient 8-bit Data Format with Enhanced Post-Training Quantization DNN AccuracyNguyen-Dong Ho, Gyujun Jeong, Cheol-Min Kang, Seungkyu Choi, Ik Joon Chang. [doi]
• FCM: A Fusion-aware Wire Cutting Approach for Measurement-based Quantum ComputingZewei Mo, Yingheng Li, Aditya Pawar, Xulong Tang, Jun Yang 0002, Youtao Zhang. [doi]
• How to Steal CPU Idle Time When Synchronous I/O Mode Becomes PromisingChun-Feng Wu, Yuan-Hao Chang 0001, Ming-Chang Yang, Tei-Wei Kuo. [doi]
• CAMPER: Exploring the Potential of Content Addressable Memory for 3D Point Cloud Efficient Range SearchJiapei Zheng, Lizhou Wu, Yutong Su, Jingyi Wang, Zhangcheng Huang, Chixiao Chen, Qi Liu 0010. [doi]
• Gypsophila: A Scalable and Bandwidth-Optimized Multi-Scalar Multiplication ArchitectureChangxu Liu, Hao Zhou 0015, Lan Yang, Jiamin Xu, Patrick Dai, Fan Yang 0001. [doi]
• Hynify: A High-throughput and Unified Accelerator for Multi-Mode Nonparametric StatisticsKaihong Huang, Dian Shen, Zhaoyang Wang, Juntao Yang, Beilun Wang. [doi]
• Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation frameworkKaiyan Chang, Kun Wang, Nan Yang, Ying Wang 0001, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li 0001, Xiaowei Li 0001. [doi]
• Synthesis of Resource-Efficient Superconducting Circuits with Clock-Free Alternating LogicJennifer Volk, Panagiotis Papanikolaou, Georgios Zervakis 0001, Georgios Tzimpragos. [doi]
• PIVOT- Input-aware Path Selection for Energy-efficient ViT InferenceAbhishek Moitra, Abhiroop Bhattacharjee, Priyadarshini Panda. [doi]
• Algorithm-Hardware Co-Design of Distribution-Aware Logarithmic-Posit Encodings for Efficient DNN InferenceAkshat Ramachandran, Zishen Wan, Geonhwa Jeong, John Gustafson, Tushar Krishna. [doi]
• Look Before You Access: Efficient Heap Memory Safety for Embedded Systems on ARMv8-MJeonghwan Kang, Jaeyeol Park, Jiwon Seo, Donghyun Kwon. [doi]
• MCU-Wide Timing Side Channels and Their DetectionJohannes Müller 0006, Anna Lena Duque Antón, Lucas Deutschmann, Dino Mehmedagic, Cristiano Rodrigues, Daniel Oliveira 0003, Mohammad Rahmani Fadiheh, Keerthikumara Devarajegowda, Sandro Pinto 0001, Dominik Stoffel, Wolfgang Kunz. [doi]
• Redistribution Layer Routing with Dynamic Via Insertion Under Irregular Via StructuresJe-Wei Chuang, Zong-Han Wu, Bo-Ying Huang, Yao-Wen Chang. [doi]
• Execution Sequence Optimization for Processing In-Memory using Parallel Data PreparationMuhammad Rashedul Haq Rashed, Sven Thijssen, Dominic Simon, Sumit Jha, Rickard Ewetz. [doi]
• TraiNDSim: A Simulation Framework for Comprehensive Performance Evaluation of Neuromorphic Devices for On-Chip TrainingDonghyeok Heo, Hyeonsu Bang, Jong Hwan Ko. [doi]
• FRM-CIM: Full-Digital Recursive MAC Computing in Memory System Based on MRAM for Neural Network ApplicationsJinkai Wang, Zekun Wang, Bojun Zhang, Zhengkun Gu, Youxiang Chen, Weisheng Zhao, Yue Zhang 0010. [doi]
• Late Breaking Results: Fast System Technology Co-Optimization Framework for Emerging Technology Based on Graph Neural NetworksTianliang Ma, Guangxi Fan, Xuguang Sun, Zhihui Deng, Kain Lu Low, Leilai Shao. [doi]
• HiRISE: High-Resolution Image Scaling for Edge ML via In-Sensor Compression and Selective ROIBrendan Reidy, Sepehr Tabrizchi, Mohammadreza Mohammadi, Shaahin Angizi, Arman Roohi, Ramtin Zand. [doi]
• APTQ: Attention-aware Post-Training Mixed-Precision Quantization for Large Language ModelsZiyi Guan, Hantao Huang, Yupeng Su, Hong Huang, Ngai Wong, Hao Yu 0001. [doi]
• Lost and Found in Speculation: Hybrid Speculative Vulnerability DetectionMohamadreza Rostami, Shaza Zeitouni, Rahul Kande, Chen Chen, Pouya Mahmoody, Jeyavijayan Rajendran, Ahmad-Reza Sadeghi. [doi]
• Invited: Conformal Inference meets Evidential Learning: Distribution-Free Uncertainty Quantification with Epistemic and Aleatoric SeparabilityAlex Christopher Stutts, Divake Kumar, Theja Tulabandhula, Amit Ranjan Trivedi. [doi]
• Triplet Network-Based DNA Encoding for Enhanced Similarity Image RetrievalTakefumi Koike, Hiromitsu Awano, Takashi Sato 0001. [doi]
• EOS: An Energy-Oriented Attack Framework for Spiking Neural NetworksNing Yang, Fangxin Liu, Zongwu Wang, Haomin Li, Zhuoran Song, Songwen Pei, Li Jiang 0002. [doi]
• Late Breaking Results: Mixed-Cell-Height Detailed Placement under Multi-Cell Spacing ConstraintsBenchao Zhu, Zheng Zeng, Jianli Chen. [doi]
• Fused Sampling and Grouping with Search Space Reduction for Efficient Point Cloud AccelerationHyunsung Yoon, Jae-Joon Kim. [doi]
• Data-Efficient Conformalized Interval Prediction of Minimum Operating Voltage Capturing Process VariationsYuxuan Yin, Rebecca Chen, Chen He, Peng Li. [doi]
• INSPIRE: Accelerating Deep Neural Networks via Hardware-friendly Index-Pair EncodingFangxin Liu, Ning Yang, Zhiyan Song, Zongwu Wang, Haomin Li, Shiyuan Huang, Zhuoran Song, Songwen Pei, Li Jiang 0002. [doi]
• Ink: Efficient Incremental k-Critical Path GenerationChe Chang, Tsung-Wei Huang, Dian-Lun Lin, Guannan Guo, Shiju Lin. [doi]
• Lightator: An Optical Near-Sensor Accelerator with Compressive Acquisition Enabling Versatile Image ProcessingMehrdad Morsali, Brendan Reidy, Deniz Najafi, Sepehr Tabrizchi, Mohsen Imani, Mahdi Nikdast, Arman Roohi, Ramtin Zand, Shaahin Angizi. [doi]
• Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstructured Bit-Level SparsityCenlin Duan, Jianlei Yang 0001, Yiou Wang, Yikun Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao. [doi]
• Levioso: Efficient Compiler-Informed Secure SpeculationAli Hajiabadi, Archit Agarwal, Andreas Diavastos, Trevor E. Carlson. [doi]
• Graph-Transformer-based Surrogate Model for Accelerated Converter Circuit Topology DesignShaoze Fan, Haoshu Lu, Shun Zhang, Ningyuan Cao, Xin Zhang 0025, Jing Li 0025. [doi]
• PONO: Power Optimization with Near Optimal SMT-based Sub-circuit GenerationSunan Zou, Guojie Luo. [doi]
• FLAME: Fully Leveraging MoE Sparsity for Transformer on FPGAXuanda Lin, Huinan Tian, Wenxiao Xue, Lanqi Ma, Jialin Cao, Manting Zhang, Jun Yu 0010, Kun Wang 0005. [doi]
• EPIM: Efficient Processing-In-Memory Accelerators based on EpitomeChenyu Wang, Zhen Dong 0003, Daquan Zhou, Zhenhua Zhu, Yu Wang 0002, Jiashi Feng, Kurt Keutzer. [doi]
• LLM-MARK: A Computing Framework on Efficient Watermarking of Large Language Models for Authentic Use of Generative AI at Local DevicesShiyu Guo, Yuhao Ju, Xi Chen, Jie Gu. [doi]
• ReCG: ReRAM-Accelerated Sparse Conjugate GradientMingjia Fan, Xiaoming Chen, Dechuang Yang, Zhou Jin 0001, Weifeng Liu 0002. [doi]
• MoNDE: Mixture of Near-Data Experts for Large-Scale Sparse ModelsTaehyun Kim, Kwanseok Choi, Youngmock Cho, JaeHoon Cho, Hyuk-Jae Lee, Jaewoong Sim. [doi]
• Energy Efficient Dual Designs of FeFET-Based Analog In-Memory Computing with Inherent Shift-Add CapabilityZeyu Yang, Qingrong Huang, Yu Qian, Kai Ni 0004, Thomas Kämpfe, Xunzhao Yin. [doi]
• Double-Win NAS: Towards Deep-to-Shallow Transformable Neural Architecture Search for Intelligent Embedded SystemsXiangzhong Luo, Di Liu 0002, Hao Kong, Shuo Huai, Weichen Liu. [doi]
• ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAMJonathan Hao-Cheng Ku, Junyao Zhang, Haoxuan Shan, Saichand Samudrala, Jiawen Wu, Qilin Zheng, Ziru Li, Jeyavijayan Rajendran, Yiran Chen 0001. [doi]
• AIG-CIM: A Scalable Chiplet Module with Tri-Gear Heterogeneous Compute-in-Memory for Diffusion AccelerationYiqi Jing, Meng Wu, Jiaqi Zhou, Yiyang Sun, Yufei Ma 0002, Ru Huang 0001, Tianyu Jia, Le Ye. [doi]
• Beyond Conventional Defenses: Proactive and Adversarial-Resilient Hardware Malware Detection using Deep Reinforcement LearningZhangying He, Houman Homayoun, Hossein Sayadi. [doi]
• Sting: Near-storage accelerator framework for scalable triangle counting and beyondSeongyoung Kang, Sang-Woo Jun. [doi]
• Late Breaking Results: Modern Automatic PCB Placement with Complex ConstraintsChien-Hao Tsou, Sheng-Yah Lin, Wei-Chen Hung, Yao-Wen Chang. [doi]
• GDR-HGNN: A Heterogeneous Graph Neural Networks Accelerator Frontend with Graph Decoupling and RecouplingRunzhen Xue, Mingyu Yan, Dengke Han, Yihan Teng, Zhimin Tang, Xiaochun Ye, Dongrui Fan. [doi]
• A HW/SW Co-Design of Video Dehazing Accelerator Using Decoupled Local Atmospheric Light PriorYanjie Tan, Yifu Zhu, Zhaoyang Huang, Feiteng Nie, Huailiang Tan. [doi]
• Multi-Resonance Mesh-Based Wavelength-Routed Optical Networks-on-ChipZhidan Zheng, Liaoyuan Cheng, Kanta Arisawa, Qingyu Li, Alexandre Truppel, Shigeru Yamashita, Tsun-Ming Tseng, Ulf Schlichtmann. [doi]
• LIVAK: A High-Performance In-Memory Learned Index for Variable-Length KeysZhaole Chu, Zhou Zhang 0006, Peiquan Jin, Xiaoliang Wang, Yongping Luo, Xujian Zhao. [doi]
• Partitioned Scheduling and Parallelism Assignment for Real-Time DNN Inference Tasks on Multi-TPUBinqi Sun, Tomasz Kloda, Chu-ge Wu, Marco Caccamo. [doi]
• EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design MigrationHanda Sun, Zhaori Bi, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang 0001, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng 0001. [doi]
• HEIRS: Hybrid Three-Dimension RRAM- and SRAM-CIM Architecture for Multi-task Transformer AccelerationLiukai Xu, Shuai Yuan, Dengfeng Wang, Yiming Chen, Xueqing Li, Yanan Sun 0003. [doi]
• MoC: A Morton-Code-Based Fine-Grained Quantization for Accelerating Point Cloud Neural NetworksXueyuan Liu, Zhuoran Song, Hao Chen, Xing Li, Xiaoyao Liang. [doi]
• Late Breaking Results: Circuit-Algorithm Co-design for Learnable Audio Analog Front-EndJinhai Hu, Zhongyi Zhang, Cong Sheng Leow, Wang Ling Goh, Yuan Gao 0011. [doi]
• AdderNet 2.0: Optimal FPGA Acceleration of AdderNet with Activation-Oriented Quantization and Fused Bias Removal based Memory OptimizationYunxiang Zhang, Omar Al Kailani, Wenfeng Zhao. [doi]
• Efficient Memory Integration: MRAM-SRAM Hybrid Accelerator for Sparse On-Device LearningFan Zhang, Amitesh Sridharan, Wilman Tsai, Yiran Chen 0001, Shan X. Wang, Deliang Fan. [doi]
• Graph Neural Networks Automated Design and Deployment on Device-Edge Co-Inference SystemsAo Zhou, Jianlei Yang 0001, Tong Qiao, Yingjie Qi, Zhi Yang, Weisheng Zhao, Chunming Hu. [doi]
• PT-Map: Efficient Program Transformation Optimization for CGRA MappingBizhao Shi, Tuo Dai, Jiaxi Zhang 0001, Xuechao Wei, Guojie Luo. [doi]
• Maintaining Sanity: Algorithm-based Comprehensive Fault Tolerance for CNNsJinhyo Jung, Hwisoo So, Woobin Ko, Sumedh Shridhar Joshi, Yebon Kim, Yohan Ko, Aviral Shrivastava, Kyoungwoo Lee. [doi]
• ThermalScope: A Practical Interrupt Side Channel Attack Based on Thermal Event InterruptsXin Zhang, Zhi Zhang 0001, Qingni Shen, Wenhao Wang 0001, Yansong Gao 0001, Zhuoxi Yang, Zhonghai Wu. [doi]
• Balloon-ZNS: Constructing High-Capacity and Low-Cost ZNS SSDs with Built-in CompressionYu Wang, Zibin Sun, You Zhou 0009, Tao Lu, Changsheng Xie, Fei Wu. [doi]
• VVIP: Versatile Vertical Indexing Processor for Edge ComputingHyungjoon Bae, Da Won Kim, Wanyeong Jung. [doi]
• Neural Barrier Certificates Synthesis of NN-Controlled Continuous Systems via Counterexample-Guided LearningHanrui Zhao, Niuniu Qi, Mengxin Ren, Xia Zeng, Zhenbing Zeng, Zhengfeng Yang. [doi]
• Beyond Inference: Performance Analysis of DNN Server Overheads for Computer VisionAhmed F. AbouElhamayed, Susanne Balle, Deshanand P. Singh, Mohamed S. Abdelfattah. [doi]
• Digital CIM with Noisy SRAM Bit: A Compact Clustered Annealer for Large-Scale Combinatorial OptimizationAnni Lu, Junmo Lee, Yuan-Chun Luo, Hai Li 0008, Ian A. Young, Shimeng Yu. [doi]
• An Efficient Hardware Accelerator Design for Dynamic Graph Convolutional Network (DGCN) InferenceYingnan Zhao, Ke Wang 0030, Jiaqi Yang, Ahmed Louri. [doi]
• EMOGen: Enhancing Mask Optimization via Pattern GenerationSu Zheng, Yuzhe Ma, Bei Yu 0001, Martin D. F. Wong. [doi]
• MoteNN: Memory Optimization via Fine-grained Scheduling for Deep Neural Networks on Tiny DevicesRenze Chen, Zijian Ding, Size Zheng 0001, Meng Li 0004, Yun Liang 0001. [doi]
• Enabling Low Latency for ECQF based Flow Aggregation Scheduling in Time-Sensitive NetworkingPing Liu, Tong Zhang 0018, Xiaoqin Feng, Yanying Ma, Fengyuan Ren. [doi]
• FHE-CGRA: Enable Efficient Acceleration of Fully Homomorphic Encryption on CGRAsMiaomiao Jiang, Yilan Zhu, Honghui You, Cheng Tan 0002, Zhaoying Li, Jiming Xu, Lei Ju 0001. [doi]
• EGMA: Enhancing Data Reuse and Workload Balancing in Message Passing GNN Acceleration via Gram Matrix OptimizationFangzhou Ye, Lingxiang Yin, Amir Ghazizadeh Ahsaei, Hao Zheng 0005. [doi]
• Enabling On-Device Large Language Model Personalization with Self-Supervised Data Selection and SynthesisRuiyang Qin, Jun Xia, Zhenge Jia, Meng Jiang 0001, Ahmed Abbasi, Peipei Zhou 0001, Jingtong Hu, Yiyu Shi 0001. [doi]
• CAP: A General Purpose Computation-in-memory with Content Addressable Processing ParadigmZhiheng Yue, Shaojun Wei, Yang Hu 0001, Shouyi Yin. [doi]
• A Real-time Execution System of Multimodal Transformer through PIM-GPU CollaborationShengyi Ji, Chubo Liu, Yan Ding 0004, Qing Liao, Zhuo Tang. [doi]
• TBNet: A Neural Architectural Defense Framework Facilitating DNN Model Protection in Trusted Execution EnvironmentsZiyu Liu, Tong Zhou 0002, Yukui Luo, Xiaolin Xu 0001. [doi]
• Leanor: A Learning-Based Accelerator for Efficient Approximate Nearest Neighbor Search via Reduced Memory AccessYi Wang 0003, Huan Liu, Jianan Yuan, Jiaxian Chen, Tianyu Wang, Chenlin Ma, Rui Mao 0001. [doi]
• DNN-Defender: A Victim-Focused In-DRAM Defense Mechanism for Taming Adversarial Weight Attack on DNNsRanyang Zhou, Sabbir Ahmed, Adnan Siraj Rakin, Shaahin Angizi. [doi]
• Invited: Neuromorphic Vision Modalities in the NimbleAI 3D ChipXabier Iturbe, Bernabé Linares-Barranco, Sio-Hoi Ieng, Arne Erdmann, Luca Peres, Oliver Rhodes, Rafael Tornero, Manolis Sifalakis, Marcel D. van de Burgwal, Amirreza Yousefzadeh, Maha Kooli, Riccardo Alidori, Pavel Zaykov. [doi]
• Late Breaking Results: Routability-Driven FPGA Macro Placement Considering Complex Cascade Shape and Region ConstraintsHao Gu, Jian Gu, Keyu Peng, Jun Yang, Ziran Zhu. [doi]
• Bitwise Adaptive Early Termination in Hyperdimensional Computing InferenceWei-Chen Chen, H.-S. Philip Wong, Sara Achour. [doi]
• LVF2: A Statistical Timing Model based on Gaussian Mixture for Yield Estimation and Speed BinningJunzhuo Zhou, Li Huang, Haoxuan Xia, Yihui Cai, Leilei Jin, Xiao Shi, Wei W. Xing, Ting-Jung Lin, Lei He. [doi]
• PowerRChol: Efficient Power Grid Analysis Based on Fast Randomized Cholesky FactorizationZhiqiang Liu, Wenjian Yu. [doi]
• Co-Via: A Video Frame Interpolation Accelerator Exploiting Codec Information ReuseHaishuang Fan, Qichu Sun, Jingya Wu, Wenyan Lu, Xiaowei Li 0001, Guihai Yan. [doi]
• ChatCPU: An Agile CPU Design and Verification Platform with LLMXi Wang 0009, Gwok-Waa Wan, Sam-Zaak Wong, Layton Zhang, Tianyang Liu, Qi Tian, JianMin Ye. [doi]
• Sharry: An Efficient and Sharing Far Memory SystemChen Chen, Yuhang Huang, ShuiGuang Deng, Jianwei Yin, Xinkui Zhao. [doi]
• High-Performance and Resource-Efficient Dynamic Memory Management in High-Level SynthesisQinggang Wang, Long Zheng 0003, Zhaozeng An, Haoqin Huang, Haoran Zhu, Yu Huang 0013, Pengcheng Yao, Xiaofei Liao, Hai Jin 0001. [doi]
• CDS: An Anti-Aging Calibratable Digital Sensor for Detecting Multiple Types of Fault Injection AttacksZhiyuan Chen, Kun Yang, Kui Ren 0001. [doi]
• Deep Reorganization: Retaining Residuals in TinyMLHashan Roshantha Mendis, Chih-Kai Kang, Chun-Han Lin, Ming-Syan Chen, Pi-Cheng Hsiu. [doi]
• Toward High-Accuracy, Programmable Extreme-Edge Intelligence for Neuromorphic Vision Sensors utilizing Magnetic Domain Wall Motion-based MTJMd. Abdullah-Al Kaiser, Gourav Datta, Peter A. Beerel, Akhilesh R. Jaiswal. [doi]
• BNN-YEO: an efficient Bayesian Neural Network for yield estimation and optimizationZhenxing Dou, Ming Cheng, Ming Jia, Peng Wang 0022. [doi]
• HAIL-DIMM: Host Access Interleaved with Near-Data Processing on DIMM-based Memory SystemMinkyu Lee, Sang-Seol Lee, KyungHo Kim, Eunchong Lee, Sung-Joon Jang. [doi]
• Accel-NASBench: Sustainable Benchmarking for Accelerator-Aware NASAfzal Ahmad, Linfeng Du, Zhiyao Xie, Wei Zhang. [doi]
• RTGA: A Redundancy-free Accelerator for High-Performance Temporal Graph Neural Network InferenceHui Yu, Yu Zhang 0027, Andong Tan, Chenze Lu, Jin Zhao 0003, Xiaofei Liao, Hai Jin 0001, Haikun Liu. [doi]
• SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operations in NVMsHamid Farzaneh, João Paulo C. de Lima, Ali Nezhadi Khelejani, Asif Ali Khan, Mahta Mayahinia, Mehdi B. Tahoori, Jerónimo Castrillón. [doi]
• Invited: Automatic Hardware/Software Design for High-Speed Autonomous Unmanned Aerial Vehicles Guided by a Flight ModelYuanfan Xu, Jincheng Yu, Suquan Zhang, Yunfei Xiang, Hongyang Jia, Yu Wang 0002. [doi]
• Crop: An Analytical Cost Model for Cross-Platform Performance Prediction of Tensor ProgramsXinyu Sun, Yu Zhang, Shuo Liu, Yi Zhai. [doi]
• NOFIS: Normalizing Flow for Rare Circuit Failure AnalysisZhengqi Gao, Dinghuai Zhang, Luca Daniel, Duane S. Boning. [doi]
• IG-CRM: Area/Energy-Efficient IGZO-Based Circuits and Architecture Design for Reconfigurable CIM/CAM ApplicationsZeyu Guo 0002, Jinshan Yue, Shengzhe Yan, Zhuoyu Dai, Xiangqu Fu, Zhaori Cong, Zening Niu, Ke Hu, Lihua Xu, Jiawei Wang, Lingfei Wang, Guanhua Yang, Di Geng, Ling Li. [doi]
• SMORE: Similarity-Based Hyperdimensional Domain Adaptation for Multi-Sensor Time Series ClassificationJunyao Wang 0001, Mohammad Abdullah Al Faruque. [doi]
• SpARC: Token Similarity-Aware Sparse Attention Transformer Accelerator via Row-wise ClusteringHan Cho, Dongjun Kim, Seungeon Hwang, Jongsun Park 0001. [doi]
• GCS-Timer: GPU-Accelerated Current Source Model Based Static Timing AnalysisShiju Lin, Guannan Guo, Tsung-Wei Huang, Weihua Sheng, Evangeline F. Y. Young, Martin D. F. Wong. [doi]
• Towards High-Performance Virtual Platforms: A Parallelization Strategy for SystemC TLM-2.0 CPU ModelsNils Bosbach, Niko Zurstraßen, Rebecca Pelke, Lukas Jünger 0001, Jan Henrik Weinstock, Rainer Leupers. [doi]
• ScaleFold: Reducing AlphaFold Initial Training Time to 10 HoursFeiwen Zhu, Arkadiusz Nowaczynski, Rundong Li, Jie Xin, Yifei Song, Michal Marcinkiewicz, Sukru Burc Eryilmaz, Jun Yang, Michael Andersch. [doi]
• SGM-PINN: Sampling Graphical Models for Faster Training of Physics-Informed Neural NetworksJohn Anticev, Ali Aghdaei, Wuxinlin Cheng, Zhuo Feng. [doi]
• ICGMM: CXL-enabled Memory Expansion with Intelligent Caching Using Gaussian Mixture ModelHanqiu Chen, Yitu Wang, Luis Vitório Cargnini, Mohammadreza Soltaniyeh, Dongyang Li, Gongjin Sun, Pradeep Subedi, Andrew Chang, Yiran Chen 0001, Cong Hao. [doi]
• CFTCG: Test Case Generation for Simulink Model through Code Based FuzzingZhuo Su 0005, Zehong Yu, Dongyan Wang, Rui Wang 0024, Yang Tao, Yu Jiang 0001. [doi]
• CLUMAP: Clustered Mapper for CGRAs with PredicationOmar Ragheb, Jason Helge Anderson. [doi]
• Advanced Reinforcement Learning Algorithms to Optimize Design VerificationZahra Aref, Rohit Suvarna, Bill Hughes, Sandeep Srinivasan, Narayan B. Mandayam. [doi]
• Chiplever: Towards Effortless Extension of Chiplet-based System for FHEYibo Du, Ying Wang 0001, Bing Li 0017, Fuping Li, Shengwen Liang, Huawei Li 0001, Xiaowei Li 0001, Yinhe Han 0001. [doi]
• Hyb-Learn: A Framework for On-Device Self-Supervised Continual Learning with Hybrid RRAM/SRAM MemoryFan Zhang, Li Yang 0009, Deliang Fan. [doi]
• Older and Wiser: The Marriage of Device Aging and Intellectual Property Protection of DNNsNing Lin, Shaocong Wang, Yue Zhang, Yangu He, Kwunhang Wong, Arindam Basu, Dashan Shang, Xiaoming Chen, Zhongrui Wang. [doi]
• Dyn-Bitpool: A Two-sided Sparse CIM Accelerator Featuring a Balanced Workload Scheme and High CIM Macro UtilizationXujiang Xiang, Zhiheng Yue, Yuxuan Li, Liuxin Lv, Shaojun Wei, Yang Hu 0001, Shouyi Yin. [doi]
• InterArch: Video Transformer Acceleration via Inter-Feature Deduplication with Cube-based DataflowXuhang Wang, Zhuoran Song, Xiaoyao Liang. [doi]
• SpREM: Exploiting Hamming Sparsity for Fast Quantum Readout Error MitigationHanyu Zhang, Liqiang Lu, Siwei Tan, Size Zheng 0001, Jia Yu, Jianwei Yin. [doi]
• Partially-Structured Transformer Pruning with Patch-Limited XOR-Gate Compression for Stall-Free Sparse-Model AccessYounghoon Byun, Youngjoo Lee. [doi]
• Efficient Open Modification Spectral Library Searching in High-Dimensional Space with Multi-Level-Cell MemoryKeming Fan, Wei-Chen Chen, Sumukh Pinge, H.-S. Philip Wong, Tajana Rosing. [doi]
• Invited: Graph Learning for Parameter Prediction of Quantum Approximate Optimization AlgorithmZhiding Liang, Gang Liu, Zheyuan Liu 0010, Jinglei Cheng, Tianyi Hao 0003, Kecheng Liu, Hang Ren, Zhixin Song, Ji Liu, Fanny Ye, Yiyu Shi 0001. [doi]
• Invited: The Magnificent Seven Challenges and Opportunities in Domain-Specific Accelerator Design for Autonomous SystemsSabrina M. Neuman, Brian Plancher, Vijay Janapa Reddi. [doi]
• Late Breaking Results: Language-level QoR modeling for High-Level SynthesisDimosthenis Masouros, Aggelos Ferikoglou, Georgios Zervakis 0001, Sotirios Xydis, Dimitrios Soudris. [doi]
• ElasticZRAM: Revisiting ZRAM for Swapping on Mobile DevicesWentong Li, Dingcui Yu, Yunpeng Song, Longfei Luo, Liang Shi. [doi]
• DACPara: A Divide-and-Conquer Parallel Approach for High-Quality Logic Rewriting in Large-Scale CircuitsNanjiang Qu, Cong Tian, Zhenhua Duan. [doi]
• MAUnet: Multiscale Attention U-Net for Effective IR Drop PredictionMingyue Wang, Yuanqing Cheng, Yage Lin, Kelin Peng, Shunchuan Yang, Zhou Jin 0001, Wei W. Xing. [doi]
• Uncovering Software-Based Power Side-Channel Attacks on Apple M1/M2 SystemsNikhil Chawla, Chen Liu 0013, Abhishek Chakraborty, Igor Chervatyuk, Thais Moreira Hamasaki, Ke Sun, Henrique Kawakami. [doi]
• Learn-by-Compare: Analog Performance Prediction using Contrastive Regression with Design KnowledgeZihu Wang, Karthik Somayaji N. S., Peng Li. [doi]
• Invited: Neuromorphic Architectures Based on Augmented Silicon Photonics PlatformsMatej Hejda, Federico Marchesin, George Papadimitriou 0001, Dimitris Gizopoulos, Benoît Charbonnier, Régis Orobtchouk, Peter Bienstman, Thomas Van Vaerenbergh, Fabio Pavanello. [doi]
• HiLight: A Comprehensive Framework for High-Performance and Lightweight Scalability in Surface Code CommunicationSunghye Park, Dohun Kim, Seokhyeong Kang. [doi]
• LEAF: An Adaptation Framework against Noisy Data on Edge through Ultra Low-Cost TrainingZihan Xia, Jinwook Kim, Mingu Kang. [doi]
• OTPlace-Vias: A Novel Optimal Transport Based Method for High Density Vias Placement in 3D CircuitsLin Chen, Qi Xu, Hu Ding. [doi]
• AdaptiveFL: Adaptive Heterogeneous Federated Learning for Resource-Constrained AIoT SystemsChentao Jia, Ming Hu 0003, Zekai Chen, Yanxin Yang, Xiaofei Xie, Yang Liu, Mingsong Chen. [doi]
• Addition is Most You Need: Efficient Floating-Point SRAM Compute-in-Memory by Harnessing Mantissa AdditionWeidong Cao, Jian Gao, Xin Xin 0008, Xuan Zhang. [doi]
• CDA-GNN: A Chain-driven Accelerator for Efficient Asynchronous Graph Neural NetworkHui Yu, Yu Zhang 0027, Ligang He, Donghao He, Qikun Li, Jin Zhao 0003, Xiaofei Liao, Hai Jin 0001, Lin Gu 0002, Haikun Liu. [doi]
• Formally Verifying Arithmetic Chisel Designs for All Bit Widths at OnceWeizhi Feng, Yicheng Liu, Jiaxiang Liu 0001, David N. Jansen, Lijun Zhang 0001, Zhilin Wu. [doi]
• Explainable Fuzzy Neural Network with Multi-Fidelity Reinforcement Learning for Micro-Architecture Design Space ExplorationHanwei Fan, Ya Wang, Sicheng Li, Tingyuan Liang, Wei Zhang 0012. [doi]
• Oltron: Algorithm-Hardware Co-design for Outlier-Aware Quantization of LLMs with Inter-/Intra-Layer AdaptationChenhao Xue, Chen Zhang 0001, Xun Jiang 0002, Zhutianya Gao, Yibo Lin, Guangyu Sun 0003. [doi]
• S2RAM PUF: An Ultra-low Power Subthreshold SRAM PUF with Zero Bit Error RateLi Ni, Jiliang Zhang 0002. [doi]
• Control Flow Divergence Optimization by Exploiting Tensor CoresWeiguang Pang, Xu Jiang 0004, Songran Liu, Lei Qiao, Kexue Fu, Longxiang Gao, Wang Yi 0001. [doi]
• Mixed-Size 3D Analytical Placement with Heterogeneous Technology NodesYan-Jen Chen, Cheng-Hsiu Hsieh, Po-Han Su, Shao-Hsiang Chen, Yao-Wen Chang. [doi]
• PVTSizing: A TuRBO-RL-Based Batch-Sampling Optimization Framework for PVT-Robust Analog Circuit SynthesisZichen Kong, Xiyuan Tang, Wei Shi, Yiheng Du, Yibo Lin, Yuan Wang 0001. [doi]
• Advanced gate-level glitch modeling using ANNsAnastasis Vagenas, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis. [doi]
• Performance-driven Analog Routing via Heterogeneous 3DGNN and Potential RelaxationPeng Xu, Guojin Chen, Keren Zhu 0001, Tinghuan Chen, Tsung-Yi Ho, Bei Yu 0001. [doi]
• Garrison: A High-Performance GPU-Accelerated Inference System for Adversarial Ensemble DefenseYan Wang, Xingbin Wang, Zechao Lin, Yulan Su, Sisi Zhang, Rui Hou 0001, Dan Meng. [doi]
• Thermal Resistance Network Derivative (TREND) Model for Efficient Thermal Simulation and Design of ICs and PackagesShunxiang Lan, Min Tang, Liang Chen 0025, Junfa Mao. [doi]
• RISC-V Instruction Set Extensions for Multi-Precision Integer Arithmetic: A Case Study on Post-Quantum Key Exchange Using CSIDH-512Hao Cheng 0009, Georgios Fotiadis, Johann Großschädl, Daniel Page, Thinh Hung Pham, Peter Y. A. Ryan. [doi]
• An IP-Agnostic Foundational Cell Array Offering Supply Chain SecurityChristopher Talbot, Deepali Garg, Lawrence T. Pileggi, Kenneth Mai. [doi]
• LLM-HD: Layout Language Model for Hotspot Detection with GDS Semantic EncodingYuyang Chen, Yiwen Wu, Jingya Wang, Tao Wu, Xuming He 0001, Jingyi Yu, Hao Geng. [doi]
• AdvHunter: Detecting Adversarial Perturbations in Black-Box Neural Networks through Hardware Performance CountersManaar Alam, Michail Maniatakos. [doi]
• SkyPlace: A New Mixed-size Placement Framework using Modularity-based Clustering and SDP RelaxationJaekyung Im, Seokhyeong Kang. [doi]
• Invited: New Solutions on LLM Acceleration, Optimization, and ApplicationYingbing Huang, Lily Jiaxin Wan, Hanchen Ye, Manvi Jha, Jinghua Wang, Yuhong Li, Xiaofan Zhang, Deming Chen. [doi]