Yinhe Han 0001 - researchr alias

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Viewing Publication 1 - 39 from 39

2025

A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph ProcessingZerun Li, Xiaoming Chen 0003, Yuxin Yang 0002, Feng Min, Xiaoyu Zhang 0009, Yinhe Han 0001. TC, 74(4):1109-1122, April 2025. [doi]

Make LLM Inference Affordable to Everyone: Augmenting GPU Memory with NDP-DIMMLian Liu, Shixin Zhao, Bing Li 0017, Haimeng Ren, Zhaohui Xu, Mengdi Wang, Xiaowei Li 0001, Yinhe Han 0001, Ying Wang 0001. hpca 2025: 1751-1765 [doi]

COMET: Towards Practical W4A4KV4 LLMs ServingLian Liu, Long Cheng 0003, Haimeng Ren, Zhaohui Xu, Yudong Pan, Mengdi Wang, Xiaowei Li 0001, Yinhe Han 0001, Ying Wang 0001. asplos 2025: 131-146 [doi]

RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking FrameworkKun Wang, Kaiyan Chang, Mengdi Wang, Xingqi Zou, Haobo Xu, Yinhe Han 0001, Ying Wang 0001. aspdac 2025: 808-813 [doi]

LAD: Efficient Accelerator for Generative Inference of LLM with Locality Aware DecodingHaoran Wang, Yuming Li, Haobo Xu, Ying Wang 0001, Liqi Liu, Jun Yang, Yinhe Han 0001. hpca 2025: 1482-1495 [doi]

PIPECIM: Energy-Efficient Pipelined Computing-in-Memory Computation Engine With Sparsity-Aware TechniqueYuanbo Wang, Liang Chang 0002, Jingke Wang, Pan Zhao, Jiahao Zeng, Xin Zhao, Wuyang Hao, Liang Zhou, Haining Tan, Yinhe Han 0001, Jun Zhou 0017. tvlsi, 33(2):525-536, February 2025. [doi]

Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM AcceleratorsShixin Zhao, Yuming Li, Bing Li 0017, Yintao He, Mengdi Wang, Yinhe Han 0001, Ying Wang 0001. asplos 2025: 63-78 [doi]

2024

Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generationKaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li 0001, Yinhe Han 0001, Ying Wang 0001. iccad 2024: [doi]

Accelerating Frequency-domain Convolutional Neural Networks Inference using FPGAsYi Chen, Bosheng Liu, Yongqi Xu, Jigang Wu, Xiaoming Chen, Peng Liu 0045, Qingguo Zhou, Yinhe Han 0001. iscas 2024: 1-5 [doi]

GPACE: An Energy-Efficient PQ-Based GCN Accelerator with Redundancy ReductionYibo Du, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han 0001. date 2024: 1-6 [doi]

Chiplever: Towards Effortless Extension of Chiplet-based System for FHEYibo Du, Ying Wang 0001, Bing Li 0017, Fuping Li, Shengwen Liang, Huawei Li 0001, Xiaowei Li 0001, Yinhe Han 0001. dac 2024: [doi]

FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon InterposerBo Jiao, Lei Xu, Xinyu Yu, Haitao Yang, Haozhe Zhu, Yu Wang, Jundong Zhu, Dexin Wen, Lingli Wang, Jun Tao 0001, Chixiao Chen, Yinhe Han 0001, Qi Liu 0010, Ninghui Sun, Ming Liu. tcasI, 71(9):4156-4168, September 2024. [doi]

TMiner: A Vertex-Based Task Scheduling Architecture for Graph Pattern MiningZerun Li, Xiaoming Chen 0003, Yinhe Han 0001. micro 2024: 1295-1308 [doi]

Mathematical Framework for Optimizing Crossbar Allocation for ReRAM-based CNN AcceleratorsWanqian Li, Yinhe Han 0001, Xiaoming Chen 0003. todaes, 29(1), January 2024. [doi]

Chipletizer: Repartitioning SoCs for Cost-Effective Chiplet IntegrationFuping Li, Ying Wang 0001, Yujie Wang, Mengdi Wang, Yinhe Han 0001, Huawei Li 0001, Xiaowei Li 0001. aspdac 2024: 58-64 [doi]

PIMSYN: Synthesizing Processing-in-Memory CNN AcceleratorsWanqian Li, Xiaotian Sun, Xinyu Wang, Lei Wang, Yinhe Han 0001, Xiaoming Chen 0003. date 2024: 1-6 [doi]

HEX-SIM: Evaluating Multi-modal Large Language Models on Multi-chiplet NPUsXinquan Lin, Haobo Xu, Yinhe Han 0001, Yiming Gan. iiswc 2024: 108-120 [doi]

Drift: Leveraging Distribution-based Dynamic Precision Quantization for Efficient Deep Neural Network AccelerationLian Liu, Zhaohui Xu, Yintao He, Ying Wang 0001, Huawei Li 0001, Xiaowei Li 0001, Yinhe Han 0001. dac 2024: [doi]

An Automatic Neural Network Architecture-and-Quantization Joint Optimization Framework for Efficient Model InferenceLian Liu, Ying Wang 0001, Xiandong Zhao, Weiwei Chen, Huawei Li, Xiaowei Li 0001, Yinhe Han 0001. tcad, 43(5):1497-1510, May 2024. [doi]

MemSort: In-Memory Sorting ArchitectureRui Liu, Xiaoyu Zhang, Xinyu Wang, Feng Min, Zhejian Luo, Xiaoming Chen, Yinhe Han 0001, Minghua Tang. iccd 2024: 28-35 [doi]

Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic AcceleratorsRui Liu, Zerun Li, Xiaoyu Zhang 0009, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen 0003, Yinhe Han 0001, Minghua Tang. dt, 41(5):46-54, October 2024. [doi]

ACES: Accelerating Sparse Matrix Multiplication with Adaptive Execution Flow and Concurrency-Aware Cache OptimizationsXiaoyang Lu, Boyu Long, Xiaoming Chen 0003, Yinhe Han 0001, Xian-He Sun. asplos 2024: 71-85 [doi]

PrimePar: Efficient Spatial-temporal Tensor Partitioning for Large Transformer Model TrainingHaoran Wang, Lei Wang, Haobo Xu, Ying Wang, Yuming Li, Yinhe Han 0001. asplos 2024: 801-817 [doi]

PIMSIM-NN: An ISA-based Simulation Framework for Processing-in-Memory AcceleratorsXinyu Wang, Xiaotian Sun, Yinhe Han 0001, Xiaoming Chen 0003. date 2024: 1-2 [doi]

Depth-NeuS: Neural Implicit Surfaces Learning for Multi-view Reconstruction Based on Depth Information OptimizationSiqi Wen, Hanqi Jiang, Cheng Zeng, Runnan Chen, Jidong Yuan, Shuai Liang, Yinhe Han 0001. icic 2024: 47-58 [doi]

AceMiner: Accelerating Graph Pattern Matching using PIM with Optimized Cache SystemLiang Yan, Xiaoyang Lu, Xiaoming Chen, Sheng Xu, Xingqi Zou, Yinhe Han 0001, Xian-He Sun. iccd 2024: 558-565 [doi]

GAS: General-Purpose In-Memory-Computing Accelerator for Sparse Matrix MultiplicationXiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han 0001. TC, 73(6):1427-1441, June 2024. [doi]

2023

Full State Quantum Circuit Simulation Beyond Memory LimitYilun Zhao 0002, Yu Chen, He Li, Ying Wang, Kaiyan Chang, Bingmeng Wang, Bing Li, Yinhe Han 0001. iccad 2023: 1-9 [doi]

FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication AcceleratorXiaoyu Zhang 0002, Zerun Li, Rui Liu, Xiaoming Chen 0003, Yinhe Han 0001. dac 2023: 1-6 [doi]

PANG: A Pattern-Aware GCN Accelerator for Universal GraphsYibo Du, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han 0001. iccd 2023: 263-266 [doi]

Layer-Puzzle: Allocating and Scheduling Multi-task on Multi-core NPUs by Using Layer HeterogeneityChengsi Gao, Ying Wang 0001, Cheng Liu 0008, Mengdi Wang, Weiwei Chen, Yinhe Han 0001, Lei Zhang. date 2023: 1-6 [doi]

APPEND: Rethinking ASIP Synthesis in the Era of AICangyuan Li, Ying Wang 0001, Huawei Li 0001, Yinhe Han 0001. dac 2023: 1-6 [doi]

Frequency-Domain Inference Acceleration for Convolutional Neural Networks Using ReRAMsBosheng Liu, Zhuoshen Jiang, Yalan Wu, Jigang Wu, Xiaoming Chen 0003, Peng Liu 0045, Qingguo Zhou, Yinhe Han 0001. tpds, 34(12):3133-3146, December 2023. [doi]

FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory ComputingRui Liu, Xiaoyu Zhang, Zhiwen Xie, Xinyu Wang, Zerun Li, Xiaoming Chen 0003, Yinhe Han 0001, Minghua Tang. tcad, 42(9):2889-2902, September 2023. [doi]

Meltrix: A RRAM-Based Polymorphic Architecture Enhanced by Function SynthesisBoyu Long, Libo Shen, Xiaoyu Zhang 0009, Yinhe Han 0001, Xian-He Sun, Xiaoming Chen. iccad 2023: 1-9 [doi]

LIM-GEN: A Data-Guided Framework for Automated Generation of Heterogeneous Logic-in-Memory ArchitectureLibo Shen, Boyu Long, Rui Liu, Xiaoyu Zhang 0009, Yinhe Han 0001, Xiaoming Chen 0003. iccad 2023: 1-9 [doi]

PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN AcceleratorsXiaotian Sun, Xinyu Wang, Wanqian Li, Lei Wang, Yinhe Han 0001, Xiaoming Chen 0003. dac 2023: 1-6 [doi]

Hardware-Software Co-Design for Content-Based Sparse AttentionRui Tang, Xiaoyu Zhang 0009, Rui Liu, Zhejian Luo, Xiaoming Chen 0003, Yinhe Han 0001. iccd 2023: 415-418 [doi]

Dadu-RBD: Robot Rigid Body Dynamics Accelerator with Multifunctional PipelinesYuxin Yang, Xiaoming Chen, Yinhe Han 0001. micro 2023: 297-309 [doi]

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