Abstract is missing.
- SPAT: FPGA-based Sparsity-Optimized Spiking Neural Network Training Accelerator with Temporal Parallel DataflowYuanyuan Jiang, Li Lun, Jiawei Wang, Mingqi Yin, Hanqing Liu, Zhenhui Dai, Xiaole Cui, Xiaoxin Cui. 1-5 [doi]
- Spectral Structure Analysis of FFT-based Digital Predistortion for Wideband 5G ApplicationsTayeb H. C. Bouazza, Dang-Kièn Germain Pham, Reda Mohellebi, Patricia Desgreys. 1-5 [doi]
- A Mixed-Signal TIA with Input Restoring ADCDavid-Peter Wiens, Björn Driemeyer, Maurits Ortmanns. 1-5 [doi]
- DNNMapper: An Elastic Framework for Mapping DNNs to Multi-die FPGAsShuyang Li, Xilang Zhou, Haodong Lu, Kun Wang. 1-5 [doi]
- A Charge-Trap-Transistor-Based Fully Analog Machine Learning Inference Engine for Audio Keyword SpottingNavid Rezazadeh, John Gosson, Roger Levinson, Paramjeet Sahni, Mark Bury, Juan Diaz, Shufan Chan, Eve Boyer, Niraj Mathur, Hamid Taheri. 1-5 [doi]
- Noise Decomposition Based on VGG and LSTM NetworksYanze Zheng, Yi Zhang, Naixin Zhou, Shibo Chen, Yijiu Zhao. 1-5 [doi]
- A Lossless Neural Recording SoC for Epilepsy Monitoring with up to 84.9-dB Dynamic Range and Rail-to-Rail Stimulation Artifact ToleranceYirui Liu, Yukun Ding, Xiao Liu. 1-5 [doi]
- Implementation of Floating Charged Memristor Emulator utilizing DVCCTANidhee Bhuwal, Manoj Kumar Majumder, Deepika Gupta. 1-5 [doi]
- A Low-power Δ-ΔΣ-based Bio-impedance Readout IC with Capacitive-feedback Baseline CancellationHaidam Choi, Ji-Hoon Suh, Gichan Yun, Sein Oh, Song-I Cheon, Sohmyung Ha, Minkyu Je. 1-5 [doi]
- Hybrid Multi-tile Vector Systolic Architecture for Accelerating Convolution on FPGAsJay Shah, Nanditha Rao. 1-5 [doi]
- In-memory Machine Learning using Adaptive Multivariate Decision Trees and MemristorsAkash Chavan, Pranav Sinha, Sunny Raj. 1-5 [doi]
- Block Configuration Algorithms for a Reconfigurable Analog ArrayZiyi Chen, Ioannis Savidis. 1-5 [doi]
- In-Memory Transformer Self-Attention Mechanism Using Passive Memristor CrossbarJack Cai, Muhammad Ahsan Kaleem, Roman Genov, Mostafa Rahimi Azghadi, Amirali Amirsoleimani. 1-5 [doi]
- On Various Extensions of the Shannon-Hagelbarger Concavity TheoremIbrahim Abe M. Elfadel. 1-5 [doi]
- A 0.4 V 180 nm CMOS Sub-μW Ultra-Compact and Low-Effort Design PWM-Based ADCGuido Di Patrizio Stanchieri, Orazio Aiello, Andrea De Marcellis. 1-5 [doi]
- Design Framework for Ising Machines with Bistable Latch-Based Spins and All-to-All Resistive CouplingYimin Wang, Yunuo Cen, Xuanyao Fong. 1-5 [doi]
- A Compressed Sensing Integrate-and-Fire Neuron Concept for Massively Parallel RecordingsJonas David Rieseler, Christian Adam, Andreas Bahr, Matthias Kuhl. 1-5 [doi]
- Deep Learning Method for Doppler DisambiguationMarco Braun, Adrian Becker, Mirko Meuter, Simon Roesler, Kevin Kollek, Anton Kummert. 1-5 [doi]
- An Energy-Efficient Configurable Coprocessor Based on 1-D CNN for ECG Anomaly DetectionChen Zhang, Zhijie Huang, QianXi Cheng, Changchun Zhou, Xin'an Wang. 1-5 [doi]
- Quantum Readout Processing Accelerator with a CORDIC Core at Cryogenic TemperatureYi Sheng Chong, Hongyu Cao, Wang Ling Goh, Patrick Bore, Yuanzheng Paul Tan, Yung Szen Yap, Rainer Dumke, Vishnu P. Nambiar, Anh-Tuan Do. 1-5 [doi]
- A Tri-loop Fast-transient Digital LDO with Adaptive-gain Control and Fine-loop FreezerMuhammad Haris Farooq, Muhammad Abrar Akram, Shirin Qaisar, Soon-Jae Kweon, Hammad M. Cheema, Sohmyung Ha. 1-5 [doi]
- Highly Reliable PUF Circuits Using Efficient Post-Processing Stabilization TechniqueYu-Hsiang Tseng, Shao-Hong Yang, Tsung-Te Liu. 1-5 [doi]
- A Dithered-Digital-Mixing Background Timing-Skew Calibration Method for Time-Interleaved ADCsYunsong Tao, Yi Zhong, Jin Shao, Changyou Men, Lu Jie 0001, Nan Sun 0001. 1-5 [doi]
- Efficient Neural Compression with Inference-time DecodingClément Metz, Olivier Bichler, Antoine Dupret. 1-5 [doi]
- A Fractional-N PLL for Multi-phase Clock Generation with Loop Bandwidth EnhancementReo Nagasue, Isamu Mizuno, Ryo Kishida, Tatsuya Iwata, Takefumi Yoshikawa. 1-5 [doi]
- A Multi-scale Block PatchMatch-based Unified Algorithm for Efficient 6-D Vision ProcessingHongyu Wang 0010, Xiangyu Zhang 0002, Xin Lou. 1-5 [doi]
- HfO2-Based Synaptic Spiking Neural Network Evaluation to Optimize Design and Testing CostSNB Tushar, Hritom Das, Garrett S. Rose. 1-5 [doi]
- A Precision-Scalable Vision Accelerator for Robotic ApplicationsHaoran Zeng, Wendong Mao, Siyu Zhang, Zhongfeng Wang 0001. 1-5 [doi]
- A 24/48V to 0.8V-1.2V All-Digital Synchronous Buck Converter with Package-Integrated GaN power FETs and 180nm Silicon Controller ICKaushik Bhattacharyya, Minxiang Gong, Muya Chang, Xin Zhang, Arijit Raychowdhury. 1-5 [doi]
- A Programmable and Adaptive Dead-Time Controller for Low-Offset Output Generation for Cryo-Cooler Drive ApplicationsNishant Kumar, Hari Shanker Gupta, Anuj Srivastava, Nihar Ranjan Mohapatra. 1-5 [doi]
- A 1024-Neuron 1M-Synapse Event-Driven SNN Accelerator for DVS ApplicationsXi Cheng, Shu Cao, Shangmei Wang, Xiaoyang Zeng, Wenhong Li, Mingyu Wang. 1-5 [doi]
- Assessing the Performance of Stateful Logic in 1-Selector-1-RRAM Crossbar ArraysArjun Tyagi, Shahar Kvatinsky. 1-5 [doi]
- Empirical Study on the Impact of Few-Cost ProxiesKevin Kollek, Marco Braun, Jan-Hendrik Meusener, Jan-Christoph Krabbe, Anton Kummert. 1-5 [doi]
- A Millimeter-Wave Input-Reflectionless Amplifier in 45-nm SOI CMOS TechnologyJim Darrell Ang, Li Yang, Roberto Gómez-García, Xi Zhu 0001. 1-5 [doi]
- A Physical Reservoir Computing Processor for ECG-to-PCG Signals PredictionYuqi Ding, Haobo Li, Xiangpeng Liang, Marija Vaskeviciute, Daniele Faccio, Hadi Heidari. 1-5 [doi]
- SFFTNet: Sparse Feature Fusion Transformer Network for Image DeblurringFaxing Lei, Chao Liu, Wei Li, Ming-e Jing, Xiankui Xiong, Xuanpeng Zhu, Yibo Fan. 1-5 [doi]
- Design of Wireless In-Wheel Motor Drive with S/CP CompensationXin Felix Chen, Chi K. Tse, Qianhong Chen. 1-5 [doi]
- A Fast Transient Response Capless LDO Regulator Achieving -78 dB of PSR Up to 2 MHzXiang Cheng, Huihua Liu, Jingzhi Zhang, Yiming Yu, Yunqiu Wu, Chenxi Zhao, Kai Kang. 1-5 [doi]
- Analysis and Design of Constant-Slope Voltage-to-Time ConvertersSanteri Porrasmaa, Okko Järvinen, Ilia Kempi, Kari Stadius, Marko Kosunen, Jussi Ryynänen. 1-5 [doi]
- A Highly Parallel Capacitive Sensing Circuit for High-Throughput Thin-Film Transistor Digital Microfluidic ChipsLingxiao Qian, Congwei Liao, Yuhan Zhang, Yong Le, Shengdong Zhang. 1-5 [doi]
- Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machinesMohammad Hizzani, Arne Heittmann, George Higgins Hutchinson, Dmitrii Dobrynin, Thomas Van Vaerenbergh, Tinish Bhattacharya, Adrien Renaudineau, Dmitri B. Strukov, John Paul Strachan. 1-5 [doi]
- Toward Scalable Laboratories in Signals and Systems: Content, Deployment, and GradingYousef Helal, Naomi Sagan, Drake Lin, Anmol Parande, Dominic Carrano, Babak Ayazifar. 1-5 [doi]
- 2·ns Comparator with Dynamic-cum-Body Bias Technique in SOISaurabh Dhiman, Hitesh Shrimali. 1-5 [doi]
- An Energy Efficient Delay Element with Self-shutoff Logic and Delay ExtensionCan Liang, Zeyu Cai. 1-5 [doi]
- Minimax Design of M-D Interpolated FIR Filters using Convex-Concave ProcedurePathmapirian Nanthakumar, Chamira U. S. Edussooriya, Chamith Wijenayake, Arjuna Madanayake. 1-5 [doi]
- Channel Estimation and Equalization Design with SNR Decision Based Universal Threshold for Sub-THz Single Carrier Baseband ReceiverFeng-Ju Liao, Chung-Lun Tu, Shyh-Jye Jou. 1-5 [doi]
- Audio-Visual Cross-Modal Generation with Multimodal Variational Generative ModelZhubin Xu, Tianlei Wang, Dekang Liu, Dinghan Hu, Huanqiang Zeng, Jiuwen Cao. 1-5 [doi]
- NMM-Based Patient-Specific Temporally-Adaptive Stimulation Optimization for Seizure ControlRojin Salahi, Hossein Kassiri. 1-5 [doi]
- Energy Efficient Accurate and Approximate Modified Adders for Ternary MultipliersL. Hemanth Krishna, Nandit Kaushik, Srinivasu Bodapati. 1-5 [doi]
- A Single-Stage Four-Phase Dual-Output Regulating Rectifier With Ultrafast Transient Response Using Double-Frequency Current-Wave ModulationWeiyan Li, Xianren Hao, Xiaguang Li, Yan Ma, Jingjing Liu, Huaxi Zhang 0003, Xiaoyang Zeng, Zhiyuan Chen 0002. 1-5 [doi]
- Redefining Clock Network Construction: The Nested Flex Paradigm for Enhanced PPA DynamicsLakshmi Sarvaani P, Subba Ramkumar Reddy Annapalli, Vikramkumar Pudi. 1-5 [doi]
- A High-Throughput Lossless Image Compression Engine Optimized for Compression RatioSiqi Cai, Yuzhou Chen, Wenhui Zhang, Zeyuan Jin, Gang Wang, Hao Chen, Guanghui He. 1-5 [doi]
- An Event-Driven High-Speed Imaging and Trace Detection ROIC for Cryogenic Infrared FPAsMingzhong He, Yufei Ai, Wengao Lu, Yi Zhuo, Qingjiang Xia, Runkun Zhu, Yacong Zhang, Zhongjian Chen. 1-5 [doi]
- A 0.2 pJ/bit, Energy-Efficient, Half-Rate Hybrid Circuit Topology at 6-Gb/s in 1.2V, 65 nm CMOSPrema Kumar Govindaswamy, Mursina Khatun, Vijay Shankar Pasupureddi. 1-5 [doi]
- An FPGA Implementation of An Event-Driven Unsupervised Feature Extraction Algorithm for Pattern RecognitionPhilip C. Jose, Ying Xu, André van Schaik, Runchun Wang. 1-5 [doi]
- Time Domain Analysis of Secondary Stage With Series Resonance Driving Rectifier LoadWing-Hung Ki, Yuan Yao, Chi-Ying Tsui. 1-4 [doi]
- A Digital Pre-Distortion Technique for High-Linearity, Low-Power, Compact, Phase InterpolatorsZhaowen Wang, Hongzhe Jiang, Peter R. Kinget. 1-5 [doi]
- A Fully-Parallel Reconfigurable Spiking Neural Network Accelerator with Structured Sparse ConnectionsMingyang Li, Yirong Kan, Renyuan Zhang, Yasuhiko Nakashima. 1-5 [doi]
- Q-learning Assisted LASSO-based Thermal Sensor Placement for Thermal-aware Multi-core SystemsKun-Chih Jimmy Chen, Leiqi Wang. 1-5 [doi]
- Battery Modeling with Mittag-Leffler FunctionShahenda M. Abdelhafiz, Mohammed E. Fouda, Ahmed G. Radwan. 1-4 [doi]
- Design of a multi-channel high-sensitivity electrochemical interface IC based on organic electrochemical transistors (OECT)Yuan Ma, Shangbin Liu, Chao Xie, Yahao Song, Lan Yin, Milin Zhang 0001. 1-5 [doi]
- Performance Analysis of Underwater Optical Wireless Video Communication SystemsRajeev Kumar Kottilingal, Nandakumar Nambath. 1-5 [doi]
- Dynamic Resource Management in Reconfigurable SoC for Multi-Tenancy SupportSohyeon Kim, Injun Choi, Minkyu Je, Ji-Hoon Kim. 1-5 [doi]
- A Semi-Folded Based High-Power-Efficiency FFT for Frequency Offset EstimateLiyu Lin, Jingguo Wu, Xiaoyang Zeng, Yun Chen. 1-5 [doi]
- A Ready-to-Use RTL Generator for Systolic Tensor Arrays and Analysis Using Open-Source EDA ToolsJooyeon Lee, Donghun Lee, Jaeha Kung. 1-5 [doi]
- A Scalable and PVT Invariant Spiking Neuron Using Asynchronous CMOS LogicDante Loi, Javier Granizo, Luis Hernández 0003. 1-5 [doi]
- A 99.8-dB SNDR 10kHz-BW Second-Order DT Delta-Sigma Modulator with Single OTA and Enhanced Noise-CouplingJiaju Lu, Siqi Zhang, Wang Ling Goh, Yuan Gao. 1-5 [doi]
- Cooperative Emergence in Structured Populations Mixed with Imitation and Aspiration Learning DynamicsZhizhuo Zhou, Jing Zhang, Zhihai Rong. 1-5 [doi]
- Handover Management through Reconfigurable Intelligent Surfaces for VLC under Blockage ConditionsKapila W. S. Palitharathna, Anna Maria Vegni, Panagiotis D. Diamantoulakis, Himal A. Suraweera, Ioannis Krikidis. 1-5 [doi]
- Enhancing Memory Capacity of Reservoir Computing with Delayed Input and Efficient Hardware Implementation with Shift RegistersSoshi Hirayae, Kanta Yoshioka, Atsuki Yokota, Ichiro Kawashima, Yuichiro Tanaka, Yuichi Katori, Osamu Nomura, Takashi Morie, Hakaru Tamukoh. 1-5 [doi]
- 2, 2.9-μW Pulse-Frequency-Modulation based Temperature Sensor with 40-mK ResolutionChiyuan Zhang, Nan Chen 0003, Douming Hu, Fang Zhu, Yuesheng Pu, Libin Yao. 1-4 [doi]
- REVBiT: REVerse Engineering of BiTstream for LUT Extraction & Logic IdentificationAnmol Singh Narwariya, Chetan Talele, Pabitra Das, Amit Acharyya. 1-5 [doi]
- A nonlinear model of air-gapped ferrite-core inductors for SMPS applicationsAlessandro Ravera, Andrea Formentini, Matteo Lodi, Alberto Oliveri, Marco Storace. 1-5 [doi]
- Two-stage Adaptive Compressive Sensing and Reconstruction for Terahertz Single-Pixel ImagingYu-Kai Zhang, Che-Yu Chou, Shang-Hua Yang, Yuan-Hao Huang. 1-5 [doi]
- An Enhanced Resubstitution Algorithm for Area-Oriented Logic OptimizationAndrea Costamagna, Alan Mishchenko, Satrajit Chatterjee, Giovanni De Micheli. 1-5 [doi]
- Live Demonstration: Real-time audio and visual inference on the RAMAN TinyML acceleratorAdithya Krishna, Ashwin Rajesh, Hitesh Pavan Oleti, Anand Chauhan, Shankaranarayanan H, André van Schaik, Mahesh Mehendale, Chetan Singh Thakur. 1 [doi]
- An Efficiency-Enhanced Active Rectifier with Offset-Controlled Comparators for WPT SystemsYuxuan Jiang, Zhiqiang Xu 0002, Esther Rodríguez-Villegas. 1-5 [doi]
- Power System Events Classification Technology Based on Deep-LearningXin Lei, Hongwei Ma, Bin Liu, Zhen Li. 1-5 [doi]
- Capacitor-Less Buck-Boost Converter Using Integrated Planar Inductor-Capacitor Fabricated with Nanotechnology ProcessesHaitham M. Kanakri, Euzeli Cipriano dos Santos, Maher E. Rizkalla. 1-5 [doi]
- A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with Mixed FXP4/FP16 for On-Device Transfer LearningWei Lu, Han-Hsiang Pei, Jheng-Rong Yu, Hung-Ming Chen, Po-Tsang Huang. 1-5 [doi]
- Smart Clothing using Antenna and Memristive ANNElizabeth George, Sruthi Pallathuvalappil, Alex Pappachen James. 1-5 [doi]
- A 174.8 dB FoMs CT-ΔΣ ADC with Integrated ISFET Sensor and Noise-Shaping EnhancementChen Wang, Yuanqi Hu. 1-5 [doi]
- Toward Accurate Analysis of Channel Charge Injection in SAR ADCs' Capacitive DACsAlireza Ahrar, Jianxiong Xu, Mohammad Reza Pazhouhandeh, Antoine Frappé, Mostafa Rahimi Azghadi, Amirali Amirsoleimani. 1-5 [doi]
- ANN-based Accurate and Fast Post-Route QoR Data Prediction Methodology from Pre-Clock Tree Synthesis by Skipping CTS and RoutingArpit Jain, Pabitra Das, Amit Acharyya, Rakesh MB. 1-5 [doi]
- Parallel AIG Refactoring via Conflict BreakingYe Cai, Zonglin Yang, Liwei Ni, Junfeng Liu, Biwei Xie, Xingquan Li. 1-5 [doi]
- A field deployable imaging system for detecting microplastics in the aquatic environmentJianqing Huang, Yuxing Li, Yanmin Zhu, Edmund Y. Lam. 1-5 [doi]
- High Voltage Transformer Condition Monitoring Using Memristive Echo State NetworksVineeta Vasudevan Nair, Anilkumar P, Alex James. 1-5 [doi]
- SRAM-Based Digital CIM Macro for Linear Interpolation and MACZhiting Lin, Yunlong Liu, Yaling Wang, Yue Zhao, Chunyu Peng, Xiulong Wu. 1-5 [doi]
- System Integration of Xilinx DPU and HDMI for Real-Time Inference in PYNQ Environment With Image EnhancementJonathan J. Sanderson, Syed Rafay Hasan. 1-5 [doi]
- DNA: DC Nodal Analysis Attack for Analog CircuitsVaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis. 1-5 [doi]
- Using Negative-R Assisted Integrators in Wide-band Delta-Sigma ModulatorsAhmed Abdelaal, Michael Pietzko, Jonathan Ungethüm, John G. Kauffman, Maurits Ortmanns. 1-5 [doi]
- A Near-Eye DVS-Based End-to-End Eye Tracking Processor for AR/VR ApplicationsShihang Tan, Jiayu Huang, Quanshu Yan, Lirong Zheng 0001, Zhuo Zou. 1-5 [doi]
- Dynamic Gradient Sparse Update for Edge TrainingI-Hsuan Li, Tian-Sheuan Chang. 1-5 [doi]
- Bifurcation phenomena observed from two-variable spiking neuron integrated circuitTakemori Orima, Yoshihiko Horio, Satoshi Moriya, Shigeo Sato. 1-5 [doi]
- Generalized Few-Shot 3D Point Cloud SegmentationShuqian Yang, Henhui Ding, Xudong Jiang. 1-5 [doi]
- An Energy-Efficient Object Detection System in IoT with Dynamic Neuromorphic Vision SensorsZehao Li, Wenhao Lu, Yuncheng Lu, Junying Li, Yucen Shi, Yuanjin Zheng, Tony Tae-Hyoung Kim. 1-5 [doi]
- Machine Learning with Real-time and Small Footprint Anomaly Detection System for In-Vehicle GatewayYi Wang, Yuanjin Zheng, Yajun Ha. 1-5 [doi]
- Advancing In-Home Gait Monitoring: A Feasibility Study of Upper Limb Swing Analysis Using FMCW RadarEasha, Gaurab Banerjee. 1-5 [doi]
- Data-Free Learning for Lightweight Multi-Weather Image RestorationPei Wang, Hongzhan Huang, Xiaotong Luo, Yanyun Qu. 1-5 [doi]
- Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network ArchitecturesNajmeh Nazari, Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Muhtasim Alam Chowdhury, Chongzhou Fang, Avesta Sasan, Setareh Rafatirad, Houman Homayoun, Soheil Salehi. 1-5 [doi]
- DAC Element Mismatch Shaping Algorithms in Incremental Delta-Sigma ADCsOmar Ismail, Paul Kaesser, John G. Kauffman, Maurits Ortmanns. 1-5 [doi]
- Configurable and Intelligent Switched CMOS Current Driver Powering Arrays of Electrothermal Actuators for MEMS SwitchesAllan Riboullet, Frédéric Nabki, Yves Blaquière, Glenn E. R. Cowan. 1-5 [doi]
- SNN Modeling of Cricket Auditory Network with Izhikevich Model Optimized by PSOJiaying Lin, Ryuji Nagazawa, Koichi Tokunaga, Kien Nguyen 0002, Hiroo Sekiya, Hiroyuki Torikai, Won-Joo Hwang. 1-5 [doi]
- Formal Verification For Cyclic Quantum Walk CircuitsBenedicto James Sitou Campbell, Sudarshan K. Srinivasan. 1-5 [doi]
- A New Method for Source Number Estimation in the Presence of Unknown Nonuniform NoiseMengxia He, S. C. Chan 0001. 1-5 [doi]
- Axial Attention Transformer for Fast High-quality Image Style TransferYuxin Liu, Wenxin Yu, Zhiqiang Zhang, Qi Wang, Lu Che. 1-5 [doi]
- A Reconfigurable Fused Multiply-Accumulate For Miscellaneous Operators in Deep Neural NetworkLei Lei, Zhiming Chen. 1-5 [doi]
- Feature Extraction of Neuronal Activity by Attractor Reconstruction in Neural Networks with Delayed CouplingsYoko Uwate, Marie Engelene J. Obien, Urs Frey, Yoshifumi Nishio. 1-5 [doi]
- An Energy-Efficient Graphene-based Spiking Neural Network Architecture for Pattern RecognitionNicoleta Cucu Laurencin, Charles Timmermans, Sorin Dan Cotofana. 1-5 [doi]
- An Iterative Image Inpainting Method Using Mask ShrinkingHaruka Matano, Haixin Wang, Jinjia Zhou. 1-5 [doi]
- FPGA Implementation of SFO for OFDM-based Network Enabled Li-Fi SystemTrio Adiono, Erwin Setiawan, Michael Jonathan, Rahmat Mulyawan, Nana Sutisna, Infall Syafalni, Wasiu O. Popoola. 1-5 [doi]
- A 24.6-29.6GHz Hybrid Sub-Sampling PLL with Tri-State Integral Path Achieving 44fs Jitter and -254.8dB FOM in 28nm CMOSZhongkai Wang, Minsoo Choi, Paul Kwon, Zhaokai Liu, Bozhi Yin, Kyoungtae Lee, Kwanseo Park, Ayan Biswas, Jaeduk Han, Sijun Du, Elad Alon. 1-5 [doi]
- RecogNoise: Machine-Learning-Based Recognition of Noisy Segments in Electrocardiogram SignalsAmin Aminifar, Soheil Khooyooz, Anice Jahanjoo, Salar Shakibhamedan, Nima Taherinejad. 1-5 [doi]
- Analysis of Current-Commutating Passive and Active Mixers for mmWave ApplicationsKimi Jokiniemi, Kaisa Ryynänen, Joni Vähä, Kari Stadius, Jussi Ryynänen. 1-5 [doi]
- Live Demonstration: Real-Time Object Detection & Classification System in IoT with Dynamic Neuromorphic Vision SensorsZehao Li, Wenhao Lu, Yuncheng Lu, Junying Li, Yucen Shi, Yuanjin Zheng, Tony Tae-Hyoung Kim. 1 [doi]
- Low-latency Buffering for Mixed-precision Neural Network Accelerator with MulTAP and FQPipeYike Li, Zheng Wang 0027, Wenhui Ou, Chen Liang, Weiyu Zhou, Yongkui Yang, Chao Chen. 1-5 [doi]
- FPGA based Adaptive Receive Apodization Design for Diagnostic Ultrasound ImagingGayathri Malamal, Mahesh Raveendranatha Panicker. 1-4 [doi]
- Equilibrium-Based Learning Dynamics in Spiking ArchitecturesMalyaban Bal, Abhronil Sengupta. 1-5 [doi]
- Agriculture Impact on Climate Change and Climate Change Impact on Agriculture - Low Power DesignVictor Grimblatt. 1-5 [doi]
- Double locally active memristor-based inductor-free chaotic circuitQingdian Geng, Yan Liang, Zhenzhou Lu, Herbert Ho-Ching Iu, Guangyi Wang. 1-5 [doi]
- Flip-Around Level-Shifting For Switched-Capacitor Amplifiers to Improve the Closed-Loop Settling of Floating-Inverter AmplifiersR. S. Ashwin Kumar. 1-5 [doi]
- Enhancing Performance of SAR ADC through Supervised Machine LearningSumukh Prashant Bhanushali, Arindam Sanyal. 1-5 [doi]
- Hybrid Event-Frame Neural Spike Detector for Neuromorphic Implantable BMIVivek Mohan, Wee-Peng Tay, Arindam Basu. 1-5 [doi]
- Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-NetworkSangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Hoi-Jun Yoo. 1-5 [doi]
- An FPGA-Based Reconfigurable Accelerator for Convolution-Transformer Hybrid EfficientViTHaikuo Shao, Huihong Shi, Wendong Mao, Zhongfeng Wang 0001. 1-5 [doi]
- Moving Object Detection in Shallow Underwater using Multi-Scale Spatial-Temporal LacunarityShaofeng Zou, Xuyang Wang 0003, Tao Yuan, Kaihui Zeng, Guolin Li, Xiang Xie. 1-5 [doi]
- P2E-LGAN: PPG to ECG Reconstruction Methodology using LSTM based Generative Adversarial NetworkRashmi Kumari, Surita Sarkar, Debeshi Dutta, Pabitra Das, Amit Acharyya. 1-5 [doi]
- Current-Steering DAC Architecture Design for Amplitude Mismatch Error MinimizationRamin Babaee, Shahab Oveis Gharan, Martin Bouchard 0001. 1-4 [doi]
- Video Assisted Face Recognition in Smart ClassroomLi-wen Wang, Wan-Chi Siu, Yi-Hao Cheng, H. Anthony Chan. 1-5 [doi]
- Novel SRAM based Temporary Memory for PVT Variation Tolerant Analog In-Memory ComputingSivakumar Elangovan, Porus Vangala, Yeshwanth Sunnapu, Khalid Shaikh, Udayan Ganguly, Maryam Shojaei Baghini. 1-5 [doi]
- A 24V-to-1V Hybrid Converter With Adaptive Dead Time Control for Point-of-Load ApplicationsGuozhen Chang, Yang Liu, Wing-Hung Ki. 1-5 [doi]
- Similarity-Aware Fast Low-Rank Decomposition Framework for Vision TransformersYuan-June Luo, Yu-Shan Tai, Ming-Guang Lin, An-Yeu Andy Wu. 1-5 [doi]
- Swin Transformer for Pedestrian and Occluded Pedestrian DetectionJung-An Liang, Jian-Jiun Ding. 1-5 [doi]
- A Fully Integrated LDO Using Synchronous VTC and Asynchronous Step Detection Recovery for Under-1 V Supply Voltage ApplicationYufei Sun, Wan Wang, Na Kang, Jing Fu, Xiaoya Fan, Yanzhao Ma. 1-5 [doi]
- A Timing-Shared Adaptive Sensing Methodology for Low-Voltage SRAMYongliang Zhou, Zhen Yang, Yiming Wei, Xiao Lin, Saiai Wu, Wenjuan Lu, Chunyu Peng, Xin Li, Xiulong Wu. 1-5 [doi]
- An Ultra-Low Power Time-Domain based SNN Processor for ECG ClassificationHaodong Fan, Liang Chang 0002, Junlu Zhou, Xi Yang, Shuisheng Lin, Jun Zhou 0017. 1-5 [doi]
- An Efficient Sparse-Aware Summation Optimization Strategy for DNN AcceleratorDanqing Zhang, Baoting Li, Hang Wang, Xuchong Zhang, Hongbin Sun. 1-5 [doi]
- Wideband DOA Estimation Based on Tensor Completion and DecompositionKangning Li, Qing Shen, Wei Liu, Min Wang. 1-5 [doi]
- Enhancing Cross-Modal Understanding for Audio Visual Scene-Aware Dialog Through Contrastive LearningFeifei Xu, Wang Zhou, Guangzhen Li, Zheng Zhong, Yingchen Zhou. 1-5 [doi]
- Learning-Based Conditional Image CompressionTianma Shen, Wen-Hsiao Peng, Huang-Chia Shih, Ying Liu. 1-5 [doi]
- Associative Memory Function Using Coupled Oscillators with Sparse CouplingKento Fukuta, Yoko Uwate, Yoshifumi Nishio. 1-4 [doi]
- An emergent EV dispatching method to enhance the resilience of power-transportation coupling systemsJie Yang, Xi Zhang, Xingtang Wu. 1-4 [doi]
- Gated Ring Oscillator Time Amplifier with Pico-Second Sensitivity and Applications in All-Digital Variable-Gain Time IntegratorFei Yuan. 1-5 [doi]
- A 1536-Element Ku-Band Dual-Polarized Transmit Phased Array for SATCOM ApplicationSicheng Sun, Yijiu Zhao, Yanze Zheng, Naixin Zhou, Yongling Ban. 1-5 [doi]
- A PVT-Robust Open-loop Gm-Ratio ×16 Gain Residue Amplifier for >1 GS/s Pipelined ADCsDiogo Dias, João Goes, Tiago L. Costa. 1-5 [doi]
- Three Coils, High-Resolution Receiver Positioning System for Wireless Power TransferJiaxing Zhang, Jiayang Li, Dai Jiang, Andreas Demosthenous. 1-4 [doi]
- Live Demonstration: A Video Denoising Co-processor with Non-local Means Algorithm for FHD 30fps Image SensorRuoheng Yao, Shengming Zhou, Zhiyue Gao, Yangyi Zhang, Yiwei Luo, Lei Chen, Fengwei An. 1 [doi]
- A 2.4GHz Sub-passive RF Down-converter with Trans-frequency Current-reusing scheme achieving Low Flicker Noise and High LinearityYan Zhao, Chao Chen, Wenjing Zhang, Jun Yang. 1-5 [doi]
- A Highly Reliable PPG Authentication System Based on an Improved AI Model with Dynamic Weighted Triplet Loss FunctionYang Yang, Wai-Chi Fang. 1-5 [doi]
- CTC: Continuous-Time Convolution based Multi-Attack Detection for Sensor NetworksMohammad Mezanur Rahman Monjur, Qiaoyan Yu. 1-5 [doi]
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- A DAC Sharing and Linearization Technique for Time-Interleaved Incremental Delta-Sigma ADCsJesko Flemming, Bernhard Wicht, Pascal Witte. 1-5 [doi]
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- On Class-Incremental Learning for Fully Binarized Convolutional Neural NetworksYanis Basso-Bert, William Guicquero, Anca Molnos, Romain Lemaire, Antoine Dupret. 1-5 [doi]
- Power-Efficient and Small-Area Approximate Multiplier Design with FPGA-Based CompressorsYi Guo, Xiu Chen, Qilin Zhou, Heming Sun. 1-5 [doi]
- Design of Magnetic Field Acquisition Probe and Front-End Signal Processing CircuitGuoqiang Li, Yongfang Liu, Yuanjin Zheng. 1-5 [doi]
- A Multi-Stride Convolution Acceleration Algorithm for CNNsAnaam Ansari, Tokunbo Ogunfunmi. 1-5 [doi]
- Utilization of Noise-Shaping in Mixed-Signal Timing-Skew Mismatch Calibration of TI-ADCsHamidreza Mafi, Mohamed Amine Bensenouci, Sadok Aouini, Mohammad Honarparvar, Naim Ben Hamida, Yvon Savaria. 1-5 [doi]
- Dynamically Configurable FIR Filters Based on Serial MACs and Systolic ArraysBo Ruan, Limin Jiang, Shan Cao, Zhiyuan Jiang. 1-5 [doi]
- Design and Analysis of a Family of pW-Level Sub-1V CMOS VRGs by Stacking a Current-Source Transistor and a Resistive-Load TransistorTong Zhang, Dingguo Zhang, Jing Jin, Patrick P. Mercier, Hui Wang. 1-5 [doi]
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- A Compact 25-32 GHz High IMRR Double Quadrature CMOS Transmitter for 5G ApplicationsAnik Batabyal, Rajesh H. Zele. 1-5 [doi]
- Memory-Based Contrastive Learning with Optimized Sampling for Incremental Few-Shot Semantic SegmentationYuxuan Zhang, Miaojing Shi, Taiyi Su, Hanli Wang. 1-5 [doi]
- 3D-Integrated, Low Power, High Bandwidth Density Opto-Electronic TransceiverDevesh Khilwani, SunWoo Lee, Christine Ou, Stuart Daudlin, Anthony Rizzo, Songli Wang, Michael Cullen, Keren Bergman, Alyosha C. Molnar. 1-5 [doi]
- Co-designing Trusted Execution Environment and Model Encryption for Secure High-Performance DNN Inference on FPGAsTsunato Nakai, Ryo Yamamoto. 1-5 [doi]
- Robust DNA Image Storage Decoding with Residual CNNCihan Ruan, Liang Yang 0001, Rongduo Han, Shan Gao, Haoyu Wu, Nam Ling. 1-5 [doi]
- A Low-Power and High-Precision Time- Domain Winner-Take-All Circuit Based on the Group Search AlgorithmHossein Yaghoobzadeh Shadmehri, Ehsan Rahiminejad, Mehdi Saberi, Alexandre Schmid. 1-4 [doi]
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- A Novel DA-Based Parallel Architecture for Inner-Product of Variable VectorsAnil Kali, Samrat L. Sabat, Pramod Kumar Meher. 1-5 [doi]
- A 60-nA IQ 96.5% Peak Efficiency Buck Converter with Wide Load Range for Internet of ThingsRuijie Xi, Chenkang Xue, Jiping Li, Tianting Zhao, Mengjiao Li, Yong Ding 0003, Wuhua Li, Wanyuan Qu. 1-5 [doi]
- Miniaturized Solid-State Battery-Based DC-DC Switched ConverterEmeric Perez, Carlos Augusto Berlitz, Yasser Moursy, Sami Oukassi, Bruno Allard, Gaël Pillonnet. 1-5 [doi]
- A Ka- to W-Band Tightly Coupled Array Antenna-in-Package Using Glass IPD for Ultrawideband mmWave Wireless CommunicationChing-Wen Chiang, Neda Khiabani, Donglin Gao, Chien-Nan Kuo, Yen-Cheng Kuan, Chung-Tse Michael Wu. 1-5 [doi]
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- Systematic Development of CMOS PTAT CircuitsShanthi Pavan. 1-5 [doi]
- Instance-level Timing Learning and Prediction at Placement using Res-UNet NetworkHe Liu, Simin Tao, Zhipeng Huang 0009, Biwei Xie, Xingquan Li, Ge Li. 1-5 [doi]
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- Self-aware Cross-component Prediction Model Based on Template for Screen Content CodingKun Zhang, Hongxin Qiu, Zhikai Liu, Fan Liang, Wei Sun. 1-5 [doi]
- An Optimization-Based Approach to One-Bit QuantizationFlorian Mayer 0002, Christian Vogel 0001. 1-5 [doi]
- A Low Power Programmable Switch Supply Dynamic ComparatorMadhan Venkatesh, Gerardo Molina Salgado, Kevin G. McCarthy, Ivan John O'Connell. 1-5 [doi]
- Live Demonstration: Using ANNs to Predict the Evolution of Spectrum OccupancyGustavo Liñán Cembrano, José M. de la Rosa 0001. 1 [doi]
- Accelerating Large-Scale DLRM Inference through Dynamic Hot Data RearrangementTaehyung Park, Seungjin Yang, Jongmin Seok, Hyuk-Jae Lee, Ju-Hyun Kim, Chae-Eun Rhee. 1-5 [doi]
- A Trusted Inference Mechanism for Edge Computing Based on Post-Quantum EncryptionYukang Huang, Junyi Mai, Wanling Jiang, Enyi Yao. 1-5 [doi]
- Content-adaptive Variable Resolution Framework for Intra CodingJiyu Xie, Li Li, Dong Liu, Houqiang Li. 1-5 [doi]
- Improved Camera Calibration Method Using Complementary PatternsXuguang Zhang, Jiawen Xue, Wei Song, Guolin Li, Xiang Xie. 1-5 [doi]
- Curriculum Development for Tapeout-Ready Mixed-Signal System-on-Chip Design and AssemblySamuel J. Murray, Joseph A. Schmitz, Sina Balkir, Michael W. Hoffman. 1-5 [doi]
- Modeling and Prediction of Common-Mode Electromagnetic Interference for GaN-Based LLC Resonant ConvertersChuang Bi, Siyong Luo, Heyang Shan, Lin Cheng. 1-5 [doi]
- A High-throughput Impedance Measurement IC Using Synchronous Cyclic Integration TechniqueKaram Ellahi, Soon-Jae Kweon, Asra Malik, Muhammad Abrar Akram, Song-I Cheon, Yoontae Jung, Minkyu Je, Hammad M. Cheema, Sohmyung Ha. 1-5 [doi]
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- On the New Analytical Design of Efficient Inductive Links with Maximum Biomedical Wireless Power Transfer Capability and Area ControllabilityAsif Iftekhar Omi, Baibhab Chatterjee. 1-5 [doi]
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- Three-Phase Motor Driver with Overcurrent Protection FunctionXiaowei Zhang, Fangcong Wang, Dezhi Xing, Longxiang Zhu. 1-5 [doi]
- Live Demonstration for Input-Sparsity-Aware RRAM Processing-in-Memory ChipJunjie Wang, Shuang Liu, Ruicheng Pan, Shiqin Yan, Yihe Liu, Yang Liu. 1-2 [doi]
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- A Dual Mode All NMOS 7-T Temperature Sensor and Voltage Reference for Biomedical ApplicationsDipesh C. Monga, Kari Halonen. 1-5 [doi]
- Machine Learning for X-ray and CT-based COVID-19 DiagnosisMin Tang, Shuwen Chen, Shuihua Wang, Yudong Zhang. 1-5 [doi]
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- A Trimming-Less External-RC Relaxation Oscillator With Self-Calibrating Current Reference for a SiC Active Gate Driver ApplicationErik Wehr, Tobias Zekorn, Michael Hanhart, Kenny Vohl, Léon Weihs, Ralf Wunderlich, Stefan Heinen. 1-5 [doi]
- Comparison of DTC Segmentation Methods in Fractional-N Frequency SynthesizersXu Wang, Michael Peter Kennedy. 1-5 [doi]
- Device Codesign using Reinforcement LearningSuma George Cardwell, Karan Patel, Catherine D. Schuman, J. Darby Smith, Jaesuk Kwon, Andrew Maicke, Jared Arzate, Jean Anne C. Incorvia. 1-5 [doi]
- Live Demonstration: Optical Communications using Solar CellsWalter D. Leon-Salas, Diana Narvaez-Bernal, Rodrigo Esparza, Gabriel Baquero. 1 [doi]
- A Fully Synthesizable Capacitorless Digital LDO for Distributed Power Delivery NetworkChengwei Cao, Yiwen Tang, Xiongchuan Huang, Zhuo Zou, Lirong Zheng 0001. 1-5 [doi]
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- Digital Background Calibration Techniques for Interstage Gain Error and Nonlinearity in Pipelined ADCsQiao Wang, Xizhu Peng, Zhifei Lu, Yutao Peng, Zhe Hu, He Tang. 1-5 [doi]
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- A 0.5-V Feedback-based CMOS Buffer with Rail-to-rail Operating RangeFeifan Gao, Pak Kwong Chan. 1-5 [doi]
- Live Demonstration: Man-in-the-Middle Attack on Edge Artificial IntelligenceBowen Hu, Weiyang He, Si Wang, Wenye Liu, Chip-Hong Chang. 1 [doi]
- Design of High-Performance and Compact CAM for Supporting Data-Intensive ApplicationsLiu Liu, Ann Franchesca Laguna, Michael T. Niemier, Xiaobo Sharon Hu. 1-5 [doi]
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- Reducing the Energy Dissipation of Large Language Models (LLMs) with Approximate MemoriesZhen Gao 0005, Jie Deng, Pedro Reviriego, Shanshan Liu 0001, Fabrizio Lombardi. 1-5 [doi]
- Interference Technology of Microphone Equipment Based on Time-Frequency MosaicZichuan Yu, Lu Tang, Jianxun Li, Kai Wang, Yongchen Chen. 1-5 [doi]
- Passive Lightweight On-chip Sensors for Power Side Channel Attack DetectionNael Mizanur Rahman, Uday Kamal, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Saibal Mukhopadhyay. 1-5 [doi]
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- Modeling of DC-DC Converters with Neural Ordinary Differential EquationsHanchen Ge, Canjun Yuan, Yaofeng Liang, Jinpeng Lei, Zhicong Huang. 1-4 [doi]
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