Kazuyuki Wada - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 25 from 25

2024

An Output Voltage Estimation and Regulation System Using Only the Primary-Side Electrical Parameters for Wireless Power Transfer CircuitsTakahiro Fujita, Kazuyuki Wada, Kawori Sekine. ieiceta, 107(1):16-24, January 2024. [doi]

2021

Unitary equivalence classes of split-step quantum walksAkihiro Narimatsu, Hiromichi Ohno, Kazuyuki Wada. qip, 20(11):368, 2021. [doi]

2020

A weak limit theorem for a class of long-range-type quantum walks in 1dKazuyuki Wada. qip, 19(1):2, 2020. [doi]

2018

Multilevel pre-equalization using an analog FIR filter with multiple binary delay lines for 20-Gb/s 4-PAM multimode fiber transmissionRyoichiro Nakamura, Kenta Amino, Kawori Sekine, Kazuyuki Wada, Moriya Nakamura. ieiceee, 15(1):20171117, 2018. [doi]

2017

Analog FIR filter derived from the generating function for the Bernoulli numbersYoshitaka Kitani, Kazuyuki Wada, Kawori Sekine, Moriya Nakamura. newcas 2017: 97-100 [doi]

2009

A 0.6-V Dynamic Biasing Filter With 89-dB Dynamic Range in 0.18-µm CMOSIppei Akita, Kazuyuki Wada, Yoshiaki Tadokoro. jssc, 44(10):2790-2799, 2009. [doi]

Multi-path Filters Robust to Substrate Noise and NonlinearityKazuyuki Wada, Yukiya Kiyokawa, Retdian A. Nicodimus, Shigetaka Takagi, Takahide Sato, Nobuo Fujii. iscas 2009: 2950-2953 [doi]

2008

A 0.8-V Syllabic-Companding Log Domain Filter with 78-dB Dynamic Range in 0.35-µm CMOSIppei Akita, Kazuyuki Wada, Yoshiaki Tadokoro. ieicet, 91-C(1):87-95, 2008. [doi]

Multi-Path Analog Circuits Robust to Digital Substrate NoiseShigetaka Takagi, Retdian A. Nicodimus, Kazuyuki Wada, Takahide Sato, Nobuo Fujii. ieicet, 91-A(2):535-541, 2008. [doi]

2007

Simplified Low-Voltage CMOS Syllabic Companding Log Domain FilterIppei Akita, Kazuyuki Wada, Yoshiaki Tadokoro. iscas 2007: 2244-2247 [doi]

Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain IntegratorsIppei Akita, Kazuyuki Wada, Yoshiaki Tadokoro. ieicet, 90-A(2):339-350, 2007. [doi]

Band Connections for Digital Substrate Noise Reduction Using Active Cancellation CircuitsHiroto Suzuki, Kazuyuki Wada, Yoshiaki Tadokoro. ieicet, 90-A(2):372-379, 2007. [doi]

2006

Low-voltage CMOS syllabic-companding log domain filterIppei Akita, Kazuyuki Wada, Yoshiaki Tadokoro. iscas 2006: [doi]

2005

Design Optimization of Active Shield Circuits for Digital Noise Suppression Based on Average Noise EvaluationRetdian A. Nicodimus, Hiroto Suzuki, Kazuyuki Wada, Shigetaka Takagi. ieicet, 88-A(2):444-450, 2005. [doi]

2003

RC polyphase filter with flat gain characteristicKazuyuki Wada, Yoshiaki Tadokoro. iscas 2003: 537-540 [doi]

2002

2001

Active guard band circuit for substrate noise suppressionShigetaka Takagi, N. R. Agung, Kazuyuki Wada, Nobuo Fujii. iscas 2001: 548-551 [doi]

2000

1998

Reduction in output DC offset voltage of integrator-based filtersKazuyuki Wada, Shigetaka Takagi, Nobuo Fujii. icecsys 1998: 17-20 [doi]

1995

Design automation for integrated continuous-time filters using integratorsKazuyuki Wada, Shigetaka Takagi, Zdzislaw Czarnul, Nobuo Fujii. aspdac 1995: [doi]

Sign in or sign up to see more results.

runs on WebDSL