Table of Contents

• Worldwide trends in the microsystems industry, technology and marketsJ. Malcolm Wilkinson. 3-7 [doi]
• VLSI architectures for multimediaPeter Pirsch, Hans-Joachim Stolberg. 3-11 [doi]
• Analog VLSI for collective computationEric A. Vittoz. 3-6 [doi]
• Predictive correlated double sampling switched-capacitor integratorsJorge A. Grilo, Gabor C. Temes. 9-12 [doi]
• General design method for the filters based on the requirements and a filter design chartRefet Ramiz, Filiz Günes. 11-14 [doi]
• Offset- and gain-compensated track-and-hold stagesYunteng Huang, Gabor C. Temes, Paul F. Ferguson Jr.. 13-16 [doi]
• 2 Lauri Sumanen, Mikko Waltari, Kari Halonen. 15-18 [doi]
• Design method of analog lowpass filters with monotonic response and arbitrary flatnessTakehisa Ueda, Naoyuki Aikawa, Masamitsu Sato. 15-18 [doi]
• Reduction in output DC offset voltage of integrator-based filtersKazuyuki Wada, Shigetaka Takagi, Nobuo Fujii. 17-20 [doi]
• High-speed CMOS switched-current D/A converters for low-power/low-voltage signal processing applicationsJin-Sheng Wang, Chin-Long Wey. 19-22 [doi]
• Design of optimum high order crossover coefficientsKarel Hájek, Jirí Sedlácek. 19-22 [doi]
• A high-performance CMOS voltage followerGaetano Palumbo, Salvatore Pennisi. 21-24 [doi]
• Study of low sensitivity property of delta operator based sampled-data filtersI-Hung Khoo, Hari C. Reddy, George S. Moschytz. 23-26 [doi]
• A current steering architecture for 12-bit high-speed D/A convertersAugusto Manuel Marques, J. Bastos, Michiel Steyaert, Willy Sansen. 23-26 [doi]
• A 3 V, 10 bit, 6.4 MHz switched-current CMOS A/D converter designBengt E. Jonsson. 27-30 [doi]
• An 9-GHz silicon-on-insulator CMOS amplifierWolfgang Barthel, Wolfram Budde. 27-30 [doi]
• The design of a direct-conversion paging receiver quadrature converter for wrist watch applicationsQiuting Huang. 29-32 [doi]
• A 1.8 GHz low-noise amplifier in CMOS/SIMOX technologyMatthias Vorwerk, Dietmar Eggert. 31-34 [doi]
• An high-swing, 1.8 V, push-pull opamp for sigma-delta modulatorsPiero Malcovati, Franco Maloberti, Maurizio Terzani. 33-36 [doi]
• Monolithic feedback LNA for active antenna simultaneously input port signal and noise matchedHenrique José da Silva, Maria João Rosário. 33-36 [doi]
• A highly linear operational transconductance amplifier for large signal operationsJürgen Oehm, K. Schumacher. 35-38 [doi]
• An integrated narrow band, high resolution synthesizerMartin T. Hill, Antonio Cantoni. 37-40 [doi]
• A 1.8 V low-power CMOS high-speed four quadrant multiplier with rail-to-rail differential inputChi-Hung Lin, Mohammed Ismail 0001. 37-40 [doi]
• Low-voltage medium Q-SC filters for high frequency communication applicationsU. Kleine, T. Pasch. 39-42 [doi]
• Log-domain filters for low-voltage low-power applicationsManfred Punzenberger, Christian Enz. 41-44 [doi]
• Design of low voltage BiCMOS power amplifiers for wireless communicationsFernando Fortes, Maria João Rosário. 41-44 [doi]
• A 1.2 V rail-to-rail switched bufferGiuseppe Ferri, Alfredo Costa, Andrea Baschirotto. 45-48 [doi]
• Low-power domino logic multiplier using low-swing techniqueAbdoul Rjoub, Odysseas G. Koufopavlou. 45-48 [doi]
• A complex multiplier with low logic depthAnders Berkeman, Viktor Öwall, Mats Torkelson. 47-50 [doi]
• Low voltage low power high-speed BiCMOS multiplierKuo-Hsing Cheng, Yu-Kwang Yeha, Farn-Sou Lian. 49-50 [doi]
• Silicon MMICs for millimeter wave communication linksJohann-Friedrich Luy, Bernd Adelseck. 51-54 [doi]
• Design of a low power 54×54-bit multiplier based on a pass-transistor logicMinkyu Song. 51-56 [doi]
• Pipelined modified Booth multiplicationAngus Wu, K. C. Tang, C. K. Ng. 51-54 [doi]
• Pipelined RNS multipliers: an application to scalingAntonio García 0001, Antonio Lloris-Ruíz. 55-58 [doi]
• InP-HBT-based VHSICs and OEICs for optical fiber communication systemsMehran Mokhtari, Urban Westergren, Bo Willén, Thomas Swahn, W. E. Stanchina. 55-58 [doi]
• High-speed ECL-compatible serial I/O in 0.35 μm CMOSHormoz Djahanshahi, F. Hansen, C. Andre T. Salama. 59-62 [doi]
• An approach towards understanding an open-structure frequency-doublerM. Shaalan, M. Bozzi, J. Weinzierl, H. L. Hartnagel. 59-63 [doi]
• A very-long instruction word digital signal processor based on the logarithmic number systemVassilis Paliouras, J. Karagiannis, G. Aggouras, Thanos Stouraitis. 59-62 [doi]
• Wide-area clock distribution using controlled delay linesRui L. Aguiar, Dinis M. Santos. 63-66 [doi]
• Base station transceiver design in a digital wireless local loop systemA. Navarro, P. Silva, P. Ribau, R. Silva, J. Figueiredo, J. Matos, A. Gameiro. 65-68 [doi]
• A repeater timing model and insertion algorithm to reduce delay in RC tree structuresVictor Adler, Eby G. Friedman. 67-70 [doi]
• A topological approach for determining the uniqueness of the DC solutionArturo Sarmiento-Reyes, Rafael Vargas-Bernal, Eduard Kleihorst. 67-70 [doi]
• Scalable pseudo-optical switching system for multi-protocol environmentEwa Sokolowska, Guillaume Fortin, Nacer Belabbes, Mathieu Gagnon, Bozena Kaminska. 69-72 [doi]
• Modeling and stability in MOS transistor circuitsMichal Tadeusiewicz. 71-74 [doi]
• A new general connectivity model and its applications to timing-driven Steiner tree routingDongsheng Wang, Ernest S. Kuh. 71-74 [doi]
• Evolutionary tuning method for automatic impedance matching in communication systemsYichuang Sun, Wai Kit Lau. 73-77 [doi]
• A linear programming implementation of a interval method for global non-linear DC analysisLubomir V. Kolev, Valeri M. Mladenov. 75-78 [doi]
• Spice simulations of DC electrothermal interactions in bipolar electronic circuitsJanusz Zarebski. 77-80 [doi]
• Discrete-time version of Kalman-Yacubovitch-Popov lemma for non-linear systemsIzzet Cem Göknar, Neslihan Serap Sengör. 79-82 [doi]
• A simplification before and during generation methodology for symbolic large-circuit analysisOscar Guerra, Juan D. Rodríguez-García, Elisenda Roca, Francisco V. Fernández 0001, Ángel Rodríguez-Vázquez. 81-84 [doi]
• A technique for fast AC statistical analysis of analog circuitsRafael Rodríguez-Macías, Ángel Rodríguez-Vázquez. 81-84 [doi]
• TM bytecodes to hardware through high-level synthesisJoão M. P. Cardoso, Horácio C. Neto. 85-88 [doi]
• Fast calculation of analog circuits' feasibility regions by low level functional measuresStephan Zizala, Josef Eckmüller, Helmut Gräb. 85-88 [doi]
• Methods and tools for characterisation of semiconductor device modelsAgnieszka Konczykowska, Wlodek M. Zuberek. 85-88 [doi]
• Efficient symbolic analysis of analog integrated circuits using determinant decision diagramsWim Verhaegen, Georges G. E. Gielen. 89-92 [doi]
• FPGA based prototyping using a target driven FSM partitioning strategyKlaus Feske, Steffen Rülke, Manfred Koegst. 89-92 [doi]
• Optimization of WDM multihop logical topologiesNoélia S. C. Correia, Maria do Carmo R. Medeiros. 91-94 [doi]
• Variable ordering for regular layout representationMalgorzata Chrzanowska-Jeske, Yang Xu. 93-96 [doi]
• Retrieval of butterfly from its sketched image utilizing image navigation directory on multimedia networkMitsuru Nagao, Kayo Suzuki, Akira Muraki, Hiroaki Ikeda, Yoshifumi Shimodaira, Masato Yamazaki. 95-98 [doi]
• Timing analysis using propositional satisfiabilityLuís Guerra e Silva, João P. Marques Silva, Luís Miguel Silveira, Karem A. Sakallah. 95-98 [doi]
• Mixed hardware/software applications on dynamically reconfigurable hardwareJoão Canas Ferreira, José Silva Matos. 97-100 [doi]
• A new formulation for accurate numerical extraction of interconnect capacitance in ULSIHoan H. Pham, Arokia Nathan. 99-102 [doi]
• Video teleconferencing in multimedia systemsMoshe Porat. 99-102 [doi]
• Using multiple attractor chaotic systems for communicationThomas L. Carroll, Louis M. Pecora. 103-106 [doi]
• Transient analysis for high-speed interconnect networks based on AWE and delay evaluation techniqueTakayuki Watanabe, Hideki Asai. 103-106 [doi]
• Integrated partition integer execution unit for multimedia and conventional applicationsK. C. Tang, Angus K. M. Wu, Anthony S. Fong, Derek C. W. Pao. 103-107 [doi]
• An analysis method for the performance comparison of communication systemsAndreas Abel, Marco Götz, Wolfgang Schwarz. 107-110 [doi]
• Analysis of wavelet features for myoelectric signal classificationPeter Wellig, George S. Moschytz. 109-112 [doi]
• Neural network simulator for spatiotemporal pattern analysisAtsushi Kamo, Hiroshi Ninomiya, Teru Yoneyama, Hideki Asai. 109-112 [doi]
• Using nonlinear dynamics to improve the noise performance of chaos communication systemsHervé Dedieu, Maciej J. Ogorzalek. 111-114 [doi]
• Methods based on wavelets for time delay estimation of ultrasound signalsC. Guetbi, Denis Kouamé, Abdeldjalil Ouahabi, J.-P. Chemla. 113-116 [doi]
• An asymmetric basis function network for approximation of dynamical systemsKazushi Umetsu, Toshimichi Saito. 113-116 [doi]
• Chaotic pulse-train separation and multiplex communicationHiroyuki Torikai, Toshimichi Saito. 115-118 [doi]
• Speech compression with wavelet packetsRaquel Gómez Sánchez, Diego Andina, Joaquin Torres. 117-120 [doi]
• WAV-a weight adaptation algorithm for normalized radial basis function networksYing Li, Jiun-Ming Deng. 117-120 [doi]
• Automated design of folded-cascode op-amps with sensitivity analysisMaria del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee. 121-124 [doi]
• Combining PCA and MCA by using recursive least square learning methodArnold Shu-Yan Wong, Kwok-Wo Wong, Chi-Sing Leung. 121-124 [doi]
• Wavelet analysis method for processing and recognition of abdominal fetal ECG waveformDatian Ye, Yu Cao, Qin Gong. 121-124 [doi]
• Circuit equations for fast fault simulation and diagnosis of linear circuitsJosé A. Soares Augusto, C. F. Beltrá Almeida. 125-128 [doi]
• On the current-mode current conveyor-based high-order filter realisationsSerdar Özoguz, Cevdet Acar. 127-130 [doi]
• A continuous-time area detector servo demodulator for hard disk drivesNuno de Figueiredo Garrido, José E. Franca. 127-130 [doi]
• Non-linear circuit simulation of complex spectra in the frequency domainNuno Borges de Carvalho, José Carlos Pedro. 129-132 [doi]
• CCII-based balanced fully integrated continuous-time filter synthesis: signal-flow graph approachSerdar Özoguz, Ece Olcay Günes, Hassan O. Elwan, Tuna B. Tarim. 131-133 [doi]
• Towards a silicon implementation of the olfactory systemVítor M. Grade Tavares, José C. Príncipe. 131-134 [doi]
• A cost effective smart power approach with NMOS based blocks in standard CMOS technologyS. Finco, P. Tavares, Pedro M. Santos 0001, A. P. Casimiro, F. H. Behrens, Mário Lança, M. I. Castro Simas. 135-138 [doi]
• Current-mode biquadratic filters using dual output current conveyorsYichuang Sun, Barry Jefferies. 135-138 [doi]
• Programmable sine wave generator employing a mismatch-shaping DACLuis Hernandez, Alejandro Quesada. 135-138 [doi]
• Multi bit DAC with corrective gate to drain voltage for optimum matching under gradient temperature effectsMichael Mojal. 139-142 [doi]
• An analog VLSI circuit implementing an orthogonal continuous wavelet transformDongwei Chen, John G. Harris. 139-142 [doi]
• Approach to the realization of state variable based oscillatorsPedro A. Martínez, Concepción Aldea, Justo Sabadell, Santiago Celma. 139-142 [doi]
• High-speed A/D and D/A converters using hybrid filter banksOmid Oliaei. 143-146 [doi]
• A high performance class AB current conveyorTakashi Kurashina, Satomi Ogawa, Kenzo Watanabe. 143-146 [doi]
• Efficient implementation of multiplier-free decimation filters for ΣΔ A/D conversionMarco Brambilla, Valentino Liberali. 145-148 [doi]
• An 8-bit low-power ADC array for CMOS image sensorsSteve Tanner, Alexandre Heubi, Michael Ansorge, Fausto Pellandini. 147-150 [doi]
• The use of predictive correlated double sampling techniques in low-voltage delta-sigma modulatorsJorge A. Grilo, Gabor C. Temes. 149-152 [doi]
• A 1.8 GHz subsampling CMOS downconversion circuit for integrated radio applicationsEllie Cijvat, Patrik Eriksson, N. Tan, Hannu Tenhunen. 149-152 [doi]
• Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital convertersAugusto Manuel Marques, Valentino Peluso, Michiel Steyaert, Willy M. C. Sansen. 153-156 [doi]
• Implementation of maximum dynamic range integratorsJose P. Moreira, Chris J. M. Verhoeven. 153-156 [doi]
• The design of 2 V 1 GHz CMOS low-noise bandpass amplifier with good temperature stability and low power dissipationChung-Yu Wu, Jeng Gong, Yu Cheng. 153-156 [doi]
• Interactive verification of switched-current sigma-delta modulatorsJosé Manuel de la Rosa, Andreas Kaiser, Maria Belen Pérez-Verdú. 157-160 [doi]
• Fully-balanced structures of continuous-time MLF OTA-C filtersYichuang Sun, Kel Fidler. 157-160 [doi]
• A high Q RF CMOS differential active inductorR. Akbari-Dilmaghani, Alison Payne, Christofer Toumazou. 157-160 [doi]
• Practical considerations for the design of cascade multi-bit high-frequency ΣΔ modulatorsFernando Medeiro, Rocío Del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez. 161-164 [doi]
• Stability of a continuous-time state variable filter with ORA-L and current amplifier integratorsTim Bakken, John Choma Jr.. 161-164 [doi]
• A high frequency harmonic VCO with an artificial varactorKari Stadius, Risto Kaunisto, Veikko Porra. 161-164 [doi]
• A low-voltage low-power CMOS V-I converter with rail-to-rail differential input for filtering applicationsChi-Hung Lin, Tales C. Pimenta, Mohammed Ismail 0001. 165-168 [doi]
• Basic principles and new solutions for analog sampled-data image rejection mixersKong-Pang Pun, José E. Franca, Carlos Azeredo Leme. 165-168 [doi]
• Leakage power reduction in low-voltage CMOS designsKaushik Roy. 167-173 [doi]
• A 4 Hz low-pass continuous-time filterSergio A. Solis-Bustos, José Silva-Martínez. 169-172 [doi]
• 1.5 V CMOS bootstrapped dynamic logic circuit techniques (BDLCT) suitable for low-voltage deep-submicron CMOS VLSI for implementing 482 MHz digital quadrature modulator and adderJ. H. Lou, James B. Kuo. 171-174 [doi]
• Asynchronous logic in bit-serial arithmeticJuraj Povazanec, Chiu-sing Choy, Cheong-fat Chan. 175-178 [doi]
• Low noise Ku-band drain mixer using P-HEMT technologyMaria Luisa de la Fuente, Joaquín Portilla, Eduardo Artal. 175-178 [doi]
• Design of low-power librariesChristian Piguet. 175-180 [doi]
• Efficient self-timed circuits based on weak NMOS-treesRaúl Jiménez, Antonio J. Acosta, Angel Barriga, Manuel J. Bellido, Manuel Valencia 0001. 179-182 [doi]
• RF circuits fabricated with CMOS-compatible SiGe HBT process moduleMichael Pierschel, Wolfgang Winkler, Matthias Rossberg. 179-182 [doi]
• Techniques for power management at the logic levelJosé C. Monteiro. 181-184 [doi]
• An overview of the current steering logic (CSL): from the gate to the applicationsR. T. L. Sáez, M. Kayal, M. Declercq, M. C. Schneider. 183-186 [doi]
• High-performance monolithic amplifiers in low microwave bands using GaAs MESFET technologyJoaquín Portilla, Juan Pablo Pascual, Héctor García, Eduardo Artal. 183-186 [doi]
• Characterization of leakage power in CMOS technologiesAntoni Ferré, Joan Figueras. 185-188 [doi]
• Extended CNN topologies and VLSI implementationsGiovanni Di Bernardo, Mario Lavorgna, Luigi G. Occhipinti. 189-190 [doi]
• Very high speed integrated circuits for optical communicationAgnieszka Konczykowska, Mounir Meghelli. 189-192 [doi]
• A 48 by 48 CNN chip operating with B/W imagesAri Paasio, Asko Kananen, Kari Halonen, Veikko Porra. 191-194 [doi]
• Design and FPGA implementation of digit-serial FIR filtersJavier Valls, M. M. Peiro, Trinidad Sansaloni, Eduardo I. Boemo. 191-194 [doi]
• An electrically adjustable equalizer for very high bit rate transmission systems based on dispersion supported transmissionPaulo P. Monteiro, Mário J. N. Lima, José Ferreira da Rocha, António L. J. Teixeira, B. Franz, B. Wedding. 193-196 [doi]
• An all digital phase-locked loop with modified binary search of frequency acquisitionShyh-Jye Jou, Ya-Lan Tsao, I.-YingYang. 195-198 [doi]
• High performance interconnection architecture for large cellular neural networksMario Salerno, Fausto Sargeni, Vincenzo Bonaiuto. 195-198 [doi]
• A 3 GHz silicon-BJT active resonator and filterRisto Kaunisto, Kari Stadius, Veikko Porra. 197-200 [doi]
• A systolic architecture for Kalman-filter-based signal reconstruction using the wave pipeline methodDaniel Massicotte, Boubker M. Elouafay. 199-202 [doi]
• CASTLE: an emulated digital CNN architecture; design issues, new resultsÁkos Zarándy, Péter Keresztes, Tamás Roska, Péter Szolgay. 199-202 [doi]
• Design techniques for highly efficient class-F amplifiers driven by low voltage suppliesJosé Carlos Pedro, Luís Ramos Gomes, Nuno Borges Carvalho. 201-204 [doi]
• Architecture of a coprocessor module for image compositingMladen Berekovic, Peter Pirsch. 203-206 [doi]
• A 64×64 CNN universal chip with analog and digital I/OServando Espejo, Rafael Domínguez-Castro, Gustavo Liñán, Ángel Rodríguez-Vázquez. 203-206 [doi]
• Design of clock-recovery GaAs ICs for high-speed communication systemsMário J. N. Lima, Paulo P. Monteiro, José Ferreira da Rocha, António L. J. Teixeira, J. Nuno Matos. 205-208 [doi]
• Designing peak-constrained arbitrary-phase FIR digital filters with low passband-to-stopband energy ratioSergio L. Netto, Paulo S. R. Diniz. 207-210 [doi]
• Genetic algorithms for adaptive non-linear predictorsAndré Neubauer. 209-212 [doi]
• SymbSI-a program for the symbolic signal flow graph generation of switched current circuitsM. H. Fino, L. J. Mourão. 211-214 [doi]
• Colored input-signal analysis of normalized data-reusing LMS algorithmsMarcello L. R. de Campos, J. A. Apolinário Jr., Paulo S. R. Diniz. 213-216 [doi]
• Testability of AND-EXOR logic vs. AND-OR logicLuis Parrilla 0001, Julio Ortega, Antonio Lloris-Ruíz. 213-216 [doi]
• Symbolic synthesis of analog-to-digital conversion architectures using direct-mapping techniquesWeibiao Zhang, Huimin Xia, Raed Al-Omari, Marwan Hassoun. 215-218 [doi]
• HTDD based parallel fault simulatorJoanna Sapiecha, Krzysztof Sapiecha, Stanislaw Deniziak. 217-220 [doi]
• An expanded MFBLP method with reduced computational complexity for estimating sinusoids frequenciesIlan Druckmann, Eugene I. Plotkin, M. N. S. Swamy. 217-220 [doi]
• Symbolic synthesis of non-linear data convertersJorge Guilherme, Nuno C. G. Horta, José E. Franca. 219-222 [doi]
• An orthogonal adaptive IIR realization for efficient MSOE optimizationJuan E. Cousseau, Paulo S. R. Diniz, Guillermo B. Sentoni, Osvaldo E. Agamennoni. 221-224 [doi]
• A design for test technique to increase the resolution of analogue supply current testsChris D. Chalk, Mark Zwolinski. 221-224 [doi]
• A symbolic expressions approximation method based on fully symbolic conditionsIdoia Aguirre, Alfonso Carlosena. 223-226 [doi]
• Nonlinear circuit fault diagnosis with large change sensitivityMatthew Worsman, Mike W. T. Wong. 225-228 [doi]
• Blocking effect reduction based on optimal filteringDaehee Kim, Yo-Sung Ho. 225-228 [doi]
• Hierarchical mechanisms for high-level modeling and simulation of digital systemsRicardo Jorge Machado, João Miguel Fernandes, Alberto José Proença. 229-232 [doi]
• A flexible MIMD pixel processor for high quality MPEG-2 motion and vector processingP. Garino, A. Finotello, M. Gandini, M. Marchisio, Martin Gumm, Friederich Mombers, Stephanie Dogimont, I. Remi. 231-234 [doi]
• Gaussian characterization of self-interference during synchronization of chaos based DS-CDMA systemsGianluca Setti, Gianluca Mazzini, Riccardo Rovatti. 231-234 [doi]
• TESA: Timeparallel Estimation of Switching Activity under a real delay modelK. Kapp, Markus Bühler, D. Dallmann, Utz G. Baitinger. 233-236 [doi]
• A refinement algorithm for vector quantization codebook designArmando Malanda-Trigueros, Aníbal R. Figueiras-Vidal. 235-238 [doi]
• Progress towards a microwave chaotic communications system: triumphs and tribulations in realizing broadband high-frequency chaotic oscillatorsChristopher P. Silva, Albert M. Young. 235-238 [doi]
• Fault-tolerance: new trends for digital circuitsJose Miguel Vieira dos Santos, José Manuel Martins Ferreira. 237-240 [doi]
• A shape-adaptive partitioning method for MPEG-4 video encodingYong He, Ishfaq Ahmad, Ming L. Liou. 239-242 [doi]
• Design considerations for a linear modulation DCSK chaos-based radioManuel Delgado-Restituto, Ángel Rodríguez-Vázquez, Veikko Porra. 239-242 [doi]
• A DSP testing approach by modeling the circuit response as a Markov chainMustapha Slamani, Maddi Zineb, Mounir Boukadoum. 241-247 [doi]
• Video segmentation of MPEG compressed dataIrena Koprinska, Sergio Carrato. 243-246 [doi]
• A robust chaotic communications system based on generalised synchronisationC. Williams. 243-246 [doi]
• Bit rate control of internetworking video transcodersPedro A. Amado Assunção, Mohammed Ghanbari. 247-250 [doi]
• Application of distributed control unit (DCU) in machine control areaZhu Zheng. 249-252 [doi]
• 4-subject 4-channel optical telemetry system for use in electrocardiogramsJongdae Park, JinWoo Son, Heedon Seo, M. Ishida. 251-254 [doi]
• Reducing the designing time of configurable interfaces oriented to control applicationsMaría Dolores Valdés, María José Moure, L. Rodríguez, Enrique Mandado. 253-257 [doi]
• Two-layer perceptron for fast plasma density evaluation in broadband reflectometryF. D. Nunes, J. Santos, M. E. Manso. 253-256 [doi]
• Spin-valve tape headsNuno J. Oliveira, Paulo P. Freitas. 255-258 [doi]
• The CHNN nonlinear combination generatorChi-Kwong Chan, L. M. Cheng. 257-260 [doi]
• Force sensing in microrobotic systems - an overviewStephan Fahlbusch, Sergej Fatikow. 259-262 [doi]
• An architecture for a home automation systemRenato Nunes, José Delgado. 259-262 [doi]
• A neural discriminator capable to identify impurities in the data sampleJosé Manoel de Seixas, D. O. Damazio. 261-264 [doi]
• Hardware support for CAN fault-tolerant communicationJosé Rufino, Nuno Pedrosa, José Monteiro, Paulo Veríssimo, Guilherme Arroz. 263-266 [doi]
• Surveying the pipeline temperature and pressure profile using an in-line acquisition toolArlindo Rodrigues Filho, Alexandre da Cunha Dias. 263-266 [doi]
• Self-organizing neural network for fault location in electrical circuitsStanislaw Osowski, Krzysztof Siwek. 265-268 [doi]
• Giant magnetoresistive sensors for rotational speed control and current monitoring applicationsP. P. Freitas, Fernando B. Silva, Luis V. Melo, Jose L. Costa, Nuno Almeida, J. Bernardo. 267-269 [doi]
• Running an industrial robot from a typical personal computerJ. Norberto Pires, José M. G. Sá da Costa. 267-270 [doi]
• A novel coding scheme for the ROM of parallel ADCs, featuring reduced conversion noise in the case of single bubbles in the thermometer codeS. Padoan, Andrea Boni, Carlo Morandi, F. Venturi. 271-274 [doi]
• CMOS on-chip ESD protection design with substrate-triggering techniqueMing-Dou Ker, Tung-Yang Chen, Chung-Yu Wu. 273-276 [doi]
• A virtual instrumentation support systemLuís F. F. Brito Palma, Adelino R. Ferreira da Silva. 273-276 [doi]
• Generalized linear model for ΣΔ modulatorsGeorge I. Bourdopoulos, Aristodemos Pnevmatikakis, Theodore L. Deliyannis. 275-278 [doi]
• The neuron-bipolar junction transistor (v-BJT)-a new device structure for VLSI neural network implementationChung-Yu Wu, Wen-Cheng Yen. 277-280 [doi]
• n noise model on low noise design of an amplifierJiansheng Xu, Yisong Dai. 277-281 [doi]
• A technique for the reduction of the input resistance of current-mode circuitsGaetano Palumbo, Salvatore Pennisi. 279-282 [doi]
• RISC-based coprocessor with a dedicated VLSI neural networkYoung-Chul Kim, Deung-Ku Kang, Tae-Won Lee. 281-283 [doi]
• A switched-current slice of cells for adaptive filtersAlexandre S. de la Vega, Antônio Carlos M. de Queiroz, Paulo S. R. Diniz. 283-286 [doi]
• Asynchronous wave pipelines for high throughput datapathsO. Hauck, Sorin A. Huss. 283-286 [doi]
• An analog CMOS realisation of a reconfigurable discrete-time cellular neural networkVictor M. Brea, David López Vilariño, Diego Cabello. 285-288 [doi]
• A BiCMOS low-voltage transconductor for VHF continuous-time filtersTsung-Sum Lee, Yuh-Dong Chen. 287-290 [doi]
• Design of CML gate with the best propagation delayMassimo Alioto, Gaetano Palumbo. 287-290 [doi]
• Low-power macro-cells for pulse code arithmeticSigbjørn Næss, Tor Sverre Lande. 289-292 [doi]
• A digital PID controller for real time and multi loop control: a comparative studyL. Samet, Nouri Masmoudi, M. W. Kharrat, Lotfi Kamoun. 291-296 [doi]
• A comparative study of two SC-CMFB networks used in fully differential OTAHector Recoules, Rachid Bouchakour, Patrick Loumeau. 291-294 [doi]
• General purpose neuroemulator architecture: design and VHDL simulationNicolás J. Medrano-Marqués, Bonifacio Martín-del-Brío. 293-296 [doi]
• Statistical design of a D/A converter based on the current division techniqueTuna B. Tarim, H. Hakan Kuntman, Mohammed Ismail 0001. 295-298 [doi]
• A low-cost neuroprocessor board for emulating the SOFM neural modelBonifacio Martín-del-Brío, Nicolás J. Medrano-Marqués, Sergio Hernández-Sánchez. 297-300 [doi]
• Programmable analog hardware: a case studyJulio Faura, Ignacio Lacadena, Antonio Torralba 0002, Josep Maria Insenser. 297-300 [doi]
• Analysis of parameter-independent PLLs with bang-bang phase-detectorsThomas Toifl, Paulo Moreira, Alessandro Marchioro, Pisana Placidi. 299-302 [doi]
• A virtual instrumentation support systemLuís F. F. Brito Palma, Adelino R. Ferreira da Silva. 301-304 [doi]
• An asynchronous pulse neural network model and its analog IC implementationYoshihiko Horio, Hidekazu Yasuda, Mitsuru Hanagata, Kazuyuki Aihara. 301-304 [doi]
• A bandgap voltage reference using digital CMOS processLuiz Lenarth G. Vermaas, Carlos R. T. de Mori, Robson L. Moreno, Adriano M. Pereira, Edgar Charry R.. 303-306 [doi]
• A clock-feedthrough compensated switched current integratorMourad Loulou, P. Riffaud-Desgreys, Philippe Marchegay, E. Garnier. 305-308 [doi]
• Multiple-input transconductance CMOS amplifier for implementation in continuously programmable cellular neural networksTomasz Kacprzak. 305-308 [doi]
• GaAs MESFET multi-output current mirrors and their application to high frequency filtersNobukazu Takai, Nobuo Fujii. 307-310 [doi]
• A computer assisted learning tool for electronic design trainingLoreto Rodríguez-Pardo, María José Moure, María Dolores Valdés, Enrique Mandado. 309-312 [doi]
• A high transimpedance-bandwidth, high dynamic range, CMOS front-end for open air optical linksJosé Luis Cura, Eduardo de Vasconcelos, Rui L. Aguiar. 309-312 [doi]
• Design issues towards the integration of passive components in silicon RF VCOsAristides Kiranas, Yannis Papananos. 311-314 [doi]
• Remote control of a DC motor using infra-red radiationLuís F. F. Brito Palma, Adelino R. Ferreira da Silva. 313-316 [doi]
• A 1.5 V CMOS voltage multiplierGianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo. 313-316 [doi]
• Dynamic element matching for pipelined A/D conversionPieter Rombouts, Ludo Weyten. 315-318 [doi]
• Software lab for semiconductor device characterizationM. J. Sharifi, A. Adibi. 317-320 [doi]
• Instrumentation amplifier based analogue interfaceIlias Gkotsis, George Souliotis, Ioannis Haritantis. 317-320 [doi]
• Design of radiofrequency stages for a high rate digital modemJ.-Ph. Lambert, Abbas Dandache, Fabrice Monteiro, Bernard Lepley. 319-322 [doi]
• An experimental course on digital communicationsEduard Bertran, F. Tarres, Gabriel Montoro. 321-324 [doi]
• Design of CMOS OTA amplifiers and oscillators in a digital sea-of-transistors arrayJung Hyun Choi, Sergio Bampi. 321-324 [doi]
• A 4 GHz CMOS multiple modulus prescalerRami Ahola, Kari Halonen. 323-326 [doi]
• Virtual VHDL laboratoryTania Vassileva, Vassilliy Tchoumatchenko, Ilario Astinov, Ivan Furnadjiev. 325-328 [doi]
• Electrostatic discharge protection circuits in CMOS IC's using the lateral SCR devices: an overviewMing-Dou Ker. 325-328 [doi]
• Spin polarized tunneling for memory cell applicationR. C. Sousa, T. T. Galvão, J. J. Sun, P. P. Freitas. 327-330 [doi]
• Inductors allow low-voltage performance for IC mixersAri Vauhkonen, Esa Tarvainen. 329-332 [doi]
• Affordable tools for teaching embedded systemsJosé Alberto Fonseca, Alexandre Mota 0002, Fernando Santos, Pedro Fonseca 0003, José Luís Azevedo, José Luis Cura. 329-332 [doi]
• A low noise, low residual offset, chopped amplifier for mixed level applicationsMihai A. T. Sanduleanu, A. J. M. van Tuijl, R. F. Wassenaar, M. C. Lammers, H. Wallinga. 333-336 [doi]
• High performance trajectory control using a neural network cross-coupling gain schedulerA. J. Crispin, L. Ibrani, G. E. Taylor, G. Waterworth. 333-336 [doi]
• Ultra low voltage transconductance amplifierTor Sverre Lande, Yngvar Berg. 333-336 [doi]
• A new current mode synthesis method for dynamic translinear filters and its application in hearing aidsDorra Masmoudi, Wouter A. Serdijn, Jan Mulder, Albert C. van der Woerd, Jean Tomas, Jean Paul Dom. 337-340 [doi]
• Transient power in CMOS gates driving LC transmission linesYehea I. Ismail, Eby G. Friedman, José Luis Neves. 337-340 [doi]
• A low-voltage high-frequency integrator for CMOS continuous-time current-mode filtersJusto Sabadell, Concepción Aldea, Santiago Celma, Pedro A. Martínez. 339-342 [doi]
• A low-supply SI-cell using threshold controlOmid Oliaei, Patrick Loumeau. 341-344 [doi]
• Low voltage digitally controlled dB-linear CMOS VGA circuit for wireless communicationHassan O. Elwan, Mohammed Ismail 0001. 341-344 [doi]
• A high-speed fully differential current switchLouis Luh, John Choma Jr., Jeffrey Draper. 343-346 [doi]
• A low voltage differential OpAmp with novel common mode feedbackThomas Pasch, Ulrich Kleine, R. Klinke. 345-348 [doi]
• Flexible hardware acceleration for nesting problemsJoão Canas Ferreira, José Carlos Alves, C. Albuquerque, José Fernando Oliveira, José Soeiro Ferreira, José Silva Matos. 345-348 [doi]
• A continuous-time common-mode feedback circuit (CMFB) for high-impedance current mode applicationLouis Luh, John Choma Jr., Jeffrey Draper. 347-350 [doi]
• CMOS implementation of low-power oscillators based on the modified Fabre-Normand current conveyorJelena Popovic, Borivoje Nikolic, K. Wayne Current, Aleksandra Pavasovic, Dragan Vasiljevic. 349-352 [doi]
• Exact design of multirate switched-current FIR filters with improved phase linearityMarkus Helfenstein, José E. Franca, George S. Moschytz. 351-354 [doi]
• Jitter effects in continuous-time ΣΔ modulators with delayed return-to-zero feedbackO. Oliaei, Hassan Aboushady. 351-354 [doi]
• Nonlinearities in SC delta-sigma A/D convertersJesper Steensgaard. 355-358 [doi]
• A structure for extending the linear input voltage range of a differential input stageKimmo Lasanen, Jussi Tervaluoto, Antti Ruha, Juha Röning. 355-358 [doi]
• Switched-current elliptic decimators based on bilinear-transformed ladder structuresAndrew E. J. Ng, John I. Sewell. 355-358 [doi]
• New CMOS universal constant-Gm input stageVladimir I. Prodanov, Michael M. Green. 359-362 [doi]
• PWM audio power amplifiers: sigma delta versus sliding mode controlJ. Fernando Silva. 359-362 [doi]
• A highly linear second-order stage for 500-MHz third-order and fifth-order filtersKhayrollah Hadidi, K. Eguchi, Takashi Matsumoto 0001, Haruo Kobayashi 0001. 361-364 [doi]
• Double modulation scheme for switching mixers controlled by sigma-delta modulatorsPer Asbeck Nielsen, Carsten Fallesen. 363-366 [doi]
• Feedback vs. feedforward common-mode control: a comparative studyJuan M. Carrillo, José L. Ausín, P. Merchan, J. Francisco Duque-Carrillo. 363-366 [doi]
• A novel design technique for input differential pairs in single-ended operational amplifiersM. Morimoto, Kh. Hadidi, K. Futami, T. Matsumoto. 365-368 [doi]
• Efficient antialiasing decimation filter for ΔΣ convertersLetizia Lo Presti, Adnan Akhdar. 367-370 [doi]
• Simple compensation techniques for current feedback op-ampsSantiago Celma, F. Pérez, Pedro A. Martínez. 367-370 [doi]
• A novel highly linear CMOS bufferKhayrollah Hadidi, Jafar Sobhi-Gheshlaghi, A. Hasankhaan, Daigo Muramatsu, Takashi Matsumoto 0001. 369-371 [doi]
• Voltage amplification using a transconductance feedback amplifierBrett Wilson. 371-374 [doi]
• A 300 MHz 18 dB variable gain amplifierKhayrollah Hadidi, M. Jenabi, Jafar Sobhi-Gheshlaghi, A. Hasankhaan. 373-375 [doi]
• Programmable time-multiplexed SC filters without dynamic range degradationJosé L. Ausín, Guido Torelli, Juan Francisco Duque-Carrillo, Juan M. Carrillo, P. Merchan. 373-376 [doi]
• A high-performance active adderJosé Manoel de Seixas, Augusto Santiago Cerqueira, Luiz Pereira Calôba. 377-380 [doi]
• Cell biasing and balancing in E-cell based single-ended log filtersSergio Callegari, Gianluca Setti. 377-380 [doi]
• Design methodology and performance estimation for complementary gallium arsenideKamran Eshraghian. 379-383 [doi]
• Synthesis of follow-the-leader feedback log-domain filtersJie Wu, Ezz I. El-Masry. 381-384 [doi]
• A parallel analog median filterAlejandro Díaz-Sánchez, Jaime Ramírez-Angulo, Antonio Lopez, Edgar Sánchez-Sinencio. 381-384 [doi]
• OLYMPO: a GaAs compiler for VLSI designJuan A. Montiel-Nelson, Valentin de Armas, Roberto Sarmiento, Antonio Núñez. 385-388 [doi]
• Leapfrog log-domain filtersEmmanuel M. Drakakis, Alison J. Payne. 385-388 [doi]
• On the design of linear-in-the-parameters adaptive filtersTomás Oliveira e Silva. 385-388 [doi]
• A novel half-band SC architecture for efficient analog impulse sampled interpolationSeng-Pan U, Rui Paulo Martins, José E. Franca. 389-393 [doi]
• The exponential CCII-, a building block for log-domain circuitsAntonio López, Alfonso Carlosena. 389-392 [doi]
• Recent advances in 40 Gb/s digital functions for high bit rate telecommunication applicationsJean Hourany, Joseph Bellaiche, Jean-Pierre André, Etienne Delhaye. 389-392 [doi]
• InP-based logic gates for low power monolithic optoelectronic circuits [InGaAs/InAlAs/InP]Andreas Brennemann, E. Bushehri, W. Daumann, M. Agethen, R. M. Bertenburg, Wolfgang Brockerhoff, V. Staroselsky, Vladimir Bratov, Thomas Schlichter, Franz-Josef Tegude. 393-396 [doi]
• An investigation of log domain current feedback amplifiersSolon Despotopoulos, Emmanuel M. Drakakis, Christofer Toumazou. 393-396 [doi]
• Neu-MOS (νMOS) for smart sensors and extension to a novel neu-GaAs (νGaAs) paradigmDerek Abbott, Said F. Al-Sarawi, B. Gonzalez, José Francisco López, J. Austin-Crowe, Kamran Eshraghian. 397-404 [doi]
• An application-specific PSD implemented using standard CMOS technologyA. Mäkynen, Juha Kostamovaara. 397-400 [doi]
• A generalized spline framework for mixed mode signal processingRui J. P. de Figueiredo. 399-400 [doi]
• High speed multi-channel data acquisition chipJugdutt Singh. 401-404 [doi]
• A nearly optimal variable fractional delay filter with extracted Chebyshev windowEwa Hermanowicz. 401-404 [doi]
• A new approach to the design of two-channel perfect reconstruction filter banksRajeev Gandhi, Sanjit K. Mitra. 405-408 [doi]
• A mixed signal CMOS readout chain for imaging spectroscopic pixel X-ray detectorsCharalampos Kapnistis, Konstantinos Misiakos, Nikos Haralabidis. 405-408 [doi]
• Codevelopment of long haul ISDN transceiver and design methodology improves time to marketMarkus Brandstetter, Torsten Harms, Helmut Reinig, Michael Vanrompay. 407-410 [doi]
• Design of stable 2-D recursive filters using power-of-two coefficientsA. Lee, Majid Ahmadi, Reza S. Lashkari. 409-412 [doi]
• A four channel, self-calibrating, high resolution, time to digital converterManuel Mota, Jorgen Christiansen. 409-412 [doi]
• A 0.7 μm CMOS clock recovery circuit for 622 Mb/s SDH systemsEduardo de Vasconcelos, Rui L. Aguiar, Dinis M. Santos. 411-414 [doi]
• Multirate structures for very fast narrow-band digital filteringCarlos Romero, José I. Acha, Joaquín Madrid. 413-416 [doi]
• An integrated diagnostic reconfiguration (IDR) technique for fault tolerant mixed signal microsystemsErfaan Sharif, Tony Dorey, Andrew Richardson. 413-416 [doi]
• Circuit architectures for semi-bit-serial & programmable arithmetic in finite fieldsR. Furness, Mohammed Benaissa, Sebastian T. J. Fenn. 415-418 [doi]
• FPGA prototype of a serial interface circuitJorge A. Polar Seminario, Carlos A. dos Reis Filho. 419-422 [doi]
• Analog implementation of gamma-correction for CMOS camerasRiccardo Rovatti, Eleonora Franchi, Nicolò Manaresi, Alberto Bellini, Marco Tartagni. 419-422 [doi]
• Defect-oriented testing of analogue and mixed signal ICsMarcelino B. Santos, Fernando M. Gonçalves, Michael J. Ohletz, João Paulo Teixeira. 419-424 [doi]
• A mixed-signal fuzzy controller architectureFernando Vidal-Verdú, Rafael Navas-Gonzalez, Ángel Rodríguez-Vázquez. 423-426 [doi]
• Design for testability strategies for mixed signal & analogue designs-from layout to systemAndrew Richardson 0001, Andreas Lechner, Thomas Olbrich. 425-432 [doi]
• A digital engineering curriculum with integrated, Windows-based EDA toolsLes T. Walczowski, Keith R. Dimond, W. A. J. Waller. 425-428 [doi]
• A current-mode neuro-fuzzy networkMassimo Conti, Simone Orcioni, Claudio Turchetti. 427-430 [doi]
• Visual 11: a software tool for learning microcontroller fundamentalsBonifacio Martín-del-Brío, Carlos Bernal Ruiz. 429-432 [doi]
• A design methodology for application specific fuzzy integrated circuitsAngel Barriga, Raouf Senhadji, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Santiago Sánchez-Solano. 431-434 [doi]
• Low cost data acquisition systems based on standard interfacesAlexandre Mota 0002, José Alberto Fonseca, Fernando Santos. 433-437 [doi]
• Evaluation and comparison of structural test methodologies for analogue and mixed signal circuitsIan M. Bell, Stephen J. Spinks. 433-436 [doi]
• Cellular fuzzy processors: new architectures to explore complexity in locally interconnected systemsMario Lavorgna, Luigi G. Occhipinti, Giovanni Di Bernardo, Riccardo Caponetto, Luigi Fortuna. 435-438 [doi]
• CMOS pipelined A/D converters with concurrent error detection capabilityEduardo J. Peralías, Adoración Rueda, José L. Huertas. 437-440 [doi]
• An application oriented short-course in image recognitionFrancesc Tarres, Eduard Bertran, Gabriel Montoro, A. B. de Souza. 439-442 [doi]
• A novel technique for the blind estimation of a channel matrixZhongfu Ye, Pak-Chung Ching, Kon Max Wong. 441-444 [doi]
• Mixed-Signal Board Level DfT Techniques Using IEEE P1149.4José Silva Matos, José Machado da Silva. 441-446 [doi]
• Taxonomic problems on ADC characterisationRaul Carneiro Martins, Helena Maria Geirinhas Ramos, Pedro Silva Girão, A. Cruz Serra. 445-448 [doi]
• A multichannel lattice algorithm for real-time blind equalizationJoão Gomes 0001, Victor Barroso. 445-448 [doi]
• Exact analysis of the tracking capability of time-varying channels: the finite alphabet inputs caseHichem Besbes, Meriem Jaïdane-Saïdane, Jelel Ezzine. 449-452 [doi]
• Effects of ADC nonlinearities in sine-wave amplitude measurementDiego Bellan, Arnaldo Brandolini, Alessandro Gandelli. 449-452 [doi]
• Adaptive multifovea sensors for mobiles trackingPelegrín Camacho, Fabián Arrebola, Francisco Sandoval. 449-452 [doi]
• Some thoughts on the word error rate measurement of A/D convertersGiovanni Chiorboli, Barbara De Salvo, Giovanni Franco, Carlo Morandi. 453-456 [doi]
• A PCI-based custom computer for real time image processingFerran Lisa-Mingo, Jordi Carrabina. 453-456 [doi]
• Comparison of based adaptive predictive schemes for improvement of tracking randomly time-varying systemsSofia Ben Jebara, Meriem Jaïdane-Saïdane. 453-456 [doi]
• The use of a noise stimulus in ADC characterizationRaul Carneiro Martins, António Manuel da Cruz Serra. 457-460 [doi]
• Improved motion compensation with overlapped spatial transformationFernando J. P. Lopes, Mohammed Ghanbari. 457-460 [doi]
• A finite memory non stationary LMS algorithm for adaptive tracking Markovian time-varying channelMonia Turki, Meriem Jaïdane-Saïdane. 457-460 [doi]
• Image representation and reconstruction from spectral amplitude or phaseYossi Shapiro, Moshe Porat. 461-464 [doi]
• Testing of dynamic quality of AD modules with standard interfaces and problems connected with itVladimír Haasz, Jaroslav Roztocil. 461-464 [doi]
• 50 MHz high-speed and 5 W low-power real-time programmable video multi processor (VMP) for MPEG-2 MP@ML on 0.6 μm TLM CMOS technologyJ. G. An, J. S. Shim, Y.-M. Kim, M. M.-O. Lee. 463-466 [doi]
• Kinematic optimization of redundant and hyper-redundant robot trajectoriesFernando B. M. Duarte, J. A. Tenreiro Machado. 467-470 [doi]
• IP-based design of custom field programmable network processorsMassimo Bombana, Nikolay Fominykh, Giulio Gorla, Alexander Kriajev, Boris Krivosheyin, Juri Rytchagov. 467-471 [doi]
• A universal smart control IC for high-power IGBT applicationsR. Herzer, E. Schimanek, Christoph Bokeloh, J. Lehmann. 467-470 [doi]
• ASITRON: ASIC for vectorial control of induction motors and speed regulation using fuzzy-logicJose Luis Mora, Eduardo Galvan, Francisco Colodro, Federico Barrero, Jonathan Noel Tombs, M. Barranco, Antonio Torralba 0002, Leopoldo García Franquelo. 471-475 [doi]
• An open architecture for position and force control of robotic manipulatorsLuis F. Baptista, Jorge M. Martins, Carlos Cardeira, José M. G. Sá da Costa. 471-474 [doi]
• A VLSI architecture for fast and accurate floating-point sine/cosine evaluationVassilis Paliouras, Konstantina Karagianni, Thanos Stouraitis. 473-476 [doi]
• A testbed for robotic visual servoing and catching of moving objectsDinis G. Fernandes, Pedro U. Lima. 475-478 [doi]
• New emerging applications for smart power integrated circuits: technologies implications and new design techniquesDomenico Rossi. 477-484 [doi]
• A high-speed parallel DSP architecture dedicated to digital modem applicationsS. Philip, Fabrice Monteiro, Abbas Dandache, Bernard Lepley. 477-480 [doi]
• Ground plane detection using visual and inertial data fusionJorge Lobo 0002, Jorge Dias 0001. 479-482 [doi]
• Gepard: a parameterisable digital signal processorRichard Forsyth, Andreas Gierlinger, Erwin Ofner. 481-484 [doi]
• Absolute localization of mobile robots using natural landmarksArtur Arsénio, M. Isabel Ribeiro. 483-486 [doi]
• High performance distributed arithmetic FPGA decimators for video-frequency applicationsJ. Living, Bashir M. Al-Hashimi, M. Moniri. 487-490 [doi]
• Transient analysis of circuits with ideal switches using charge and flux substitute networksJan Ogrodzki. 487-490 [doi]
• Identification of unstable DC operating pointsDalibor Biolek. 489-492 [doi]
• Design of equiripple stopband even and odd order linear phase IIR filtersTsuyoshi Takebe, Toyoji Matsumoto, Shuitsu Matsumura, Kyoko Kato. 491-494 [doi]
• A compact charge-based MOSFET model for circuit simulationO. C. Gouveia Filho, Ana Isabela Araújo Cunha, Márcio C. Schneider, Carlos Galup-Montoro. 491-494 [doi]
• Boundary Nevanlinna Pick interpolation for maximum power transferM. K. Külmiz Cevik. 493-496 [doi]
• Efficient realization of the M-D nonrecursive filters: from sequential implementation to mapping on systolic array processorsAdrian Burian, Corneliu Rusu, Pauli Kuosmanen. 495-498 [doi]
• Fault identification in analog-discrete circuits using general-purpose analysis programsSamuil L. Farchy, Elissaveta Gadjeva, Todor G. Kouyoumdjiev. 495-498 [doi]
• On phase approximation by gain differencesCorneliu Rusu, Ioan Gavrea, Pauli Kuosmanen. 497-500 [doi]
• A method for bipolar semiconductor device modeling implementable in circuit simulatorsArmando S. Araújo, Adriano Carvalho 0001, J. L. Martins de Carvalho. 499-503 [doi]
• Bidirectional systolic arrays for digital recursive filtersL. A. Sousa. 499-502 [doi]
• Exploring the range of transitions in idealized switched networksPaul Cristea, Rodica Tuduce. 501-504 [doi]
• An efficient VLSI implementation of four-step search algorithmAngus Wu, Man F. So. 503-506 [doi]
• A new approach for the extraction of SPICE MOSFET Level-3 static model parametersMetin Yazgi, Hakan Kuntman. 505-508 [doi]
• Settling time analysis of third order systemsAugusto Manuel Marques, Y. Geerts, Michiel Steyaert, Willy Sansen. 505-508 [doi]
• Some studies of European Portuguese nasal vowels using an articulatory synthesizerAntónio Teixeira 0001, Francisco A. C. Vaz, José Carlos Príncipe. 507-510 [doi]
• Some results about the behaviour of the characteristic frequencies in electric circuitsFrancisco Martín, Félix Carrique, Carlos Criado. 509-512 [doi]
• Nonlinear macromodels for time-domain simulation of analog-discrete circuitsVjaceslav Georgiev, Elissaveta Gadjeva, K. Stanchev. 509-512 [doi]
• Image compression using a mixed-transform technique and vector quantizationI. Singh, Panajotis Agathoklis, Andreas Antoniou. 511-514 [doi]
• High frequency RC chaos generatorAhmed S. Elwakil, Michael Peter Kennedy. 513-516 [doi]
• Improving design efficiency by providing models for simulation of parasitic effects of passive devicesB. Plathner, U. Kemper, R. Montiel, M. Brandstetter, H. Werker. 513-516 [doi]
• CAM based real-time lossless image compressionJ. Jiang, C. V. Brett. 515-518 [doi]
• Islands induced by periodic perturbations to an autonomous chaos generatorTaku Katagiri, Toshimichi Saito. 517-520 [doi]
• SPADE : analog/digital mixed signal simulator with analog hardware description languageHiroshi Sagesaka, Hisashi Irii, Hideki Asai. 517-520 [doi]
• sMAE: an improved block matching criterionVassilis E. Fotopoulos, Athanassios N. Skodras. 519-522 [doi]
• An arbiter synthesis approach based on arbitration scheme generation/selection for HW/SW co-designAbdelkerim Zitouni, Mohamed Abid, Rached Tourki. 521-526 [doi]
• An eigenvalue study of the MLC circuitErik Lindberg, Krishnamurthy Murali. 521-524 [doi]
• A blind image restoration system using higher-order statistics and Radon transformMostafa A. Ibrahim, Abdel-Wahab F. Hussein, Samia A. Mashali, Ahmed H. Mohamed. 523-530 [doi]
• RF/SS system for wireless local loopJ. N. Matos, A. Gameiro, R. Silva, J. Figueiredo, Mateo Burgos-García, Blas-Pablo Dorta-Naranjo. 525-528 [doi]
• Design and implementation of control circuits based on dynamically reconfigurable FPGAValery Sklyarov, António de Brito Ferrari. 527-530 [doi]
• Monolith optoelectronic integrated circuit with built-in photo-voltaic supply for control and monitoringAlexej S. Adonin, Konstantin O. Petrosjanc, Igor V. Poljakov. 529-531 [doi]
• Group lapped iterative technique for fast solution of large linear systemsJosé M. Bioucas-Dias, José M. N. Leitão. 531-534 [doi]
• Rapid prototyping environment for design of hardware/software electronic systemsMohamed Abid. 531-535 [doi]
• A high performant 0.5 μm CMOS single chip ISDN network termination based on an embedded core and co-processor architectureP. Wouters, P. Van Oostende, L. Dawance, B. Graindourze. 533-536 [doi]
• Electronic design of a high performance interface to the SCI networkF. Mora, A. Sebastiá. 535-538 [doi]
• Efficient clock recovery architectureMarcia G. Méndez-Rivera, A. Valero-López, José Silva-Martínez, Edgar Sánchez-Sinencio. 537-540 [doi]
• Multiple server WWW-based synthesis of VLSI circuitsD. Nalbantis, Les T. Walczowski, W. A. J. Waller. 537-540 [doi]
• Use of a statistical model for lip synthesisSergio Curinga. 539-541 [doi]
• New short and efficient algorithm for testing random-access memoriesMohamed Azimane, Antonio Lloris Ruiz. 541-544 [doi]
• Modeling of a 4×10 Gbps all-optical clock extraction systemO. Frazão, A. F. Cunha, P. Tavares, L. Ribeiro, Jose R. Ferreira da Rocha. 541-544 [doi]
• Efficient nonlinear prediction in ADPCMMarcos Faúndez-Zanuy, Francesc Vallverdú, Enric Monte. 543-546 [doi]
• Two dimensional AR model of signing process and its application to on-line signature verificationTakenobu Matsuura, Hirokazu Togiishi. 545-548 [doi]
• A single-piece charge-based model for the output conductance of MOS transistorsMárcio C. Schneider, Carlos Galup-Montoro, O. C. Gouveia Filho, Ana Isabela Araújo Cunha. 545-548 [doi]
• Speech coding via Balanced Model Truncation-a novel approachCarmen Peláez, Izzet Kale, Armando Malanda. 547-551 [doi]
• A fuzzy synchronization algorithm for bimodal speech signalsVojko Pahor. 553-556 [doi]
• Frequency-shift: a way to reduce aliasing in the complex cepstrumT. K. Bysted. 557-560 [doi]