A VLSI architecture for fast and accurate floating-point sine/cosine evaluation

Vassilis Paliouras, Konstantina Karagianni, Thanos Stouraitis. A VLSI architecture for fast and accurate floating-point sine/cosine evaluation. In 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998 . pages 473-476, IEEE, 1998. [doi]

Abstract

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