Augusto Manuel Marques - researchr alias

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Viewing Publication 1 - 8 from 8

1999

A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applicationsYves Geerts, Augusto Manuel Marques, Michel S. J. Steyaert, Willy Sansen. jssc, 34(7):927-936, 1999. [doi]

1998

A 12-bit intrinsic accuracy high-speed CMOS DACJosé Bastos, Augusto Manuel Marques, Michel S. J. Steyaert, Willy Sansen. jssc, 33(12):1959-1969, 1998. [doi]

A 12 bit 200 MHz low glitch CMOS D/A converterAnne Van den Bosch, Marc Borremans, Jan Vandenbussche, Geert Van der Plas, Augusto Manuel Marques, José Bastos, Michiel Steyaert, Georges G. E. Gielen, Willy Sansen. cicc 1998: 249-252 [doi]

A current steering architecture for 12-bit high-speed D/A convertersAugusto Manuel Marques, J. Bastos, Michiel Steyaert, Willy Sansen. icecsys 1998: 23-26 [doi]

Settling time analysis of third order systemsAugusto Manuel Marques, Y. Geerts, Michiel Steyaert, Willy Sansen. icecsys 1998: 505-508 [doi]

A 15-b resolution 2-MHz Nyquist rate ΔΣ ADC in a 1-μm CMOS technologyAugusto Manuel Marques, Vincenzo Peluso, Michel S. J. Steyaert, Willy Sansen. jssc, 33(7):1065-1075, 1998. [doi]

Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital convertersAugusto Manuel Marques, Valentino Peluso, Michiel Steyaert, Willy M. C. Sansen. icecsys 1998: 153-156 [doi]

A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic rangeVincenzo Peluso, Peter J. Vancorenland, Augusto Manuel Marques, Michel S. J. Steyaert, Willy Sansen. jssc, 33(12):1887-1897, 1998. [doi]

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