Marcia G. Méndez-Rivera, A. Valero-López, José Silva-Martínez, Edgar Sánchez-Sinencio. Efficient clock recovery architecture. In 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998 . pages 537-540, IEEE, 1998. [doi]
Abstract is missing.