Table of Contents

• Leveraging Firmware Reverse Engineering for Stealthy Sensor Attacks via Binary ModificationSutej Kulkarni, Ryan Tsang, Asmita, Houman Homayoun, Soheil Salehi. 1-8 [doi]
• A Compressed and Accurate Sparse Deep Learning-based Workload-Aware Timing Error ModelStyliani Tompazi, Georgios Karakonstantis. 9-12 [doi]
• Transcend Adversarial Examples: Diversified Adversarial Attacks to Test Deep Learning ModelWei Kong. 13-20 [doi]
• REMU: Enabling Cost-Effective Checkpointing and Deterministic Replay in FPGA-based EmulationYuxiao Chen 0009, Yisong Chang, Ke Zhang 0017, Mingyu Chen 0001, Yungang Bao. 21-29 [doi]
• Model Checking TileLink Cache Coherence Protocols By MurphiZimin Li, Yongjian Li, Kaifan Wang, Kun Ma, Shizhen Yu. 30-37 [doi]
• n) Polynomial MultiplierGogireddy Ravi Kiran Reddy, Sanampudi Gopala Krishna Reddy, D. R. Vasanthi, Madhav Rao. 38-45 [doi]
• ApproxCNN: Evaluation Of CNN With Approximated Layers Using In-Exact MultipliersBindu G. Gowda, S. N. Raghava, H. C. Prashanth, Pratyush Nandi, Madhav Rao. 46-53 [doi]
• ACET: An Adaptive Clock Scheme Exploiting Comprehensive Timing Slack for Reconfigurable ProcessorsShuya Ji, Weidong Yang, Jianfei Jiang 0001, Naifeng Jing, Weiguang Sheng, Ang Li, Qin Wang 0009. 54-61 [doi]
• SFDoP: A Scalable Fused BFloat16 Dot-Product Architecture for DNNJing Zhang, Hongbing Tan, Libo Huang. 62-65 [doi]
• ImprLM: An Improved Logarithmic Multiplier Design Approach via Iterative Linear-Compensation and Modified Dynamic SegmentShangshang Yao, Li Shen 0007. 66-69 [doi]
• MindCrypt: The Brain as a Random Number Generator for SoC-Based Brain-Computer InterfacesGuy Eichler, Biruk B. Seyoum, Kuan-Lin Chiu, Luca P. Carloni. 70-77 [doi]
• BrainTTA: A 28.6 TOPS/W Compiler Programmable Transport-Triggered NN SoCMaarten J. Molendijk, Floran A. M. de Putter, Manil Dev Gomony, Pekka Jääskeläinen, Henk Corporaal. 78-85 [doi]
• HiSEP-Q: A Highly Scalable and Efficient Quantum Control Processor for Superconducting QubitsXiaorang Guo, Kun Qin, Martin Schulz 0001. 86-93 [doi]
• Enhancing Virtual Distillation with Circuit Cutting for Quantum Error MitigationPeiyi Li 0002, Ji Liu 0007, Hrushikesh Pramod Patil, Paul D. Hovland, Huiyang Zhou. 94-101 [doi]
• ICON: An IR Drop Compensation Method at OU Granularity with Low Overhead for eNVM-based AcceleratorsJinpeng Liu, Wei Tong 0001, Bing Wu 0001, Huan Cheng, Chengning Wang. 102-109 [doi]
• Resonant Compute-In-Memory (rCIM) 10T SRAM Macro for Boolean LogicDhandeep Challagundla, Ignatius Bezzam, Biprangshu Saha, Riadul Islam. 110-117 [doi]
• Small Footprint 6T-SRAM Design with MIV-Transistor Utilization in M3D-IC TechnologyMadhava Sarma Vemuri, Umamaheswara Rao Tida. 118-125 [doi]
• Offline and Online Algorithms for Cache Allocation with Monte Carlo Tree Search and a Learned ModelYibin Gu, Hua Wang, Man Luo, Jingyu Tang, Ke Zhou 0001. 126-133 [doi]
• Morpheus: An Adaptive DRAM Cache with Online Granularity Adjustment for Disaggregated MemoryXu Zhang, Tianyue Lu, Yisong Chang, Ke Zhang 0017, Mingyu Chen 0001. 134-141 [doi]
• Locality-aware Speculative Cache for Fast Partial Updates in Erasure-Coded Cloud ClustersHai Zhou 0002, Yuchong Hu, Dan Feng 0001, Wei Wang 0021, Huadong Huang. 142-149 [doi]
• A Cost-Efficient Failure-Tolerant Scheme for Distributed DNN TrainingMenglei Chen, Yu Hua 0001, Rong Bai, Jianming Huang. 150-157 [doi]
• RealArch: A Real-Time Scheduler for Mapping Multi-Tenant DNNs on Multi-Core AcceleratorsXuhang Wang, Zhuoran Song, Xiaoyao Liang. 158-165 [doi]
• Polyform: A Versatile Architecture for Multi-DNN Execution via Spatial and Temporal AccelerationLingxiang Yin, Amir Ghazizadeh, Shilin Tian, Ahmed Louri, Hao Zheng 0005. 166-169 [doi]
• STAG: Enabling Low Latency and Low Staleness of GNN-based Services with Dynamic GraphsJiawen Wang, Quan Chen, Deze Zeng, Zhuo Song, Chen Chen, Minyi Guo. 170-173 [doi]
• Accelerating Persistent Hash Indexes via Reducing Negative SearchesRenzhi Xiao, Hong Jiang 0001, Dan Feng 0001, Yuchong Hu, Wei Tong, Kang Liu 0017, Yucheng Zhang, Xueliang Wei, Zhengtao Li. 174-181 [doi]
• PMA: A Persistent Memory Allocator with High Efficiency and Crash Consistency GuaranteeXiangyu Xiang, Yu Hua, Hao Xu. 182-189 [doi]
• Prediction-Guided Metadata Backup for Improving Lifetime on Flash-based SwapTaejoon Song, JuneHyung Kim, Myeongseon Kim, Youngjin Kim. 190-193 [doi]
• RWORT: A Read and Write Optimized Radix Tree for Persistent MemoryJinlei Hu, Zijie Wei, Jianxi Chen, Dan Feng. 194-197 [doi]
• An Effective and Balanced Storage Extension Approach for Sharding Blockchain SystemsTingyu Fan, Xiulong Liu, Baochao Chen, Wenyu Qu. 198-205 [doi]
• BlzFS: Crash Consistent Log-structured File System Based on Byte-loggable Zone for ZNS SSDWenjie Qi, Zhipeng Tan, Ziyue Zhang, Jing Zhang, Chao Yu, Ying Yuan, Shikai Tan. 206-213 [doi]
• K8sES: Optimizing Kubernetes with Enhanced Storage Service-Level ObjectivesHao Wen, Zhichao Cao 0002, Bingzhe Li, David H. C. Du, Ayman Abouelwafa, Doug Voigt, Shiyong Liu, Jim Diehl, Fenggang Wu. 214-222 [doi]
• CostFM: A High Cost-Performance Fingerprint Management Mechanism for Shared SSDsHao Liu, Mengting Lu, Fang Wang, Wenpeng He. 223-230 [doi]
• Enabling Encrypted Delta Compression for Outsourced Storage Systems via Preserving SimilarityChuang Gan, Yuchong Hu, Leyan Zhao, Xin Zhao, Pengyu Gong, Wenhao Zhang, Lin Wang, Dan Feng. 231-238 [doi]
• FlashDAM: Flexible I/O Throttling for the User Experience of Mobile SystemsChanglong Li, Chao Wang, Xuehai Zhou, Edwin H.-M. Sha. 239-242 [doi]
• HyperMetric: Robust Hyperdimensional Computing on Error-prone Memories using Metric LearningWeihong Xu, Viji Swaminathan, Sumukh Pinge, Sean Fuhrman, Tajana Rosing. 243-246 [doi]
• KeSCo: Compiler-based Kernel Scheduling for Multi-task GPU ApplicationsZejia Lin, Zewei Mo, Xuanteng Huang, XianWei Zhang, Yutong Lu. 247-254 [doi]
• Beyond Compression Ratio: A Throughput Analysis of Memory Compression Techniques for GPUsManuel Renz, Sohan Lal. 255-262 [doi]
• PANG: A Pattern-Aware GCN Accelerator for Universal GraphsYibo Du, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han 0001. 263-266 [doi]
• HyF2FS: A Filesystem to Fully Exploit the Parallelism of Hybrid StorageJintong Zhang, Jianxi Chen, Kezheng Liu, Yongkang Zhuo, Panfei Yuan. 267-274 [doi]
• SMRTS: A Performance and Cost-Effectiveness Optimized SSD-SMR Tiered File System with Data DeduplicationZhichao Cao 0002, Hao Wen, Fenggang Wu, David H. C. Du. 275-282 [doi]
• Low-Latency and Scalable Full-path Indexing Metadata Service for Distributed File SystemsChao Dong, Fang Wang, Yuxin Yang, Mengya Lei, Jianshun Zhang, Dan Feng. 283-290 [doi]
• FlexZNS: Building High-Performance ZNS SSDs with Size-Flexible and Parity-Protected ZonesYu Wang, You Zhou, Zhonghai Lu, Xiaoyi Zhang, Kun Wang, Feng Zhu, Shu Li, Changsheng Xie, Fei Wu 0005. 291-299 [doi]
• LifetimeKV: Narrowing the Lifetime Gap of SSTs in LSMT-based KV Stores for ZNS SSDsBiyong Liu, Yuan Xia, Xueliang Wei, Wei Tong 0001. 300-307 [doi]
• Persimmon: an append-only ZNS-first filesystemDevashish R. Purandare, Sam Schmidt, Ethan L. Miller. 308-315 [doi]
• Turn Waste Into Wealth: Alleviating Read/Write Interference in ZNS SSDsWeilin Zhu, Wei Tong. 316-319 [doi]
• GPT-LS: Generative Pre-Trained Transformer with Offline Reinforcement Learning for Logic SynthesisChenyang Lv, Ziling Wei, Weikang Qian, Junjie Ye, Chang Feng, Zhezhi He. 320-326 [doi]
• Delay-Driven Physically-Aware Logic Synthesis with Informed SearchLinyu Zhu, Xinfei Guo. 327-335 [doi]
• Adaptive Reconvergence-driven AIG Rewriting via Strategy LearningLiwei Ni, Zonglin Yang, Jiaxi Zhang 0001, Junfeng Liu, Huawei Li, Biwei Xie, Xinquan Li. 336-343 [doi]
• AiMap: Learning to Improve Technology Mapping for ASICs via Delay PredictionJunfeng Liu, Liwei Ni, Xingquan Li, Min Zhou, Lei Chen, Xing Li, Qinghua Zhao, Shuai Ma. 344-347 [doi]
• FlexGM: An Adaptive Runtime System to Accelerate Graph Matching Networks on GPUsYue Dai, Xulong Tang, Youtao Zhang. 348-356 [doi]
• NTTFusion: Efficient Number Theoretic Transform Acceleration on GPUsZhiwei Wang, Peinan Li, Rui Hou 0001, Dan Meng. 357-365 [doi]
• MixRec: Orchestrating Concurrent Recommendation Model Training on CPU-GPU platformJiazhi Jiang, Rui Tian, Jiangsu Du, Dan Huang, Yutong Lu. 366-374 [doi]
• HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation ModelXuan Zhang, Zhuoran Song, Xing Li, Zhezhi He, Li Jiang 0002, Naifeng Jing, Xiaoyao Liang. 375-382 [doi]
• ViTframe: Vision Transformer Acceleration via Informative Frame Selection for Video RecognitionChunyu Qi, Zilong Li, Zhuoran Song, Xiaoyao Liang. 383-390 [doi]
• ACCO: Automated Causal CNN Scheduling Optimizer for Real-Time Edge AcceleratorsJun Yin, Linyan Mei, Andre Guntoro, Marian Verhelst. 391-398 [doi]
• Re-compact: Structured Pruning and SpMM Kernel Co-design for Accelerating DNNs on GPUsYuling Zhang, Ao Ren, Xianzhang Chen, Qiu Lin, Yujuan Tan, Duo Liu. 399-406 [doi]
• FM-P2L: An Algorithm Hardware Co-design of Fixed-Point MSBs with Power-of-2 LSBs in CNN AcceleratorsJun-Shen Wu, Ren-Shuo Liu. 407-414 [doi]
• Hardware-Software Co-Design for Content-Based Sparse AttentionRui Tang, Xiaoyu Zhang 0009, Rui Liu, Zhejian Luo, Xiaoming Chen 0003, Yinhe Han 0001. 415-418 [doi]
• Towards Quantized Stochastic Computing by Leveraging Reduced Precision Binary Numbers through Bit TruncationDonghui Lee, Yongtae Kim. 419-422 [doi]
• Conveyor: Towards Asynchronous Dataflow in Systolic Array to Exploit Unstructured SparsitySeongwook Kim, Gwangeun Byeon, Sihyung Kim, Hyungjin Kim, Seokin Hong. 423-431 [doi]
• DFGC: DFG-aware NoC Control based on Time Stamp Prediction for Dataflow ArchitectureTianyu Liu, Wenming Li, Zhihua Fan. 432-439 [doi]
• Alleviating Transfer Latency in DataFlow Accelerator for DSP ApplicationsHaibin Wu, Wenming Li, Zhihua Fan, Zhen Wang, Tianyu Liu, Junying Huang, Shengzhong Tang, Yanhuan Liu, Kunming Zhang, Xiaochun Ye, Dongrui Fan. 440-443 [doi]
• FLASH-RL: Federated Learning Addressing System and Static Heterogeneity using Reinforcement LearningSofiane Bouaziz, Hadjer Benmeziane, Youcef Imine, Leila Hamdad, Smaïl Niar, Hamza Ouarnoughi. 444-447 [doi]
• PrSpMV: An Efficient Predictable Kernel for SpMVGelin Fu, Tian Xia 0008, Shaoru Qu, Zhongpei Luo, Shuyu Li, Pengyu Cheng, Runfan Guo, Yitong Ding, Pengju Ren. 448-456 [doi]
• Releasing the Potential of Tensor Core for Unstructured SpMM using Tiled-CSR FormatZeyu Xue, Mei Wen, Zhaoyun Chen, Yang Shi, Minjin Tang, Jianchao Yang, Zhongdi Luo. 457-464 [doi]
• Tailoring CUTLASS GEMM using Supervised LearningYongseung Yu, Donghyun Son, Younghyun Lee, Sunghyun Park, Giha Ryu, Myeongjin Cho, Jiwon Seo 0002, Yongjun Park 0001. 465-474 [doi]
• Revitalizing Buffered I/O: Optimizing Page Reclaim and I/O ThrottlingJongseok Kim, Chanu Yu, Euiseong Seo. 475-482 [doi]
• ResCheck: Resilient Checkpointing for Energy Harvesting SystemsKeni Qiu, Chuting Xu, Kunyu Zhou, Dehui Qiu. 483-486 [doi]
• Heart: a Scalable, High-performance ART for Persistent MemoryLiangxu Nie, Shengan Zheng, Bowen Zhang, Jinyan Xu, Linpeng Huang. 487-490 [doi]
• DCR: Decomposition-Aware Column Re-Mapping for Stuck-At-Fault Tolerance in ReRAM ArraysHyeonsu Bang, Kang Eun Jeon, Johnny Rhe, Jong Hwan Ko. 491-494 [doi]
• Snapshot: Fast, Userspace Crash Consistency for CXL and PM Using msyncSuyash Mahar, Mingyao Shen, Terence Kelly, Steven Swanson. 495-498 [doi]
• GIM: Versatile GNN Acceleration with Reconfigurable Processing-in-MemoryChen Nie, Guoyang Chen, Weifeng Zhang 0003, Zhezhi He. 499-506 [doi]
• PSQ: An Automatic Search Framework for Data-Free Quantization on PIM-based ArchitectureFangxin Liu, Ning Yang, Li Jiang 0002. 507-514 [doi]
• Exploiting and Enhancing Computation Latency Variability for High-Performance Time-Domain Computing-in-Memory Neural Network AcceleratorsChia-Chun Wang, Yun-Chen Lo, Jun-Shen Wu, Yu-Chih Tsai, Chia-Cheng Chang, Tsen-Wei Hsu, Min-Wei Chu, Chuan-Yao Lai, Ren-Shuo Liu. 515-522 [doi]
• Input-Aware Flow-Based In-Memory ComputingSuraj Singireddy, Muhammad Rashedul Haq Rashed, Sven Thijssen, Rickard Ewetz, Sumit Kumar Jha 0001. 523-530 [doi]
• BICEP: Exploiting Bitline Inversion for Efficient Operation-Unit-Based Compute-in-Memory Architecture: No Retraining Needed!Yun-Chen Lo, Chia-Chun Wang, Ren-Shuo Liu. 531-534 [doi]
• Cerasure: Fast Acceleration Strategies For XOR-Based Erasure CodesTianyang Niu, Min Lyu, Wei Wang 0237, Qiliang Li, Yinlong Xu. 535-542 [doi]
• A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource DesignsGiovanni Brignone, Mihai T. Lazarescu, Luciano Lavagno. 551-557 [doi]
• Efficient RISC-V-on-x64 Floating Point SimulationNiko Zurstraßen, Nils Bosbach, Jan Moritz Joseph, Lukas Jünger 0001, Jan Henrik Weinstock, Rainer Leupers. 558-565 [doi]
• HF-LDPC: HLS-friendly QC-LDPC FPGA Decoder with High Throughput and FlexibilityYifan Zhang, Qiang Cao, Shaohua Wang, Jie Yao, Hong Jiang. 566-573 [doi]
• GNNHLS: Evaluating Graph Neural Network Inference via High-Level SynthesisChenfeng Zhao, Zehao Dong, Yixin Chen, Xuan Zhang, Roger D. Chamberlain. 574-577 [doi]
• Architectural Contracts for Safe SpeculationFranz A. Fuchs, Jonathan Woodruff, Peter Rugg, Marno van der Maas, Alexandre Joannou, Alexander Richardson, Jessica Clarke 0001, Nathaniel Wesley Filardo, Brooks Davis, John Baldwin, Peter G. Neumann, Simon W. Moore, Robert N. M. Watson. 578-586 [doi]
• Execute on Clear (EoC): Enhancing Security for Unsafe Speculative Instructions by Precise Identification and Safe ExecutionXiaoni Meng, Qiusong Yang, Yiwei Ci, Pei Zhao, Shan Zhao, Mingshu Li 0001. 587-595 [doi]
• RunSAFER: A Novel Runtime Fault Detection Approach for Systolic Array AcceleratorsEleonora Vacca, Giorgio Ajmone, Luca Sterpone. 596-604 [doi]
• BIRD: A Lightweight and Adaptive Compressor for Communication-Efficient Distributed Learning Using Tensor-wise Bi-Random SamplingDonglei Wu, Weihao Yang, Cai Deng, Xiangyu Zou, Shiyi Li, Wen Xia. 605-613 [doi]
• MultiFuse: Efficient Cross Layer Fusion for DNN Accelerators with Multi-level Memory HierarchyChia-Wei Chang, Jing-Jia Liou, Chih-Tsun Huang, Wei-Chung Hsu, Juin-Ming Lu. 614-622 [doi]
• DEQ: Dynamic Element-wise Quantization for Efficient Attention ArchitectureXuhang Wang, Zhuoran Song, Qiyue Huang, Xiaoyao Liang. 623-630 [doi]
• CNN Inference Accelerators with Adjustable Feature Map Compression RatiosYu-Chih Tsai, Chung-Yueh Liu, Chia-Chun Wang, Tsen-Wei Hsu, Ren-Shuo Liu. 631-634 [doi]