Table of Contents

• On EDA-Driven Learning for SAT SolvingMin Li 0019, Zhengyuan Shi, Qiuxia Lai, Sadaf Khan, Shaowei Cai, Qiang Xu 0001. 1-6 [doi]
• Design Automation for Cryogenic CMOS CircuitsVictor M. van Santen, Marcel Walter, Florian Klemme, Shivendra Singh Parihar, Girish Pahwa, Yogesh Singh Chauhan, Robert Wille, Hussam Amrouch. 1-6 [doi]
• System-level Innovation for the Next Decade AI Performance, Power, Area with Co-optimizationMarcus Pan. 1-2 [doi]
• Architecture 2.0: Challenges and OpportunitiesVijay Janapa Reddi, Amir Yazdanbakhsh. 1-2 [doi]
• Any-Angle Routing for Redistribution Layers in 2.5D IC PackagesMin-Hsuan Chung, Je-Wei Chuang, Yao-Wen Chang. 1-6 [doi]
• PIMA-LPN: Processing-in-memory Acceleration for Efficient LPN-based Post-Quantum CryptographyLin Ding, Song Bian, Jiliang Zhang 0002. 1-6 [doi]
• Response Time Analysis and Optimization of DAG Tasks Exploiting Mutually Exclusive ExecutionHaochun Liang, Xu Jiang 0004, Nan Guan, Qingqiang He, Wang Yi 0001. 1-6 [doi]
• EP-ORAM: Efficient NVM-Friendly Path Eviction for Ring ORAM in Hybrid MemoryMehrnoosh Raoufi, Jun Yang 0002, Xulong Tang, Youtao Zhang. 1-6 [doi]
• DmTSAR-ILP: Allocating a Unified Domain Platform for Streaming ApplicationsBruno Morais, Gunar Schirner. 1-6 [doi]
• FLNA: An Energy-Efficient Point Cloud Feature Learning Accelerator with Dataflow DecouplingDongxu Lyu, Zhenyu Li, Yuzhou Chen, Ningyi Xu, Guanghui He. 1-6 [doi]
• MPass: Bypassing Learning-based Static Malware DetectorsJialai Wang, Wenjie Qu 0001, Yi Rong, Han Qiu 0001, Qi Li 0002, Zongpeng Li, Chao Zhang 0008. 1-6 [doi]
• NetBooster: Empowering Tiny Deep Learning By Standing on the Shoulders of Deep GiantsZhongzhi Yu, Yonggan Fu, Jiayi Yuan, Haoran You, Yingyan Celine Lin. 1-6 [doi]
• Invited: Algorithms and Architectures for Accelerating Long Read Sequence AnalysisHasindu Gamaarachchi, Kisaru Liyanage, Sri Parameswaran. 1-4 [doi]
• Invited: Buried Power Rails and Back-side Power Grids: Prospects and ChallengesS. S. Teja Nibhanupudi, Sirish Oruganti, Rahul Mathur, Nishant Gupta, Meizhi Wang, Jaydeep P. Kulkarni. 1-4 [doi]
• Thermal Scaffolding for Ultra-Dense 3D Integrated CircuitsDennis Rich, Anna Kasperovich, Mohamadali Malakoutian, Robert M. Radway, Shiho Hagiwara, Takahide Yoshikawa, Srabanti Chowdhury, Subhasish Mitra. 1-6 [doi]
• EENet: Energy Efficient Neural Networks with Run-time Power ManagementXiangjie Li, Yingtao Shen, An Zou, Yehan Ma. 1-6 [doi]
• Energy-Efficient On-Chip Training for Customized Home-based Rehabilitation SystemsA. Alper Goksoy, Sizhe An, Ümit Y. Ogras. 1-6 [doi]
• ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCsZahin Ibnat, M. Sazadur Rahman, Mridha Md Mashahedur Rahman, Hadi Mardani Kamali, Mark M. Tehranipoor, Farimah Farahmandi. 1-6 [doi]
• Ising-CF: A Pathbreaking Collaborative Filtering Method Through Efficient Ising Machine LearningZhuo Liu, Yunan Yang, Zhenyu Pan, Anshujit Sharma, Amit Hasan, Caiwen Ding, Ang Li 0006, Michael C. Huang 0001, Tong Geng. 1-6 [doi]
• Cryogenic In-Memory Matrix-Vector Multiplication using Ferroelectric Superconducting Quantum Interference Device (FE-SQUID)Shamiul Alam, Jack Hutchins, Md. Shafayat Hossain, Kai Ni 0004, Vijaykrishnan Narayanan, Ahmedullah Aziz. 1-6 [doi]
• A High-accurate Multi-objective Exploration Framework for Design Space of CPUDuo Wang, Mingyu Yan, Xin Liu 0073, Mo Zou, Tianyu Liu, Wenming Li, Xiaochun Ye, Dongrui Fan. 1-6 [doi]
• Optimizing Data Reuse for CGRA Mapping Using Polyhedral-based Loop TransformationsLiao Huang, Dajiang Liu. 1-6 [doi]
• Muffin: A Framework Toward Multi-Dimension AI Fairness by Uniting Off-the-Shelf ModelsYi-sheng, Junhuan Yang, Lei Yang, Yiyu Shi 0001, Jingtong Hu, Weiwen Jiang. 1-6 [doi]
• Mixed-cell-height Placement with Minimum-Implant-Area and Drain-to-Drain Abutment ConstraintsGuohao Chen, Zheng Zeng, Benchao Zhu, Jiawei Li, Kun Wang 0005, Jun Yu 0010, Jianli Chen. 1-6 [doi]
• Lightning Talk: The Next Wave of High-level SynthesisDeming Chen. 1-3 [doi]
• Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous System (ARMOUR)Sukarn Agarwal, Shounak Chakraborty 0001, Magnus Själander. 1-6 [doi]
• BLITZCRANK: Factor Graph Accelerator for Motion PlanningYuhui Hao, Yiming Gan, Bo Yu, Qiang Liu 0011, Shaoshan Liu, Yuhao Zhu 0001. 1-6 [doi]
• Improving Standard-Cell Design Flow using Factored Form OptimizationAlessandro Tempia Calvino, Alan Mishchenko, Herman Schmit, Ethan Mahintorabi, Giovanni De Micheli, Xiaoqing Xu. 1-6 [doi]
• DARIC: A Data Reuse-Friendly CGRA for Parallel Data Access via Elastic FIFOsDajiang Liu, Di Mou, Rong Zhu, Yan Zhuang, Jiaxing Shang, Jiang Zhong, Shouyi Yin. 1-6 [doi]
• Scalable Optimal Layout Synthesis for NISQ Quantum ProcessorsWan-Hsuan Lin, Jason Kimko, Bochen Tan, Nikolaj Bjørner, Jason Cong. 1-6 [doi]
• TFix: Exploiting the Natural Redundancy of Ternary Neural Networks for Fault Tolerant In-Memory Vector Matrix MultiplicationAkul Malhotra, Chunguang Wang, Sumeet Kumar Gupta. 1-6 [doi]
• Fast FPGA Accelerator of Graph Cut Algorithm with Out-of-order Parallel Execution in Folding Grid ArchitectureGuangyao Yan, Xinzhe Liu, Hui Wang 0036, Yajun Ha. 1-6 [doi]
• Machine Learning-based Thermally-Safe Cache Contention Mitigation in Clustered ManycoresMohammed Bakr Sikal, Heba Khdr, Martin Rapp, Jörg Henkel. 1-6 [doi]
• OmniBoost: Boosting Throughput of Heterogeneous Embedded Devices under Multi-DNN WorkloadAndreas Karatzas, Iraklis Anagnostopoulos. 1-6 [doi]
• Global Floorplanning via Semidefinite ProgrammingWei Li, Fangzhou Wang, José M. F. Moura, R. D. (Shawn) Blanton. 1-6 [doi]
• SaGraph: A Similarity-aware Hardware Accelerator for Temporal Graph ProcessingJin Zhao 0003, Yu Zhang 0027, Jian Cheng, Yiyang Wu, Chuyue Ye, Hui Yu, Zhiying Huang, Hai Jin 0001, Xiaofei Liao, Lin Gu 0002, Haikun Liu. 1-6 [doi]
• DriverJar: Lightweight Device Driver Isolation for ARMHuamao Wu, Yuan Chen, Yajin Zhou, Yifei Wang, Lubo Zhang. 1-6 [doi]
• PROPHET: Predictive On-Chip Power Meter in Hardware Accelerator for DNNJian Peng, Tingyuan Liang, Zhiyao Xie, Wei Zhang 0012. 1-6 [doi]
• Lightning Talk 21: EDA with ML, Rule-Based, or Both?Youngsoo Shin. 1-2 [doi]
• Return-to-Non-Secure Vulnerabilities on ARM Cortex-M TrustZone: Attack and DefenseZheyuan Ma, Xi Tan, Lukasz Ziarek, Ning Zhang, Hongxin Hu, Ziming Zhao 0001. 1-6 [doi]
• Specialization meets Flexibility: a Heterogeneous Architecture for High-Efficiency, High-flexibility AR/VR ProcessingArpan Suravi Prasad, Luca Benini, Francesco Conti 0001. 1-6 [doi]
• Memory-Efficient and Real-Time SPAD-based dToF Depth Sensor with Spatial and Statistical CorrelationShiyao Li, Zhenhua Zhu, Yu Zhu, Qingpeng Zhu, Jiangwei Zhang, Wenxiu Sun, Guohao Dai, Fei Qiao, Huazhong Yang, Yu Wang 0002. 1-6 [doi]
• XPert: Peripheral Circuit & Neural Architecture Co-search for Area and Energy-efficient Xbar-based ComputingAbhishek Moitra, Abhiroop Bhattacharjee, Youngeun Kim, Priyadarshini Panda. 1-6 [doi]
• RMP-MEM: A HW/SW Reconfigurable Multi-Port Memory Architecture for Multi-PEA Oriented CGRAQidie Wu, Jiangyuan Gu, Youxu Lin, Boxiao Han, Hongjun He, Yang Hu 0001, Leibo Liu, Shaojun Wei, Shouyi Yin. 1-6 [doi]
• SpMMPlu: A Compiler Plug-in with Sparse IR for Efficient Sparse Matrix MultiplicationTao Yang, Yiyuan Zhou, Qidong Tang, Feng Xu, Hui Ma, Jieru Zhao, Li Jiang 0002. 1-6 [doi]
• A Fast Secure Deletion Strategy for High-Density Flash Memory through WOM-v CodesJinhua Cui 0001, Kai Tang, Laurence T. Yang. 1-6 [doi]
• Invited: Pre-silicon Side Channel and Fault AnalysisJasper Van Woudenberg, Peter Grossmann, Avinash Varna, Joseph Friel, Daniel Dinu, Ronnie Lindsay, Steve J. Brown. 1-4 [doi]
• APP: Enabling Soft Real-Time Execution on Densely-Populated Hybrid Memory SystemZheng-Wei Wu, Yun-Chih Chen, Yuan-Hao Chang 0001, Tei-Wei Kuo. 1-6 [doi]
• ReRAM-based graph attention network with node-centric edge searching and hamming similarityRuibin Mao, Xia Sheng, Catherine Graves, Cong Xu, Can Li. 1-6 [doi]
• High Performance, Low Power Matrix Multiply Design on ACAP: from Architecture, Design Challenges and DSE PerspectivesJinming Zhuang, Zhuoping Yang, Peipei Zhou 0001. 1-6 [doi]
• Bit-Serial Cache: Exploiting Input Bit Vector Repetition to Accelerate Bit-Serial InferenceYun-Chen Lo, Ren-Shuo Liu. 1-6 [doi]
• Towards A Formally Verified Fully Homomorphic Encryption Compute EngineJeremy Casas, Zhenkun Yang, Wen Wang, Jin Yang 0006, Adwait Godbole. 1-6 [doi]
• MES-Attacks: Software-Controlled Covert Channels based on Mutual Exclusion and SynchronizationChaoqun Shen, Jiliang Zhang 0002, Gang Qu 0001. 1-6 [doi]
• TOTAL: Multi-Corners Timing Optimization Based on Transfer and Active LearningWei W. Xing, Zheng Xing, Rongqi Lu, Zhelong Wang, Ning Xu, Yuanqing Cheng, Weisheng Zhao. 1-6 [doi]
• VITAL: Vision Transformer Neural Networks for Accurate Smartphone Heterogeneity Resilient Indoor LocalizationDanish Gufran, Saideep Tiku, Sudeep Pasricha. 1-6 [doi]
• Fault Injection in Native Logic-in-Memory Computation on Neuromorphic HardwareFelix Staudigl, Thorben Fetz, Rebecca Pelke, Dominik Sisejkovic, Jan Moritz Joseph, Letícia Maria Bolzani Pöhls, Rainer Leupers. 1-6 [doi]
• Optimal Synthesis of Multi-Controlled Qudit GatesWei Zi, Qian Li, Xiaoming Sun 0001. 1-6 [doi]
• CHAM: A Customized Homomorphic Encryption Accelerator for Fast Matrix-Vector ProductXuanle Ren, Zhaohui Chen, Zhen Gu, YanHeng Lu, Ruiguang Zhong, Wen-Jie Lu, Jiansong Zhang, Yichi Zhang, Hanghang Wu, Xiaofu Zheng, Heng Liu, Tingqiang Chu, Cheng Hong, Changzheng Wei, Dimin Niu, Yuan Xie 0001. 1-6 [doi]
• MTL-Designer: An Integrated Flow for Analysis and Synthesis of Microstrip Transmission LineQipan Wang, Ping Liu, Liguo Jiang, Mingjie Liu, Yibo Lin, Runsheng Wang, Ru Huang. 1-6 [doi]
• UpTime: Towards Flow-based In-Memory Computing with High Fault-ToleranceSven Thijssen, Muhammad Rashedul Haq Rashed, Sumit Kumar Jha 0001, Rickard Ewetz. 1-6 [doi]
• Towards Efficient Convolutional Neural Network for Embedded Hardware via Multi-Dimensional PruningHao Kong, Di Liu 0002, Xiangzhong Luo, Shuo Huai, Ravi Subramaniam, Christian Makaya, Qian Lin 0001, Weichen Liu. 1-6 [doi]
• ZKROWNN: Zero Knowledge Right of Ownership for Neural NetworksNojan Sheybani, Zahra Ghodsi, Ritvik Kapila, Farinaz Koushanfar. 1-6 [doi]
• DeepOHeat: Operator Learning-based Ultra-fast Thermal Simulation in 3D-IC DesignZiyue Liu 0003, Yixing Li, Jing Hu, Xinling Yu, Shinyu Shiau, Xin Ai 0007, Zhiyu Zeng, Zheng Zhang. 1-6 [doi]
• Uint-Packing: Multiply Your DNN Accelerator Performance via Unsigned Integer DSP PackingJingwei Zhang, Meng Zhang 0010, Xinye Cao, Guoqing Li. 1-6 [doi]
• Late Breaking Results: An Efficient Bridge-based Compression Algorithm for Topologically Quantum Error Corrected CircuitsWei-Hsiang Tseng, Yao-Wen Chang. 1-2 [doi]
• Critical Paths Prediction under Multiple Corners Based on BiLSTM NetworkQianqian Song, Xu Cheng, Peng Cao. 1-6 [doi]
• RoSE: Robust Analog Circuit Parameter Optimization with Sampling-Efficient Reinforcement LearningJian Gao, Weidong Cao, Xuan Zhang. 1-6 [doi]
• Late Breaking Results: RL-LPO: Reinforcement Learning Based Leakage Power Optimization Framework with Graph Neural NetworkPeng Cao, Jiahao Wang. 1-2 [doi]
• PTStore: Lightweight Architectural Support for Page Table IsolationWende Tan, Yangyu Chen, Yuan Li, Ying Liu 0024, Jianping Wu, Yu Ding, Chao Zhang. 1-6 [doi]
• Fault Tolerance in Time-Sensitive Networking with Mixed-Critical TrafficWenhong Ma, Xiangzhen Xiao, Guoqi Xie, Nan Guan, Yu Jiang 0001, Wanli Chang 0001. 1-6 [doi]
• FPDsim: A Structural Simulator For Power Grid Analysis Of Flat Panel DisplayChengtao An, Chunqiao Li, Xiangqi Li, Yangfeng Su, Fan Yang 0001, Xuan Zeng 0001. 1-6 [doi]
• GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple InputsDian-Lun Lin, Yanqing Zhang 0002, Haoxing Ren, Brucek Khailany, Shih-Hsin Wang, Tsung-Wei Huang. 1-6 [doi]
• TF-MVP: Novel Sparsity-Aware Transformer Accelerator with Mixed-Length Vector PruningEunji Yoo, Gunho Park, Jung Gyu Min, Se Jung Kwon, Baeseong Park, Dongsoo Lee, Youngjoo Lee. 1-6 [doi]
• AccShield: a New Trusted Execution Environment with Machine-Learning AcceleratorsWei Ren, William Kozlowski, Sandhya Koteshwara, Mengmei Ye, Hubertus Franke, Deming Chen. 1-6 [doi]
• Efficient Non-Linear Adder for Stochastic Computing with Approximate Spatial-Temporal Sorting NetworkYixuan Hu, Tengyu Zhang, Meng Li, Renjie Wei, Liangzhen Lai, Yuan Wang, Runsheng Wang, Ru Huang. 1-6 [doi]
• An FPGA-Compatible TRNG with Ultra-High Throughput and Energy EfficiencyZhaojun Lu, Houjia Qidiao, Qidong Chen, Zhenglin Liu, Jiliang Zhang. 1-6 [doi]
• Compact and High-Performance TCAM Based on Scaled Double-Gate FeFETsLiu Liu, Shubham Kumar, Simon Thomann, Hussam Amrouch, Xiaobo Sharon Hu. 1-6 [doi]
• ML-CGRA: An Integrated Compilation Framework to Enable Efficient Machine Learning Acceleration on CGRAsYixuan Luo, Cheng Tan 0002, Nicolas Bohm Agostini, Ang Li 0006, Antonino Tumeo, Nirav Dave, Tong Geng. 1-6 [doi]
• An Efficient Accelerator for Point-based and Voxel-based Point Cloud Neural NetworksXinhao Yang, Tianyu Fu 0004, Guohao Dai, Shulin Zeng, Kai Zhong, Ke Hong, Yu Wang 0002. 1-6 [doi]
• Invited: Accelerating Genome Analysis via Algorithm-Architecture Co-DesignOnur Mutlu, Can Firtina. 1-4 [doi]
• (Invited) Predictive analytics for cryogenic CMOS in future quantum computing systemsRajiv V. Joshi, Sudipto Chakraborty. 1-4 [doi]
• Invited: Waving the Double-Edged Sword: Building Resilient CAVs with Edge and Cloud ComputingXiangguo Liu, Yunpeng Luo, Anthony Goeckner, Trishna Chakraborty, Ruochen Jiao, Ningfei Wang, Yixuan Wang, Takami Sato, Qi Alfred Chen, Qi Zhu 0002. 1-4 [doi]
• A digital 3D TCAM accelerator for the inference phase of Random ForestChieh-Lin Tsai, Chun-Feng Wu, Yuan-Hao Chang 0001, Han-Wen Hu, Yung-Chun Lee, Hsiang-Pang Li, Tei-Wei Kuo. 1-6 [doi]
• vPIM: Efficient Virtual Address Translation for Scalable Processing-in-Memory ArchitecturesAmel Fatima, Sihang Liu 0001, Korakit Seemakhupt, Rachata Ausavarungnirun, Samira Manabi Khan. 1-6 [doi]
• Ever more optimized simulations of fermionic systems on a quantum computerQingfeng Wang, Ze-Pei Cian, Ming Li, Igor L. Markov, Yunseong Nam. 1-6 [doi]
• PASNet: Polynomial Architecture Search Framework for Two-party Computation-based Secure Neural Network DeploymentHongwu Peng, Shanglin Zhou, Yukui Luo, Nuo Xu, Shijin Duan, Ran Ran, Jiahui Zhao, Chenghong Wang, Tong Geng, Wujie Wen, Xiaolin Xu, Caiwen Ding. 1-6 [doi]
• 2PI: An Efficient Crypto-Clear Two-Party Neural Network Private InferenceYuke Zhang, Dake Chen, Souvik Kundu 0002, Haomei Liu, Ruiheng Peng, Peter A. Beerel. 1-6 [doi]
• UpPipe: A Novel Pipeline Management on In-Memory Processors for RNA-seq QuantificationLiang-Chi Chen, Chien-Chung Ho, Yuan-Hao Chang 0001. 1-6 [doi]
• RLAlloc: A Deep Reinforcement Learning-Assisted Resource Allocation Framework for Enhanced Both I/O Throughput and QoS Performance of Multi-Streamed SSDsMengquan Li, Chao Wu 0006, Congming Gao, Cheng Ji, Kenli Li 0001. 1-6 [doi]
• NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector GenerationAntian Wang, Bingyin Zhao, Weihang Tan, Yingjie Lao. 1-6 [doi]
• CPE: An Energy-Efficient Edge-Device Training with Multi-dimensional Compression MechanismZhou Wang, Jingchuan Wei, Boxiao Han, Hongjun He, Leibo Liu, Shaojun Wei, Shouyi Yin. 1-6 [doi]
• Power Side-Channel Vulnerability Assessment of Lightweight Cryptographic Scheme, XOODYAKAnupam Golder, Debayan Das, Santosh Ghosh, Avinash Varna, Majid Sabbagh, Sayak Ray, Rana Elnaggar, Joseph Friel, Daniel Dinu, Jason M. Fung. 1-6 [doi]
• HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet ArrangementPatrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer 0001, Luca Benini, Torsten Hoefler. 1-6 [doi]
• Restructure-Tolerant Timing Prediction via Multimodal FusionZiyi Wang, Siting Liu, Yuan Pu, Song Chen 0001, Tsung-Yi Ho, Bei Yu 0001. 1-6 [doi]
• Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex ConstraintsQinghai Liu, Qinfei Tang, Jiarui Chen, Chuandong Chen, Ziran Zhu, Huan He, Jianli Chen, Yao-Wen Chang. 1-6 [doi]
• CorcPUM: Efficient Processing Using Cross-Point Memory via Cooperative Row-Column Access Pipelining and Adaptive Timing Optimization in SubarraysChengning Wang, Dan Feng 0001, Wei Tong 0001, Jingning Liu. 1-6 [doi]
• PUMICE: Processing-using-Memory Integration with a Scalar Pipeline for Symbiotic ExecutionSocrates S. Wong, Cecilio C. Tamarit, José F. Martínez. 1-6 [doi]
• PSMiner: A Pattern-Aware Accelerator for High-Performance Streaming Graph Pattern MiningHao Qi, Yu Zhang, Ligang He, Kang Luo, Jun Huang, Haoyu Lu, Jin Zhao 0003, Hai Jin 0001. 1-6 [doi]
• Stochastic-HMDs: Adversarial-Resilient Hardware Malware Detectors via UndervoltingMd. Shohidul Islam, Ihsen Alouani, Khaled N. Khasawneh. 1-6 [doi]
• G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware AcceleratorsSaranyu Chattopadhyay, Keerthikumara Devarajegowda, Bihan Zhao, Florian Lonsing, Brandon A. D'Agostino, Ioanna Vavelidou, Vijay Deep Bhatt, Sebastian Prebeck, Wolfgang Ecker, Caroline Trippel, Clark W. Barrett, Subhasish Mitra. 1-6 [doi]
• Lamellar DSA-aware Detailed Routing Considering Double Patterning and Short Template MinimizationKuei-Lin Wu, Shao-Yun Fang. 1-6 [doi]
• HDSuper: Algorithm-Hardware Co-design for Light-weight High-quality Super-Resolution AcceleratorLiang Chang 0002, Xin Zhao, Dongqi Fan, Zhicheng Hu, Jun Zhou 0017. 1-6 [doi]
• ANAS: Asynchronous Neuromorphic Hardware Architecture Search Based on a System-Level SimulatorJian Zhang, Jilin Zhang, Dexuan Huo, Hong Chen 0002. 1-6 [doi]
• Morphable CIM: Improving Operation Intensity and Depthwise Capability for SRAM-CIM ArchitectureYun-Chen Lo, Ren-Shuo Liu. 1-6 [doi]
• ExploreFault: Identifying Exploitable Fault Models in Block Ciphers with Reinforcement LearningHao Guo, Sayandeep Saha, Vasudev Gohil, Satwik Patnaik, Debdeep Mukhopadhyay, Jeyavijayan (JV) Rajendran. 1-6 [doi]
• Accelerating Sparse Attention with a Reconfigurable Non-volatile Processing-In-Memory ArchitectureQilin Zheng, Shiyu Li, Yitu Wang, Ziru Li, Yiran Chen 0001, Hai Helen Li. 1-6 [doi]
• Unified Agile Accuracy Assessment in Computing-in-Memory Neural Accelerators by Layerwise Dynamical IsometryXuan-Jun Chen, Cynthia Kuan, Chia-Lin Yang. 1-6 [doi]
• PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy ExplorationZhijie Cai, Peng Zou, Zhengtao Wu, Xingyu Tong, Jun Yu 0010, Jianli Chen, Yao-Wen Chang. 1-6 [doi]
• AdaS: A Fast and Energy-Efficient CNN Accelerator Exploiting Bit-SparsityXiaolong Lin, Gang Li 0015, Zizhao Liu, Yadong Liu, Fan Zhang, Zhuoran Song, Naifeng Jing, Xiaoyao Liang. 1-6 [doi]
• PVC-RAM:Process Variation Aware Charge Domain In-Memory Computing 6T-SRAM for DNNsSai Shubham, Shubham Pandit, Kailash Prasad, Joycee Mekie. 1-2 [doi]
• General-Purpose Gate-Level Simulation with Partition-Agnostic ParallelismZizheng Guo, Zuodong Zhang, Xun Jiang, Wuxi Li, Yibo Lin, Runsheng Wang, Ru Huang. 1-6 [doi]
• Contention-Free Configured Grant Scheduling for 5G URLLC TrafficTianyu Zhang, Xiaobo Sharon Hu, Song Han 0002. 1-6 [doi]
• EagleRec: Edge-Scale Recommendation System Acceleration with Inter-Stage Parallelism Optimization on GPUsYongbo Yu, Fuxun Yu, Xiang-Sheng, Chenchen Liu, Xiang Chen 0010. 1-6 [doi]
• Hybrid Obfuscation of Chiplet-Based SystemsYousef Safari, Pooya Aghanoury, Subramanian S. Iyer, Nader Sehatbakhsh, Boris Vaisband. 1-6 [doi]
• ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable MemoryHongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li. 1-6 [doi]
• Lightning Talk: The New Era of Computational Cognitive IntelligenceNikil D. Dutt, Bryan Donyanavard. 1-2 [doi]
• Venus: A Versatile Deep Neural Network Accelerator Architecture Design for Multiple ApplicationsJiaqi Yang, Hao Zheng 0005, Ahmed Louri. 1-6 [doi]
• DSPIMM: A Fully Digital SParse In-Memory Matrix Vector Multiplier for Communication ApplicationsAmitesh Sridharan, Fan Zhang 0069, Yang Sui, Bo Yuan 0001, Deliang Fan. 1-6 [doi]
• HyperAttack: An Efficient Attack Framework for HyperDimensional ComputingFangxin Liu, Haoming Li, Yongbiao Chen, Tao Yang, Li Jiang 0002. 1-6 [doi]
• INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich PlatformsBo-Yuan Huang 0001, Hongce Zhang, Aarti Gupta, Sharad Malik. 1-4 [doi]
• PIE-DRAM: Postponing IECC to Enhance DRAM performance with access tableJaeHwa Jeon, Jae-Youn Hong, Sunghoon Kim, Insu Choi, Joon-Sung Yang. 1-2 [doi]
• BERRY: Bit Error Robustness for Energy-Efficient Reinforcement Learning-Based Autonomous SystemsZishen Wan, Nandhini Chandramoorthy, Karthik Swaminathan, Pin-Yu Chen, Vijay Janapa Reddi, Arijit Raychowdhury. 1-6 [doi]
• Seeking the Yield Barrier: High-Dimensional SRAM Evaluation Through Optimal ManifoldYanfang Liu, Guohao Dai, Wei W. Xing. 1-6 [doi]
• Lightweight Structural Choices Operator for Technology MappingAntoine Grosnit, Matthieu Zimmer, Rasul Tutunov, Xing Li, Lei Chen 0031, Fan Yang, Mingxuan Yuan, Haitham Bou-Ammar. 1-6 [doi]
• Invited: Automated Code generation for Information Technology Tasks in YAML through Large Language ModelsSaurabh Pujar, Luca Buratti, Xiaojie Guo, Nicolas Dupuis, Burn L. Lewis, Sahil Suneja, Atin Sood, Ganesh Nalawade, Matthew Jones, Alessandro Morari, Ruchir Puri. 1-4 [doi]
• Fast Adversarial Training with Dynamic Batch-level Attack ControlJaewon Jung 0001, Jaeyong Song, Hongsun Jang, Hyeyoon Lee, Kanghyun Choi, Noseong Park, Jinho Lee. 1-6 [doi]
• An Iterative Method for Mapping-Aware Frequency Regulation in Dataflow CircuitsCarmine Rizzi, Andrea Guerrieri, Lana Josipovic. 1-6 [doi]
• CUDA Quantum: The Platform for Integrated Quantum-Classical ComputingJin-Sung Kim, Alex McCaskey, Bettina Heim, Manish Modani, Sam Stanwyck, Timothy B. Costa. 1-4 [doi]
• Mantra: Mutation Testing of Hardware Design Code Based on Real BugsJiang Wu, Yan Lei, Zhuo Zhang 0007, Xiankai Meng, Deheng Yang, Pan Li, Jiayu He, Xiaoguang Mao. 1-6 [doi]
• Property-Based Timing Analysis and Optimization for Complex Cyber-Physical Real-Time SystemsJian-Jia Chen, Niklas Ueter, Mario Günzel, Georg von der Brüggen, Tei-Wei Kuo. 1-2 [doi]
• Input-Aware Dynamic Timestep Spiking Neural Networks for Efficient In-Memory ComputingYuhang Li, Abhishek Moitra, Tamar Geller, Priyadarshini Panda. 1-6 [doi]
• Invited: Algorithm-Software-Hardware Co-Design for Deep Learning AccelerationZhengang Li, Yanyue Xie, Peiyan Dong, Olivia Chen, Yanzhi Wang. 1-4 [doi]
• Don't Cross Me! Cross-layer System SecurityNajmeh Nazari, Chongzhou Fang, Sai Manoj P. D., Houman Homayoun. 1-2 [doi]
• Toward Optimal Filler Cell Insertion with Complex Implant Layer ConstraintsPeng Zou, Guohao Chen, Zhifeng Lin, Jun Yu 0010, Jianli Chen. 1-6 [doi]
• Lightning Talk: The Incredible Shrinking Black Box ModelPatrick Schaumont. 1-2 [doi]
• Efficient ILT via Multi-level Lithography SimulationShuyuan Sun, Fan Yang 0001, Bei Yu 0001, Li Shang, Xuan Zeng 0001. 1-6 [doi]
• Lightning Talk: All Routes to Timing ClosureIris Hui-Ru Jiang. 1-2 [doi]
• Lightning Talk: Memory-Centric ComputingOnur Mutlu. 1-2 [doi]
• MARS: Exploiting Multi-Level Parallelism for DNN Workloads on Adaptive Multi-Accelerator SystemsGuan Shen, Jieru Zhao, Zeke Wang, Zhe Lin, Wenchao Ding 0001, Chentao Wu, Quan Chen 0002, Minyi Guo. 1-6 [doi]
• TD-Magic: From Pictures of Timing Diagrams To Formal SpecificationsJie He, Dejan Nickovic, Ezio Bartocci, Radu Grosu. 1-6 [doi]
• FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication AcceleratorXiaoyu Zhang 0002, Zerun Li, Rui Liu, Xiaoming Chen 0003, Yinhe Han 0001. 1-6 [doi]
• Discerning Limitations of GNN-based Attacks on Logic LockingArmin Darjani, Nima Kavand, Shubham Rai, Akash Kumar 0001. 1-6 [doi]
• HBP: Hierarchically Balanced Pruning and Accelerator Co-Design for Efficient DNN InferenceAo Ren, Yuhao Wang, Tao Zhang, Jiaxing Shi, Duo Liu, Xianzhang Chen, Yujuan Tan, Yuan Xie 0001. 1-6 [doi]
• Mitigating Distribution Shift for Congestion Optimization in Global PlacementSu Zheng, Lancheng Zou, Siting Liu, Yibo Lin, Bei Yu 0001, Martin D. F. Wong. 1-6 [doi]
• Lightning Talk: Model, Framework and Integration for In-Storage Computing with Computational SSDsTianyu Wang, Jin Xue, Zelin Du, Zhiqi Wang, Yaotian Cui, Zili Shao. 1-2 [doi]
• Safe DNN-type Controller Synthesis for Nonlinear Systems via Meta Reinforcement LearningHanrui Zhao, Xia Zeng, Niuniu Qi, Zhengfeng Yang, Zhenbing Zeng. 1-6 [doi]
• Rethinking Programming Frameworks for In-Storage ProcessingYu-Chia Liu, Kuan-Chieh Hsu, Hung-Wei Tseng 0001. 1-6 [doi]
• Stalker: A Framework to Analyze Fragility of Cryptographic Libraries under Hardware Fault ModelsGuorui Xu, Fan Zhang 0010, XinJie Zhao, Yuan Chen, Shize Guo, Kui Ren 0001. 1-6 [doi]
• HAIMA: A Hybrid SRAM and DRAM Accelerator-in-Memory Architecture for TransformerYan Ding, Chubo Liu, Mingxing Duan, Wanli Chang 0001, Keqin Li 0001, Kenli Li 0001. 1-6 [doi]
• SimLL: Similarity-Based Logic Locking Against Machine Learning AttacksSubhajit Dutta Chowdhury, Kaixin Yang, Pierluigi Nuzzo 0002. 1-6 [doi]
• Emerging Trends in Multi-Accelerator and Distributed System for ML: Devices, Architectures, Tools and ApplicationsMuhammad Shafique. 1-2 [doi]
• Reinforcement Learning-based Analog Circuit Optimizer using gm/ID for SizingMinjeong Choi, Youngchang Choi, Kyongsu Lee, Seokhyeong Kang. 1-6 [doi]
• Mckeycutter: A High-throughput Key Generator of Classic McEliece on HardwareYihong Zhu, Wenping Zhu, Chen Chen, Min Zhu 0001, Zhengdong Li, Shaojun Wei, Leibo Liu. 1-6 [doi]
• Lightning Talk: Scaling Up Quantum Compilation - Challenges and OpportunitiesJason Cong. 1-2 [doi]
• MixPipe: Efficient Bidirectional Pipeline Parallelism for Training Large-Scale ModelsWeigang Zhang, Biyu Zhou, Xuehai Tang, Zhaoxing Wang, Songlin Hu. 1-6 [doi]
• Dynamic Sparse Training via Balancing the Exploration-Exploitation Trade-offShaoyi Huang, Bowen Lei, Dongkuan Xu, Hongwu Peng, Yue Sun, Mimi Xie, Caiwen Ding. 1-6 [doi]
• IFHE: Intermediate-Feature Heterogeneity Enhancement for Image Synthesis in Data-Free Knowledge DistillationYi Chen, Ning Liu, Ao Ren, Tao Yang, Duo Liu. 1-6 [doi]
• Graph Representation Learning for Microarchitecture Design Space ExplorationXiaoling Yi, Jialin Lu, Xiankui Xiong, Dong Xu 0015, Li Shang, Fan Yang 0001. 1-6 [doi]
• Condense: A Framework for Device and Frequency Adaptive Neural Network Models on the EdgeYifan Gong 0004, Pu Zhao 0001, Zheng Zhan 0001, Yushu Wu, Chao Wu, Zhenglun Kong, Minghai Qin, Caiwen Ding, Yanzhi Wang. 1-6 [doi]
• When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGAHongxiang Fan, Mark Chen, Liam Castelli, Zhiqiang Que, He Li 0008, Kenneth Long, Wayne Luk. 1-6 [doi]
• Occamy: Memory-efficient GPU Compiler for DNN InferenceJaeho Lee, Shinnung Jeong, Seungbin Song, Kunwoo Kim, Heelim Choi, Youngsok Kim, Hanjun Kim 0001. 1-6 [doi]
• Rethinking AIG Resynthesis in ParallelTianji Liu, Evangeline F. Y. Young. 1-6 [doi]
• Work or Sleep: Freshness-Aware Energy Scheduling for Wireless Powered Communication Networks with Interference ConsiderationLing Lin, Lei Ju, Chun Jason Xue, Mingliang Zhou, Wei Zhang 0173, Zimeng Zhou. 1-6 [doi]
• Fault-Tolerance-Oriented Physical Design for Fully Programmable Valve Array BiochipsGenggeng Liu, Yuhan Zhu, Wenzhong Guo, Xing Huang. 1-6 [doi]
• ACGraph: Accelerating Streaming Graph Processing via Dependence HierarchyZihan Jiang, Fubing Mao, Yapu Guo, Xu Liu, Haikun Liu, Xiaofei Liao, Hai Jin 0001, Wei Zhang. 1-6 [doi]
• EDGE: Efficient DAG-based Global Routing EngineJinwei Liu, Evangeline F. Y. Young. 1-6 [doi]
• HTVM: Efficient Neural Network Deployment On Heterogeneous TinyML PlatformsJosse Van Delm, Maarten Vandersteegen, Alessio Burrello, Giuseppe Maria Sarda, Francesco Conti 0001, Daniele Jahier Pagliari, Luca Benini, Marian Verhelst. 1-6 [doi]
• Lightning Talk: Bridging Neuro-Dynamics and CognitionMohsen Imani. 1-2 [doi]
• Smart Detection of Obfuscated Thermal Covert Channel Attacks in Many-core ProcessorsJeferson González-Gómez, Mohammed Bakr Sikal, Heba Khdr, Lars Bauer, Jörg Henkel. 1-6 [doi]
• GDSII-Guard: ECO Anti-Trojan Optimization with Exploratory Timing-Security Trade-OffsXinming Wei, Jiaxi Zhang 0001, Guojie Luo. 1-6 [doi]
• Faster and Stronger Lossless Compression with Optimized Autoregressive FrameworkYu Mao, Jingzong Li, Yufei Cui, Chun Jason Xue. 1-6 [doi]
• On a Moreau Envelope Wirelength Model for Analytical Global PlacementPeiyu Liao, Hongduo Liu, Yibo Lin, Bei Yu 0001, Martin D. F. Wong. 1-6 [doi]
• A Model-Specific End-to-End Design Methodology for Resource-Constrained TinyML HardwareYanchi Dong, Tianyu Jia, Kaixuan Du, Yiqi Jing, Qijun Wang, Pixian Zhan, Yadong Zhang, Fengyun Yan, Yufei Ma 0002, Yun Liang 0001, Le Ye, Ru Huang. 1-6 [doi]
• Lightning Talk 6: Bringing Together Foundation Models and Edge DevicesNick Eliopoulos, Yung-Hsiang Lu. 1-2 [doi]
• Formal Verification of Restoring Dividers made Fast and SimpleJiteshri Dasari, Maciej J. Ciesielski. 1-6 [doi]
• On the Unpredictability of SPICE Simulations for Side-Channel Leakage Verification of Masked Cryptographic CircuitsKazuki Monta, Makoto Nagata, Josep Balasch, Ingrid Verbauwhede. 1-6 [doi]
• OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU AccelerationZhuolun He, Yihang Zuo, Jiaxi Jiang, Haisheng Zheng, Yuzhe Ma, Bei Yu 0001. 1-6 [doi]
• PertNAS: Architectural Perturbations for Memory-Efficient Neural Architecture SearchAfzal Ahmad, Zhiyao Xie, Wei Zhang 0012. 1-6 [doi]
• HAWEN: Hardware Accelerator for Thread Wake-Ups in Linux Event NotificationLars Nolte, Tim Twardzik, Camille Jalier, Zhigang Huang, Jiyuan Shi, Clara Kowalsky, Thomas Wild, Andreas Herkersdorf. 1-6 [doi]
• HUNTER: Releasing Persistent Memory Write Performance with A Novel PM-DRAM Collaboration ArchitectureYanqi Pan, Yifeng Zhang, Wen Xia, Xiangyu Zou, Cai Deng. 1-6 [doi]
• Automating Constraint-Aware Datapath Optimization using E-GraphsSamuel Coward, George A. Constantinides, Theo Drane. 1-6 [doi]
• Late Breaking Results: PVT-Sensitive Delay Fitting for High-Performance ComputingDing-Hao Wang, Shuo-Hung Hsu, Shu-Hsiang Yang, Pei-Ju Lin, Hui-Ting Yang, Mark Po-Hung Lin. 1-2 [doi]
• A Database Dependent Framework for K-Input Maximum Fanout-Free Window RewritingXuliang Zhu, Ruofei Tang, Lei Chen 0002, Xing Li, Xin Huang, Mingxuan Yuan, Weihua Sheng, Jianliang Xu. 1-6 [doi]
• SCAGuard: Detection and Classification of Cache Side-Channel Attacks via Attack Behavior Modeling and Similarity ComparisonLimin Wang, Lei Bu, Fu Song. 1-6 [doi]
• cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit SynthesisAidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang 0001, Li Shang, Dian Zhou, Xuan Zeng 0001. 1-6 [doi]
• TiPU: A Spatial-Locality-Aware Near-Memory Tile Processing Unit for 3D Point Cloud Neural NetworkJiapei Zheng, Hao Jiang, Xinkai Nie, Zhangcheng Huang, Chixiao Chen, Qi Liu. 1-6 [doi]
• Invited: Autonomous Driving Digital Twin Empowered Design Automation: An Industry PerspectiveBo Yu, Jie Tang 0003, Shaoshan Liu. 1-4 [doi]
• Lightning Talk: A Perspective on Neuromorphic ComputingDeepika Sharma, Adarsh Kumar Kosta, Kaushik Roy 0001. 1-2 [doi]
• Lightning Talk: Unlocking the Potential of the Analog Domain: Exploring the Next Frontier in Hardware SecurityWaleed Khalil. 1 [doi]
• Late Breaking Results: Scalable and Efficient Hyperdimensional Computing for Network Intrusion DetectionJunyao Wang, Hanning Chen, Mariam Issa, Sitao Huang, Mohsen Imani. 1-2 [doi]
• Lightning Talk: Efficiency and Programmability of DNN Accelerators and GPUsWon Woo Ro. 1-2 [doi]
• AGD: A Learning-based Optimization Framework for EDA and its Application to Gate SizingPhuoc Pham, Jaeyong Chung. 1-6 [doi]
• STCG: State-Aware Test Case Generation for Simulink ModelsZhuo Su 0005, Zehong Yu, Dongyan Wang, Yixiao Yang, Rui Wang 0024, Wanli Chang 0001, Aiguo Cui, Yu Jiang 0001. 1-6 [doi]
• NMExplorer: An Efficient Exploration Framework for DIMM-based Near-Memory Tensor ReductionCong Li, Zhe Zhou, Xingchen Li, Guangyu Sun 0003, Dimin Niu. 1-6 [doi]
• Battle Against Fluctuating Quantum Noise: Compression-Aided Framework to Enable Robust Quantum Neural NetworkZhirui Hu, Youzuo Lin, Qiang Guan, Weiwen Jiang. 1-6 [doi]
• RL-MUL: Multiplier Design Optimization with Deep Reinforcement LearningDongsheng Zuo, Yikang Ouyang, Yuzhe Ma. 1-6 [doi]
• Toward Parallelism-Optimal Topology Generation for Wavelength-Routed Optical NoC DesignsKuan-Cheng Chen, Yan-Lin Chen, Yu-Sheng Lu, Yao-Wen Chang. 1-6 [doi]
• Correlation-guided Placement for Nonvolatile FPGAsMengying Zhao, Fanjin Xu, Huichuan Zheng, Hao Zhang, Yuqing Xiong, Zhiping Jia, Xiaojun Cai. 1-6 [doi]
• Shoggoth: Towards Efficient Edge-Cloud Collaborative Real-Time Video Inference via Adaptive Online LearningLiang Wang, Kai Lu, Nan Zhang, Xiaoyang Qu, Jianzong Wang, Jiguang Wan, Guokuan Li, Jing Xiao 0006. 1-6 [doi]
• SPET: Transparent SRAM Allocation and Model Partitioning for Real-time DNN Tasks on Edge TPUChanghun Han, Hoon Sung Chwa, Kilho Lee, Sangeun Oh. 1-6 [doi]
• Victor: A Variation-resilient Approach Using Cell-Clustered Charge-domain computing for High-density High-throughput MLC CiMMingyen Lee, Wenjun Tang, Yiming Chen, Juejian Wu, Hongtao Zhong, Yixin Xu, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li. 1-6 [doi]
• HammerDodger: A Lightweight Defense Framework against RowHammer Attack on DNNsCheng Gongye, Yukui Luo, Xiaolin Xu, Yunsi Fei. 1-6 [doi]
• Hardware-Aware Graph Neural Network Automated Design for Edge Computing PlatformsAo Zhou, Jianlei Yang 0001, Yingjie Qi, Yumeng Shi, Tong Qiao, Weisheng Zhao, Chunming Hu. 1-6 [doi]
• Hardware Support for Durable Atomic Instructions for Persistent Parallel ProgrammingKhan Shaikhul Hadi, Naveed Ul Mustafa, Mark Heinrich, Yan Solihin. 1-6 [doi]
• Neurogenesis Dynamics-inspired Spiking Neural Network Training AccelerationShaoyi Huang, Haowen Fang, Kaleel Mahmood, Bowen Lei, Nuo Xu, Bin Lei, Yue Sun, Dongkuan Xu, Wujie Wen, Caiwen Ding. 1-6 [doi]
• Quixote: Improving Fidelity of Quantum Program by Independent Execution of Controlled GatesEnhyeok Jang, Seungwoo Choi, Won Woo Ro. 1-6 [doi]
• Invited: Caching in Automated Data Centric Vehicles for Edge Computing ScenariosNora Sperling, Alex Bendrick, Dominik Stöhrmann, Rolf Ernst. 1-4 [doi]
• Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional SimulationRongjian Liang, Nathaniel Ross Pinckney, Yuji Chai, Haoxin Ren, Brucek Khailany. 1-2 [doi]
• IP Protection in TinyMLJinwen Wang, Yuhao Wu, Han Liu, Bo Yuan 0002, Roger Chamberlain, Ning Zhang 0017. 1-6 [doi]
• Privacy-Preserving DNN Training with Prefetched Meta-Keys on Heterogeneous Neural Network AcceleratorsQiushi Li, Ju Ren, Yan Zhang, Chengru Song, Yiqiao Liao, Yaoxue Zhang. 1-6 [doi]
• AdaGL: Adaptive Learning for Agile Distributed Training of Gigantic GNNsRuisi Zhang, Mojan Javaheripi, Zahra Ghodsi, Amit Bleiweiss, Farinaz Koushanfar. 1-6 [doi]
• STRIVE: Enabling Choke Point Detection and Timing Error Resilience in a Low-Power Tensor Processing UnitNoel Daniel Gundi, Zinnia Muntaha Mowri, Andrew Chamberlin, Sanghamitra Roy, Koushik Chakraborty. 1-6 [doi]
• Lightning Talk: Can memory technologies meet demands of data abundant applications?Vijaykrishnan Narayanan. 1-2 [doi]
• On-Device Unsupervised Image SegmentationJunhuan Yang, Yi-sheng, Yuzhou Zhang, Weiwen Jiang, Lei Yang 0018. 1-6 [doi]
• Invited: A Scalable Formal Approach for Correctness-Assured Hardware DesignJin Yang 0006, Jeremy Casas, Zhenkun Yang. 1-4 [doi]
• Reinforcement Learning-Assisted Management for Convertible SSDsQian Wei, Yi Li, Zhiping Jia, Mengying Zhao, Zhaoyan Shen, Bingzhe Li. 1-6 [doi]
• An Extension to Basis-Hypervectors for Learning from Circular Data in Hyperdimensional ComputingIgor Nunes, Mike Heddes, Tony Givargis, Alexandru Nicolau. 1-6 [doi]
• Invited: Compute Express Link™ (CXL™): An Open Interconnect for Cloud InfrastructureDebendra Das Sharma. 1-4 [doi]
• How to Boost Deep Neural Networks for Computer VisionSoonhoi Ha. 1-2 [doi]
• Memory and Computation Coordinated Mapping of DNNs onto Complex Heterogeneous SoCSize Zheng 0001, Siyuan Chen, Yun Liang 0001. 1-6 [doi]
• RL-CCD: Concurrent Clock and Data Optimization using Attention-Based Self-Supervised Reinforcement LearningYi-Chen Lu, Wei-Ting Chan, Deyuan Guo, Sudipto Kundu, Vishal Khandelwal, Sung Kyu Lim. 1-6 [doi]
• ZoneKV: A Space-Efficient Key-Value Store for ZNS SSDsMingchen Lu, Peiquan Jin, Xiaoliang Wang, Yongping Luo, Kuankuan Guo. 1-6 [doi]
• PIM-HLS: An Automatic Hardware Generation Tool for Heterogeneous Processing-In-Memory-based Neural Network AcceleratorsYu Zhu, Zhenhua Zhu, Guohao Dai, Fengbin Tu, Hanbo Sun, Kwang-Ting Cheng, Huazhong Yang, Yu Wang 0002. 1-6 [doi]
• Late Breaking Results: COPPER: Computation Obfuscation by Producing Permutations for Encoding RandomlyKevin Hutto, Vincent John Mooney. 1-2 [doi]
• NTT-PIM: Row-Centric Architecture and Mapping for Efficient Number-Theoretic Transform on PIMJaewoo Park, Sugil Lee, Jongeun Lee. 1-6 [doi]
• Algorithms and Hardware for Efficient Processing of Logic-based Neural NetworksJingkai Hong, Arash Fayyazi, Amirhossein Esmaili, Mahdi Nazemi, Massoud Pedram. 1-6 [doi]
• Leaky MDU: ARM Memory Disambiguation Unit Uncovered and Vulnerabilities ExposedChang Liu, Yongqiang Lyu, Haixia Wang, Pengfei Qiu, Dapeng Ju, Gang Qu 0001, Dongsheng Wang 0002. 1-6 [doi]
• VideoFlip: Adversarial Bit Flips for Reducing Video Service QualityJung-Woo Chang, Mojan Javaheripi, Farinaz Koushanfar. 1-6 [doi]
• Advances and Trends on On-Chip Compute-in-Memory Macros and AcceleratorsJae-sun Seo. 1-6 [doi]
• Flex-SFU: Accelerating DNN Activation Functions by Non-Uniform Piecewise ApproximationEnrico Reggiani, Renzo Andri, Lukas Cavigelli. 1-6 [doi]
• AmgR: Algebraic Multigrid Accelerated on ReRAMMingjia Fan, Xiaotian Tian, Yintao He, Junxian Li, Yiru Duan, Xiaozhe Hu, Ying Wang 0001, Zhou Jin 0001, Weifeng Liu. 1-6 [doi]
• BlueFace: Integrating an Accelerator into the Core's Pipeline through Algorithm-Interface Co-Design for Real-Time SoCsZhe Jiang 0004, Nathan Fisher, Nan Guan, Zheng Dong 0002. 1-6 [doi]
• Compiler Optimization for Quantum Computing Using Reinforcement LearningNils Quetschlich, Lukas Burgholzer, Robert Wille. 1-6 [doi]
• Sidekick: Near Data Processing for Clustering Enhanced by Automatic Memory DisaggregationSanghoon Lee, Jongho Park, Minho Ha, Byungil Koh, Kyoung Park, Yeseong Kim. 1-6 [doi]
• BP-NTT: Fast and Compact in-SRAM Number Theoretic Transform with Bit-Parallel Modular MultiplicationJingyao Zhang 0002, Mohsen Imani, Elaheh Sadredini. 1-6 [doi]
• Graph-Based Simultaneous Placement and Routing for Two-Dimensional Directed Self-Assembly TechnologyWei-Hsu Chen, Yao-Wen Chang. 1-6 [doi]
• Late Breaking Results: Weight Decay is ALL You Need for Neural Network SparsificationXizi Chen, Rui Pan, Xiaomeng Wang, Fengshi Tian, Chi-Ying Tsui. 1-2 [doi]
• PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN AcceleratorsXiaotian Sun, Xinyu Wang, Wanqian Li, Lei Wang, Yinhe Han 0001, Xiaoming Chen 0003. 1-6 [doi]
• INVITED: Design Automation Needs for Monolithic 3D ICs: Accomplishments and GapsLingjun Zhu, Sung Kyu Lim. 1-4 [doi]
• Late Breaking Results: Configurable Ring Oscillators as a Side-Channel CountermeasureHassan Nassar, Simon Pankner, Lars Bauer, Jörg Henkel. 1-2 [doi]
• Physics-Informed Optical Kernel Regression Using Complex-valued Neural FieldsGuojin Chen, Zehua Pei, Haoyu Yang, Yuzhe Ma, Bei Yu 0001, Martin D. F. Wong. 1-6 [doi]
• RQ-DNN: Reliable Quantization for Fault-tolerant Deep Neural NetworksInsu Choi, Jae-Youn Hong, JaeHwa Jeon, Joon-Sung Yang. 1-2 [doi]
• Concurrent Sign-off Timing Optimization via Deep Steiner Points RefinementSiting Liu, Ziyi Wang, Fangzhou Liu, Yibo Lin, Bei Yu 0001, Martin D. F. Wong. 1-6 [doi]
• Profile-Driven Banded Smith-Waterman acceleration for Short Read AlignmentKonstantina Koliogeorgi, Dimitrios Soudris, Sotirios Xydis. 1-6 [doi]
• PseudoSC: A Binary Approximation to Stochastic Computing within Latent Operation-Space for Ultra-Lightweight on-Edge DNNsJihe Wang, Zhaoqing Wang, Danghui Wang. 1-6 [doi]
• Lightning Talk: Private and Secure Edge AI with Hyperdimensional ComputingXiaofan Yu, Minxuan Zhou, Fatemeh Asgarinejad, Onat Güngör, Baris Aksanli, Tajana Rosing. 1-2 [doi]
• Physics-aware Roughness Optimization for Diffractive Optical Neural NetworksShanglin Zhou, Yingjie Li, Minhan Lou, Weilu Gao, Zhijie Shi, Cunxi Yu, Caiwen Ding. 1-6 [doi]
• Efficient Transformer Inference with Statically Structured Sparse AttentionSteve Dai, Hasan Genc, Rangharajan Venkatesan, Brucek Khailany. 1-6 [doi]
• Automated Design of Complex Analog Circuits with Multiagent based Reinforcement LearningJinxin Zhang, Jiarui Bao, Zhangcheng Huang, Xuan Zeng, Ye Lu. 1-6 [doi]
• PowerPruning: Selecting Weights and Activations for Power-Efficient Neural Network AccelerationRichard Petri 0002, Grace Li Zhang, Yiran Chen 0001, Ulf Schlichtmann, Bing Li 0005. 1-6 [doi]
• Layout Decomposition via Boolean SatisfiabilityHongduo Liu, Peiyu Liao, Mengchuan Zou, Bowen Pang, Xijun Li, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu 0001. 1-6 [doi]
• †You Li, Guannan Zhao, Yunqi He, Hai Zhou 0001. 1-6 [doi]
• Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCsHalima Bouzidi, Mohanad Odema, Hamza Ouarnoughi, Smaïl Niar, Mohammad Abdullah Al Faruque. 1-6 [doi]
• Lightning Talk: Efficient Embedded Machine Learning Deployment on Edge and IoT DevicesSudeep Pasricha. 1-2 [doi]
• Holistic WCRT Analysis for Global Fixed-Priority Preemptive Multiprocessor SchedulingGuoqi Xie, Chenglai Xiong, Wei Wu, Renfa Li, Wanli Chang 0001. 1-6 [doi]
• Equality Saturation for Datapath Synthesis: A Pathway to Pareto OptimalityEcenur Ustun, Cunxi Yu, Zhiru Zhang. 1-2 [doi]
• DBPS: Dynamic Block Size and Precision Scaling for Efficient DNN Training Supported by RISC-V ISA ExtensionsSeunghyun Lee, Jeik Choi, Seock-Hwan Noh, Jahyun Koo 0002, Jaeha Kung. 1-6 [doi]
• FIONA: Fine-grained Incoherent Optical DNN Accelerator Search for Superior Efficiency and RobustnessMengquan Li, Kenli Li 0001, Mingfeng Lan, Jie Xiong, Zhuo Tang, Weichen Liu. 1-6 [doi]
• ChaosINTC: A Secure Interrupt Management Mechanism against Interrupt-based Attacks on TEEYifan Zhu, Peinan Li, Lutan Zhao, Dan Meng, Rui Hou 0001. 1-6 [doi]
• R-TOSS: A Framework for Real-Time Object Detection using Semi-Structured PruningAbhishek Balasubramaniam, Febin Sunny, Sudeep Pasricha. 1-6 [doi]
• Accelerating Sparse LU Factorization with Density-Aware Adaptive Matrix Multiplication for Circuit SimulationTengcheng Wang, Wenhao Li, Haojie Pei, Yuying Sun, Zhou Jin 0001, Weifeng Liu 0002. 1-6 [doi]
• BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory-ComputingChi-Tse Huang, Cheng-Yang Chang, Yu-Chuan Chuang, An-Yeu Andy Wu. 1-6 [doi]
• CSQ: Growing Mixed-Precision Quantization Scheme with Bi-level Continuous SparsificationLirui Xiao, Huanrui Yang, Zhen Dong, Kurt Keutzer, Li Du, Shanghang Zhang. 1-6 [doi]
• Pathfinding Model and Lagrangian-Based Global RoutingPengju Yao, Ping Zhang, Wenxing Zhu. 1-6 [doi]
• A Convolution Neural Network Accelerator Design with Weight Mapping and Pipeline OptimizationLixia Han, Peng Huang 0004, Zheng Zhou, Yiyang Chen, Xiaoyan Liu, JinFeng Kang. 1-6 [doi]
• PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the EdgeVikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst. 1-6 [doi]
• Neuromorphic Swarm on RRAM Compute-in-Memory Processor for Solving QUBO ProblemAshwin Sanjay Lele, Muya Chang, Samuel D. Spetalnick, Brian Crafton, Arijit Raychowdhury, Yan Fang. 1-6 [doi]
• WinoTrain: Winograd-Aware Training for Accurate Full 8-bit Convolution AccelerationPierpaolo Morì, Shambhavi Balamuthu Sampath, Lukas Frickenstein, Manoj Rohit Vemparala, Nael Fasfous, Alexander Frickenstein, Walter Stechele, Claudio Passerone. 1-6 [doi]
• Sparse Hamming Graph: A Customizable Network-on-Chip TopologyPatrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer 0001, Luca Benini, Torsten Hoefler. 1-6 [doi]
• 2: In-Memory Acceleration for Genome Graphs AnalysisYu Huang 0013, Long Zheng 0003, Haifeng Liu 0003, Zhuoran Zhou, Dan Chen, Pengcheng Yao, Qinggang Wang, Xiaofei Liao, Hai Jin 0001. 1-6 [doi]
• Fine-Grained QoS Control via Tightly-Coupled Bandwidth Monitoring and Regulation for FPGA-based Heterogeneous SoCsGianluca Brilli, Giacomo Valente, Alessandro Capotondi, Paolo Burgio, T. Di Masciov, Paolo Valente, Andrea Marongiu. 1-6 [doi]
• Accelerating DNN Inference with Heterogeneous Multi-DPU EnginesZelin Du, Wei Zhang 0173, Zimeng Zhou, Zili Shao, Lei Ju. 1-6 [doi]
• Hybrid Gate-Pulse Model for Variational Quantum AlgorithmsZhiding Liang, Zhixin Song, Jinglei Cheng, Zichang He, Ji Liu 0007, Hanrui Wang 0002, Ruiyang Qin, Yiru Wang, Song Han 0003, Xuehai Qian, Yiyu Shi 0001. 1-6 [doi]
• Range-Invariant Approximation of Non-Linear Operations for Efficient BERT Fine-TuningJanghyeon Kim, Janghwan Lee, Jungwook Choi, Jeongho Han, Sangheon Lee. 1-6 [doi]
• Automatic End-to-End Joint Optimization for Kernel Compilation on DSPsXiaolei Zhao, Zhaoyun Chen, Yang Shi, Mei Wen, Chunyun Zhang. 1-6 [doi]
• Lightning Talk: Trinity - Assured Neuro-symbolic Model Inspired by Hierarchical Predictive CodingSusmit Jha. 1-2 [doi]
• A Memory-Efficient Edge Inference Accelerator with XOR-based Model CompressionHyunseung Lee, Jihoon Hong, Soosung Kim 0001, Seung Yul Lee, Jae W. Lee. 1-6 [doi]
• Intermittent-Aware Neural Network PruningChih-Chia Lin, Chia-Yin Liu, Chih-Hsuan Yen, Tei-Wei Kuo, Pi-Cheng Hsiu. 1-6 [doi]
• Lift: Exploiting Hybrid Stacked Memory for Energy-Efficient Processing of Graph Convolutional NetworksJiaxian Chen, Zhaoyu Zhong, Kaoyi Sun, Chenlin Ma, Rui Mao 0001, Yi Wang 0003. 1-6 [doi]
• Bumblebee: A MemCache Design for Die-stacked and Off-chip Heterogeneous Memory SystemsYifan Hua, Shengan Zheng, Ji-yin, Weidong Chen, Linpeng Huang. 1-6 [doi]
• Primer: Fast Private Transformer Inference on Encrypted DataMengxin Zheng, Qian Lou, Lei Jiang 0001. 1-6 [doi]
• Processor Vulnerability DiscoveryYongqiang Lyu, Rihui Sun, Gang Qu 0001. 1-3 [doi]
• A Matching Based Escape Routing Algorithm with Variable Design Rules and ConstraintsQinghai Liu, Disi Lin, Chuandong Chen, Huan He, Jianli Chen, Yao-Wen Chang. 1-6 [doi]
• DistHD: A Learner-Aware Dynamic Encoding Method for Hyperdimensional ClassificationJunyao Wang, Sitao Huang, Mohsen Imani. 1-6 [doi]
• Processing-In-Hierarchical-Memory Architecture for Billion-Scale Approximate Nearest Neighbor SearchZhenhua Zhu, Jun Liu, Guohao Dai, Shulin Zeng, Bing Li, Huazhong Yang, Yu Wang. 1-6 [doi]
• Lightning Talk: Power and Performance Reconciliation - from Tradeoff to Win-WinJiang Hu. 1-2 [doi]
• DiffPattern: Layout Pattern Generation via Discrete DiffusionZixiao Wang, Yunheng Shen, Wenqian Zhao, Yang Bai, Guojin Chen, Farzan Farnia, Bei Yu 0001. 1-6 [doi]
• In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention TimeInhwan Lee, Eunhwan Kim, Nameun Kang, Hyunmyung Oh, Jae-Joon Kim. 1-6 [doi]
• Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity BenefitsPruek Vanna-Iampikul, Lingjun Zhu, Serhat Erdogan, Mohanalingam Kathaperumal, Ravi Agarwal, Ram Gupta, Kevin Rinebold, Sung Kyu Lim. 1-6 [doi]
• ADAPTIVE: Agent-Based Learning for Bounding Time in Mixed-Criticality SystemsBehnaz Ranjbar, Ali Hosseinghorban, Akash Kumar 0001. 1-6 [doi]
• Rubick: A Synthesis Framework for Spatial Architectures via Dataflow DecompositionZizhang Luo, Liqiang Lu, Size Zheng 0001, Jieming Yin, Jason Cong, Jianwei Yin, Yun Liang 0001. 1-6 [doi]
• Comprehensive Integration of Hyperdimensional Computing with Deep Learning towards Neuro-Symbolic AIHyunsei Lee, Jiseung Kim 0005, Hanning Chen, Ariela Zeira, Narayan Srinivasa, Mohsen Imani, Yeseong Kim. 1-6 [doi]
• Optimizing the Performance of NDP Operations by Retrieving File Semantics in StorageLin Li, Xianzhang Chen, Jiali Li, Jiapin Wang, Duo Liu, Yujuan Tan, Ao Ren. 1-6 [doi]
• RESPECT: Reinforcement Learning based Edge Scheduling on Pipelined Coral Edge TPUsJiaqi Yin, Yingjie Li, Daniel Robinson, Cunxi Yu. 1-6 [doi]
• Late Breaking Results From Hybrid Design Automation for Field-coupled NanotechnologiesSimon Hofmann, Marcel Walter, Lorenzo Servadei, Robert Wille. 1-2 [doi]
• Robust Tickets Can Transfer Better: Drawing More Transferable Subnetworks in Transfer LearningYonggan Fu, Ye Yuan, Shang Wu, Jiayi Yuan, Yingyan Celine Lin. 1-6 [doi]
• Orchestrating Measurement-Based Quantum Computation over Photonic Quantum ProcessorsYingheng Li, Aditya Pawar, Mohadeseh Azari, Yanan Guo, Youtao Zhang, Jun Yang 0002, Kaushik Parasuram Seshadreesan, Xulong Tang. 1-6 [doi]
• ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis TuningAnimesh Basak Chowdhury, Lilas Alrahis, Luca Collini, Johann Knechtel, Ramesh Karri, Siddharth Garg, Ozgur Sinanoglu, Benjamin Tan 0001. 1-6 [doi]
• A Universal Method for Task Allocation on FP-FPS Multiprocessor Systems with Spin LocksShuai Zhao 0004, Nan Chen, Yinjie Fang, Zhao Li, Wanli Chang 0001. 1-6 [doi]
• Chiplets: How Small is too Small?Alexander Graening, Saptadeep Pal, Puneet Gupta 0001. 1-6 [doi]
• Don't-Care Aware ESOP Extraction via Reduced Decomposition-Tree ExplorationChun-Yu Wei, Jie-Hong R. Jiang. 1-6 [doi]
• A Comprehensive Automated Exploration Framework for Systolic Array DesignsSuhail Basalama, Jie Wang 0022, Jason Cong. 1-6 [doi]
• Learning-based Data Separation for Write Amplification Reduction in Solid State DrivesPenghao Sun, Litong You, Shengan Zheng, Wanru Zhang, Ruoyan Ma, Jie Yang, Guanzhong Wang, Feng Zhu, Shu Li, Linpeng Huang. 1-6 [doi]
• Instant-NeRF: Instant On-Device Neural Radiance Field Training via Algorithm-Accelerator Co-Designed Near-Memory ProcessingYang Katie Zhao, Shang Wu, Jingqun Zhang, Sixu Li, Chaojian Li, Yingyan Celine Lin. 1-6 [doi]
• LRSDP: Low-Rank SDP for Triple Patterning Lithography Layout DecompositionYu Zhang, Yifan Chen, Zhonglin Xie, Hong Xu, Zaiwen Wen, Yibo Lin, Bei Yu 0001. 1-6 [doi]
• AVX Timing Side-Channel Attacks against Address Space Layout RandomizationHyunwoo Choi, Suryeon Kim, Seungwon Shin. 1-6 [doi]
• Orchestrated Scheduling and Partitioning for Improved Address Translation in GPUsBingyao Li, Yueqi Wang, Xulong Tang. 1-6 [doi]
• Emerging Hardware Technologies and 3D System Integration for Ubiquitous Machine IntelligenceHaitong Li. 1-2 [doi]
• DRPTM: A Decoupled Read-efficient High-scalable Persistent Transactional MemoryWenkai Liang, Hao Hu, Xiangyu Zou, Wen Xia, Yanqi Pan. 1-6 [doi]
• AccALS: Accelerating Approximate Logic Synthesis by Selection of Multiple Local Approximate ChangesXuan Wang, Sijun Tao, Jingjing Zhu, Yiyu Shi, Weikang Qian. 1-6 [doi]
• Partition Based Differential Testing for Finding Embedded Code Generation Bugs in SimulinkHe Jiang 0001, Hongyi Cheng, Shikai Guo, Xiaochen Li. 1-6 [doi]
• Late Breaking Results: Analytical Placement for 3D ICs with Multiple Manufacturing TechnologiesYan-Jen Chen, Yan-Syuan Chen, Wei-Che Tseng, Cheng-Yu Chiang, Yu-Hsiang Lo, Yao-Wen Chang. 1-2 [doi]
• AutoDCIM: An Automated Digital CIM CompilerJia Chen, Fengbin Tu, Kunming Shao, Fengshi Tian, Xiao Huo, Chi-Ying Tsui, Kwang-Ting Cheng. 1-6 [doi]
• Heterogeneous Reconfigurable Accelerators: Trends and PerspectivesWayne Luk. 1-2 [doi]
• Late Breaking Results: Fast Fair Medical Applications? Hybrid Vision Models Achieve the Fairness on the EdgeChangdi Yang, Yi-sheng, Peiyan Dong, Zhenglun Kong, Yanyu Li, Pinrui Yu, Lei Yang, Xue Lin. 1-2 [doi]
• Reaction Time Analysis of Event-Triggered Processing Chains with Data RefreshingYue Tang 0001, Nan Guan, Xu Jiang 0004, Zheng Dong 0002, Wang Yi 0001. 1-6 [doi]
• SEO: Safety-Aware Energy Optimization Framework for Multi-Sensor Neural Controllers at the EdgeMohanad Odema, James Ferlez, Yasser Shoukry, Mohammad Abdullah Al Faruque. 1-6 [doi]
• Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean NetworksNan Wu, Yingjie Li, Cong Hao, Steve Dai, Cunxi Yu, Yuan Xie 0001. 1-6 [doi]
• Invited: Building Robust Quantum System Software for Technology-Specific CharacteristicsTirthak Patel, Devesh Tiwari. 1-4 [doi]
• APPEND: Rethinking ASIP Synthesis in the Era of AICangyuan Li, Ying Wang 0001, Huawei Li 0001, Yinhe Han 0001. 1-6 [doi]
• Fair Will Go On: A Collaboration-Aware Fairness Scheme for NVMe SSD in Cloud Storage SystemYang Zhou, Fang Wang 0001, Zhan Shi 0001, Dan Feng 0001, Yu Du. 1-6 [doi]
• COSA:Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion MethodologiesZhican Wang, Gang Wang, Honglan Jiang, Ningyi Xu, Guanghui He. 1-6 [doi]