Herman Schmit - researchr alias

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Viewing Publication 1 - 56 from 56

2023

Improving Standard-Cell Design Flow using Factored Form OptimizationAlessandro Tempia Calvino, Alan Mishchenko, Herman Schmit, Ethan Mahintorabi, Giovanni De Micheli, Xiaoqing Xu. dac 2023: 1-6 [doi]

2022

Direct Spatial Implementation of Sparse Matrix Multipliers for Reservoir ComputingMatthew Denton, Herman Schmit. hpca 2022: 1-11 [doi]

Multi-input Serial Adders for FPGA-like Computational FabricHerman Schmit, Matthew Denton. fpga 2022: 35-41 [doi]

2019

Spatial Timing Analysis With Exact Propagation of Delay and Application to FPGA PerformanceDavid M. Lewis, Herman Schmit. tcad, 38(11):2153-2166, 2019. [doi]

2017

2016

Stratix™ 10 High Performance Routable Clock NetworksCarl Ebeling, Dana How, David Lewis, Herman Schmit. fpga 2016: 64-73 [doi]

Dissecting Xeon + FPGA: Why the integration of CPUs and FPGAs makes a power difference for the datacenter: Invited PaperHerman Schmit, Randy Huang. islped 2016: 152-153 [doi]

2008

Placement challenges for structured ASICsHerman Schmit, Amit Gupta, Radu Ciobanu. ispd 2008: 84-86 [doi]

2005

Layout techniques for FPGA switch blocksHerman Schmit, Vikas Chandra. tvlsi, 13(1):96-105, 2005. [doi]

2004

A power aware system level interconnect design methodology for latency-insensitive systemsVikas Chandra, Herman Schmit, Anthony Xu, Lawrence T. Pileggi. iccad 2004: 275-282 [doi]

A low power approach to system level pipelined interconnect designVikas Chandra, Anthony Xu, Herman Schmit. slip 2004: 45-52 [doi]

An Interconnect Channel Design Methodology for High Performance Integrated CircuitsVikas Chandra, Anthony Xu, Herman Schmit, Lawrence T. Pileggi. date 2004: 1138-1143 [doi]

Creating a power-aware structured ASICR. Reed Taylor, Herman Schmit. islped 2004: 74-77 [doi]

Enabling energy efficiency in via-patterned gate array devicesR. Reed Taylor, Herman Schmit. dac 2004: 874-878 [doi]

Evaluating Alternative Implementations for LDPC Decoder Check Node FunctionTheo Theocharides, Greg M. Link, Eric J. Swankoski, Narayanan Vijaykrishnan, Mary Jane Irwin, Herman Schmit. isvlsi 2004: 77-82 [doi]

2003

Asynchronous PipeRench: Architecture and Performance EstimationsHiroto Kagotani, Herman Schmit. fccm 2003: 121 [doi]

Heterogeneous Logic Block Architectures for Via-Patterned Programmable FabricsAneesh Koorapaty, Lawrence T. Pileggi, Herman Schmit. fpl 2003: 426-436 [doi]

Heterogeneous Programmable Logic Block ArchitecturesAneesh Koorapaty, Vikas Chandra, K. Y. Tong, Chetan Patel, Lawrence T. Pileggi, Herman Schmit. date 2003: 11118-11119 [doi]

CAD Tool Support For A Multi-University Soc Certificate Program: The Digital SandboxThomas Kroll, Herman Schmit, Dave Landis. mse 2003: 47-48 [doi]

Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable ExecutableBenjamin A. Levine, Herman Schmit. fccm 2003: 101-110 [doi]

Floorplanning of pipelined array modules using sequence pairsMatthew Moe, Herman Schmit. ispd 2003: 143-150 [doi]

An architectural exploration of via patterned gate arraysChetan Patel, Anthony Cozzie, Herman Schmit, Lawrence T. Pileggi. ispd 2003: 184-189 [doi]

Exploring regular fabrics to optimize the performance-cost trade-offLawrence T. Pileggi, Herman Schmit, Andrzej J. Strojwas, Padmini Gopalakrishnan, V. Kheterpal, Aneesh Koorapaty, Chetan Patel, V. Rovner, K. Y. Tong. dac 2003: 782-787 [doi]

The Sandbox Design Experience CourseHerman Schmit, Thomas Kroll, Max Khusid, Ivan S. Kourtev, Narayanan Vijaykrishnan, David L. Landis. mse 2003: 39-40 [doi]

Extra-dimensional Island-Style FPGAsHerman Schmit. fpl 2003: 406-415 [doi]

Regular logic fabrics for a via patterned gate array (VPGA)K. Y. Tong, V. Kheterpal, Vyacheslav Rovner, Lawrence T. Pileggi, Herman Schmit. cicc 2003: 53-56 [doi]

2002

Simultaneous Optimization of Driving Buffer and Routing Switch Sizes in an FPGA using an Iso-Area ApproachVikas Chandra, Herman Schmit. isvlsi 2002: 35-40 [doi]

Morphable MultipliersSilviu M. S. A. Chiricescu, Michael A. Schuette, Robin Glinton, Herman Schmit. fpl 2002: 647-656 [doi]

Synthesis of Morphable MultipliersSilviu M. S. A. Chiricescu, Michael A. Schuette, Herman Schmit, Robin Glinton. iwls 2002: 109-113

Queue Machines: Hardware Compilation in HardwareHerman Schmit, Benjamin A. Levine, Benjamin Ylvisaker. fccm 2002: 152 [doi]

PipeRench: A virtualized programmable datapath in 0.18 micron technologyHerman Schmit, David Whelihan, Andrew Tsai, Matthew Moe, Benjamin A. Levine, R. Reed Taylor. cicc 2002: 63-66 [doi]

FPGA switch block layout and evaluationHerman Schmit, Vikas Chandra. fpga 2002: 11-18 [doi]

Memory optimization in single chip network switch fabricsDavid Whelihan, Herman Schmit. dac 2002: 530-535 [doi]

2001

SoC Design Skills: Collaboration Builds a Stronger SoC Design TeamPradeep K. Khosla, Herman Schmit, Mary Jane Irwin, Narayanan Vijaykrishnan, Tom Cain, Steven P. Levitan, Dave Landis. mse 2001: 42-43 [doi]

2000

PipeRench implementation of the instruction path coprocessorYuan C. Chou, Pazhani Pillai, Herman Schmit, John Paul Shen. euromicro 2000: 147-158 [doi]

PipeRench: A Reconfigurable Architecture and CompilerSeth Copen Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matthew Moe, R. Reed Taylor. Computer, 33(4):70-77, 2000.

Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable HardwareBenjamin A. Levine, R. Reed Taylor, Herman Schmit. fccm 2000: 217-226 [doi]

Scalable interconnect and power distribution for island-style FPGAs (poster abstract)Herman Schmit, David Whelihan, Peter Kamarchik, Frank Gennari. fpga 2000: 221 [doi]

Pipeline Reconfigurable FPGAsHerman Schmit, Srihari Cadambi, Matthew Moe, Seth Copen Goldstein. vlsisp, 24(2-3):129-146, 2000. [doi]

The John Henry Syndrome (panel session)(abstract only): humans vs. machines as FPGA designersHerman Schmit, Ray Andraka, Philip Friedin, Satnam Singh, Tim Southgate. fpga 2000: 101 [doi]

1999

1998

1997

Incremental reconfiguration for pipelined applicationsHerman Schmit. fccm 1997: 47-55 [doi]

Is Reconfigurable Computing Commercially Viable (panel)?Herman Schmit. fpga 1997: 101 [doi]

Synthesis of application-specific memory designsHerman Schmit, Donald E. Thomas. tvlsi, 5(1):101-111, 1997. [doi]

1995

Array mapping in behavioral synthesisHerman Schmit, Donald E. Thomas. isss 1995: 90-95 [doi]

Hidden Markov modeling and fuzzy controllers in FPGAsHerman Schmit, Donald E. Thomas. fccm 1995: 214-221 [doi]

Address generation for memories containing multiple arraysHerman Schmit, Donald E. Thomas. iccad 1995: 510-514 [doi]

1993

A Model and Methodology for Hardware-Software CodesignDonald E. Thomas, Jay K. Adams, Herman Schmit. dt, 10(3):6-15, 1993. [doi]

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Publications by 'Herman Schmit'

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1995

1993

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