Table of Contents

• ChaoSen: Security Enhancement of Image Sensor through in-Sensor Chaotic ComputingNedasadat Taheri, Sepehr Tabrizchi, Shaahin Angizi, Arman Roohi. 1-8 [doi]
• Memristive Logic-in-Memory Implementation with Area Efficiency and ParallelismIkkyum Kim, Heechun Park. 9-15 [doi]
• S3M: Static Semi-Segmented Multipliers for Energy-Efficient DNN Inference AcceleratorsMingtao Zhang, Quan Cheng, Hiromitsu Awano, Longyang Lin, Masanori Hashimoto. 16-23 [doi]
• Optimizing Quantum Circuit Synthesis with Dominator AnalysisGiacomo Lancellotti, Giovanni Agosta, Alessandro Barenghi, Gerardo Pelosi. 24-27 [doi]
• MemSort: In-Memory Sorting ArchitectureRui Liu, Xiaoyu Zhang, Xinyu Wang, Feng Min, Zhejian Luo, Xiaoming Chen, Yinhe Han 0001, Minghua Tang. 28-35 [doi]
• MuSA: Multi-Sketch Accelerator with Hybrid Parallelism and Coalesced Memory OrganizationSunan Zou, Bizhao Shi, Ziyun Zhang, Guojie Luo. 36-43 [doi]
• CoPIM: A Collaborative Scheduling Framework for Commodity Processing-in-memory SystemsShunchen Shi, Xueqi Li 0001, Zhaowu Pan, Peiheng Zhang, Ninghui Sun. 44-51 [doi]
• ChameSC: Virtualizing Superscalar Core of a SIMD Architecture for Vector Memory AccessZhongzhu Pu, Guangda Zhang, Tiejian Zhang, Chen Zhang, Youhui Zhang, Xia Zhao. 52-59 [doi]
• Multi: Reduce Energy Overhead of Criticality-Aware Dynamic Instruction Scheduling for Energy EfficiencyHonglan Zhan, Chenxi Wang, Xin Wang, Chun Yang, Xianhua Liu 0001, Xu Cheng 0001. 60-67 [doi]
• T-BUS: Taming Bipartite Unstructured Sparsity for Energy-Efficient DNN AccelerationNing Yang, Fangxin Liu, Zongwu Wang, Zhiyan Song, Tao Yang, Li Jiang 0002. 68-75 [doi]
• PS4: A Low Power SNN Accelerator with Spike Speculative SchemeZongwu Wang, Fangxin Liu, Xin Tang, Li Jiang 0002. 76-83 [doi]
• PCCL: Energy-Efficient LLM Training with Power-Aware Collective CommunicationZiyang Jia, Laxmi N. Bhuyan, Daniel Wong 0001. 84-91 [doi]
• Ensuring the Accuracy of CNN Accelerators Supplied at Ultra-Low VoltageYamilka Toca-Díaz, Ruben Gran Tejero, Alejandro Valero. 92-95 [doi]
• A Semi Black-Box Adversarial Bit- Flip Attack with Limited DNN Model InformationBehnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Lesley Shannon, Steve Wilton. 96-104 [doi]
• Blink: Breaking Parallel Implementation of Crystals-Kyber with Side-Channel AttackJian Wang, Weiqiong Cao, Hua Chen, Haoyuan Li. 105-113 [doi]
• Hound: Locating Cryptographic Primitives in Desynchronized Side-Channel Traces using Deep-LearningDavide Galli, Giuseppe Chiari, Davide Zoni. 114-121 [doi]
• Interpretable Risk-aware Access Control for Spark: Blocking Attack Purpose Behind ActionsWenbo Wang, Tao Xue, Shuailou Li, Zhaoyang Wang, Boyang Zhang, Yu Wen. 122-129 [doi]
• TDM: Time and Distance Metric for Quantifying Information Leakage Vulnerabilities in SoCsAvinash Ayalasomayajula, Henian Li, Hasan Al Shaikh, Sujan Kumar Saha, Farimah Farahmandi. 130-133 [doi]
• Transformer-Characterized Approach for Chip Floorplanning: Leveraging HyperGCN and DTQNWenbo Guan, XiaoYan Tang, Hongliang Lu, Jingru Tan, JinLong Wang, YuMing Zhang. 134-143 [doi]
• Elastic EDA: Auto-Scaling Cloud Resources for EDA Tasks via Learning-based ApproachesLinyu Zhu, Xingyu Ma, Shaogang Hao, Yushan Pan, Xinfei Guo. 144-153 [doi]
• RNC: Efficient RRAM-aware NAS and Compilation for DNNs on Resource-Constrained Edge DevicesKam Chi Loong, Shihao Han, Sishuo Liu, Ning Lin, Zhongrui Wang. 154-161 [doi]
• AutoVCoder: A Systematic Framework for Automated Verilog Code Generation using LLMsMingzhe Gao, Jieru Zhao, Zhe Lin 0007, Wenchao Ding, Xiaofeng Hou, Yu Feng 0007, Chao Li 0009, Minyi Guo. 162-169 [doi]
• Reinforcement Learning-Driven Co-Scheduling and Diverse Resource Assignments on NUMA SystemsUrvij Saroliya, Eishi Arima, Dai Liu, Martin Schulz 0001. 170-178 [doi]
• Rethinking High-Level Synthesis Design Space Exploration from a Contrastive PerspectiveHuiliang Hong, Chenglong Xiao, Shanshan Wang. 179-182 [doi]
• ParaCkpt: Heterogeneous Multi-Path Checkpointing Mechanism for Training Deep Learning ModelsShucheng Wang, Qiang Cao 0001, Kaiye Zhou, Jun Xu, Zhandong Guo, Jiannan Guo 0001. 183-190 [doi]
• RTDeepEnsemble: Real-Time DNN Ensemble Method for Machine Perception SystemsZitong Bo, Chaoping Guo, Chang Leng, Ying Qiao, Hongan Wang. 191-198 [doi]
• Interference-Aware DNN Serving on Heterogeneous Processors in Edge SystemsYeonjae Kim, Igjae Kim, Kwanghoon Choi, Jeongseob Ahn, Jongse Park, Jaehyuk Huh 0001. 199-206 [doi]
• HOLES: Boosting Large Language Models Efficiency with Hardware-Friendly Lossless EncodingFangxin Liu, Ning Yang, Zhiyan Song, Zongwu Wang, Li Jiang 0002. 207-214 [doi]
• OLSATM: Online Learning Based State-Aware Task Migration on S-NUCA Many-CoresYanDong He, Guangda Zhang, Yongjun Zhang, Hengzhu Liu, Renzhi Chen. 215-218 [doi]
• Co-Designing a 3D Transformation Accelerator for Versal-Based Image RegistrationPaolo Salvatore Galfano, Giuseppe Sorrentino, Eleonora D'Arnese, Davide Conficconi. 219-222 [doi]
• Read-Optimized Persistent Hash Index for Query Acceleration through Fingerprint Filtering and Lock-Free PrefetchingRenzhi Xiao, Dan Feng 0001, Yuchong Hu, Hong Jiang, Lin Wang, Yucheng Zhang, Lanlan Cui, Guanglei Xu, Fang Wang. 223-230 [doi]
• Optimizing Structural Modification Operation for B+-Tree on Byte-Addressable DevicesDingze Hong, Jinlei Hu, Jianxi Chen, Dan Feng 0001, Jian Liu. 231-238 [doi]
• FastMatch: Enhancing Data Pipeline Efficiency for Accelerated Distributed TrainingJianchang Su, Masoud Rahimi Jafari, Yifan Zhang, Wei Zhang. 239-246 [doi]
• Multi-Stage Dynamic Cuckoo FiltersJun Su, Yinjin Fu, Nong Xiao. 247-255 [doi]
• Persistent Spiral StorageWenyu Peng, Tao Xie, Paul H. Siegel. 256-259 [doi]
• Advanced Dynamic Scalarisation for RISC-V GPGPUsMatthew Naylor, Alexandre Joannou, A. Theodore Markettos, Paul Metzger, Simon W. Moore, Timothy M. Jones 0001. 260-267 [doi]
• Extending RISC-V for Efficient Overflow Recovery in Mixed-Precision ComputationsLuca Bertaccini, Siyuan Shen, Torsten Hoefler, Luca Benini. 268-275 [doi]
• Ventus: A High-performance Open-source GPGPU Based on RISC-V and Its Vector ExtensionJingzhou Li, Kexiang Yang, Chufeng Jin, Xudong Liu, Zexia Yang, Fangfei Yu, Yujie Shi, Mingyuan Ma, Li Kong, Jing Zhou, Hualin Wu, Hu He 0001. 276-279 [doi]
• HeroSDK: Streamlining Heterogeneous RISC-V Accelerated Computing from Embedded to High-Performance SystemsCyril Koenig, Björn Forsberg, Luca Benini. 280-287 [doi]
• vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-Criticality SystemsEnrico Zelioli, Alessandro Ottaviano, Robert Balas, Nils Wistoff, Angelo Garofalo, Luca Benini. 288-291 [doi]
• PCC: An End-to-End Compilation Framework for Neural Networks on Photonic-Electronic AcceleratorsBohan Hu, Yinyi Liu, Zhenguo Liu, Wei Zhang, Jiang Xu. 292-299 [doi]
• Tango: Low Latency Multi-DNN Inference on Heterogeneous Edge PlatformsZain Taufique, Aman Vyas, Antonio Miele, Pasi Liljeberg, Anil Kanduri. 300-307 [doi]
• Private Tensor Freezing for an Efficient Federated Learning with Homomorphic EncryptionValentino Peluso, Erich Malan, Andrea Calimera, Enrico Macii. 308-315 [doi]
• Pseudo-Sim: An Accurate Analytical Modeling Framework for Systolic Array ArchitecturesDan Sturm, Sajjad Moazeni. 316-319 [doi]
• Fine-Grained Shared Cache Interference Analysis Using Basic Block's Execution TimeYixuan Zhu, Wenqi Lou, Yinkang Gao, Binze Jiang, Xiaohang Gong, Xi Li. 320-323 [doi]
• SchInFS: A File System Integrating Functions of the Block I/O Scheduler for ZNS SSDsJintong Zhang, Haichuan Hu, Jianxi Chen, Yekang Zhan. 324-331 [doi]
• GCC: Optimizing Space Efficiency and Read Latency of SSDs with Workload-Aware Garbage Collection Aided CompressionLinhui Liu, Yunfei Gu, Chenhao Zhu, Chentao Wu, Jie Li 0002, Minyi Guo. 332-339 [doi]
• LBZ: A Lightweight Block Device for Supporting F2FS on ZNS SSDYongpeng Yang, Dejun Jiang, Bo Jiang, Hao-Chiang Hsu, Liang Peng, Zifeng Yang. 340-347 [doi]
• RAID45: Hybrid Parity-Based RAID for Reducing Parity Write Wear on High-Density SSDsJialin Liu, Yujiong Liang, Yunpeng Song, Liang Shi. 348-355 [doi]
• SmartNetSSD: Exploiting Path Resources for Read Performance Improvement in Network-Based SSDsJinhua Cui 0001, Feiyu Chen, Lu Li, Shiqiang Nie, Laurence T. Yang. 356-359 [doi]
• SuperMap: High-Performance and Flexible Memory-Mapped IO for Fast Storage DeviceWenqing Jia, Dejun Jiang 0001, Jin Xiong. 360-363 [doi]
• Safe Speculation for CheriFranz A. Fuchs, Jonathan Woodruff, Peter Rugg, Alexandre Joannou, Jessica Clarke 0001, John Baldwin, Brooks Davis, Peter G. Neumann, Robert N. M. Watson, Simon W. Moore. 364-372 [doi]
• APE-FV: Concolic Testing for RTL Functional Verification Using Adaptive Path ExplorationZiyue Zheng, Xiangchen Meng, Yangdi Lyu. 373-380 [doi]
• HAp-FT: A Hybrid Approximate Fault Tolerance Framework for DNN AcceleratorXiaohui Wei 0002, Chenyang Wang, Zeyu Guan, Fengyi Li, Hengshan Yue. 381-388 [doi]
• LLM - TG: Towards Automated Test Case Generation for Processors Using Large Language ModelsYifei Deng, Renzhi Chen, Chao Xiao, Zhijie Yang, Yuanfeng Luo, Jingyue Zhao, Na Li, Zhong Wan, Yongbao Ai, Huadong Dai, Lei Wang. 389-396 [doi]
• NexusCIM: High-Throughput Multi-CIM Array Architecture with C-Mesh NoC and Hub CoresHyunmin Kim, Sungju Ryu. 401-408 [doi]
• Dual-Axis ECC: Vertical and Horizontal Error Correction for Storage and Transfer ErrorsGiyong Jung, Hee Ju Na, Sang-Hyo Kim, Jungrae Kim. 409-417 [doi]
• VarVE: Bringing SIMD Performance to Variable-Width ValuesChen Zou 0001, Andrew A. Chien. 418-425 [doi]
• Ninja: A Hardware Assisted System for Accelerating Nested Address TranslationLongyu Zhao, Zongwu Wang, Fangxin Liu, Li Jiang 0002. 426-433 [doi]
• HEncode: A Highly Modularized and Efficient FPGA QC-LDPC Encoder using High Level SynthesisJiawei Yang, Shaohua Wang, Xiangrui Yang, Yifan Zhang, Qiang Cao, Jie Yao, Xiaodi Tan, Xiao Lin. 434-437 [doi]
• Efficient Microprocessor Design Space Exploration via Space PartitioningZijun Jiang, Yangdi Lyu. 438-441 [doi]
• SATL: A Spatial Architecture Rapid Prototyping Framework for Irregular Applications AccelerationFrancesco Peverelli, Alessandro Verosimile, Davide Conficconi, Andrea Damiani, Marco D. Santambrogio. 442-445 [doi]
• VDMig: An Adaptive Virtual Disk Migration Scheme for Cloud Block Storage SystemGuangjie Xing, Shuheng Gao, Hua Wang 0008, Ke Zhou 0001, Yaodong Han, Mengling Tao. 446-453 [doi]
• Hermes: Memory-Efficient Pipeline Inference for Large Models on Edge DevicesXueyuan Han, Zinuo Cai, Yichu Zhang, Chongxin Fan, Junhan Liu, Ruhui Ma, Rajkumar Buyya. 454-461 [doi]
• Opportunistic Migration for Hybrid Memories While Mitigating Aging EffectsN. S. Aswathy, Hemangee K. Kapoor. 462-469 [doi]
• HPA: A Hybrid Data Flow for PIM ArchitecturesSheng Ma, Yunping Zhao, Yuhua Tang, Yi Dai. 470-478 [doi]
• LCKV: Learner-Cleaner Optimized Adaptive Key-Value Separated LSM-Tree StoreMingxuan Liu, Jianhua Gu, Tianhai Zhao. 479-482 [doi]
• LVLDPC: Intra-Layer Variation Aware LDPC Coding for 3D TLC NAND Flash MemoryLanlan Cui, Meng Zhang, Fei Wu 0005. 483-486 [doi]
• UniCoMo: A Unified Learning-Based Cost Model for Tensorized Program TuningZihan Wang, Lei Gong, Wenqi Lou, Qianyu Cheng, Xianglan Chen, Chao Wang, Xuehai Zhou. 487-495 [doi]
• SHEEO: Continuous Energy Efficiency Optimization in Autonomous Embedded SystemsXinkai Wang 0003, Chao Li, Lingyu Sun, Qizheng Lyu, Xiaofeng Hou, Jingwen Leng, Minyi Guo. 496-503 [doi]
• AutoSparse: A Source-to-Source Format and Schedule Auto- Tuning Framework for Sparse Tensor ProgramXiangjun Qu, Lei Gong, Wenqi Lou, Qianyu Cheng, Xianglan Chen, Chao Wang, Xuehai Zhou. 504-512 [doi]
• MIST: Efficient Mixed-Precision Preconditioning Through Iterative Sparse- Triangular Solver DesignHaoyuan Zhang, Yidong Chen, Wenpeng Ma, Wu Yuan 0002, Jian Zhang, Zhonghua Lu. 513-516 [doi]
• Deep Recommender Models Inference: Automatic Asymmetric Data Flow OptimizationGiuseppe Ruggeri, Renzo Andri, Daniele Jahier Pagliari, Lukas Cavigelli. 517-520 [doi]
• MOTPE/D: Hardware and Algorithm Co-design for Reconfigurable Neuromorphic ProcessorYuan Li, Renzhi Chen, Zhijie Yang, Xun Xiao, Jingyue Zhao, Zhenhua Zhu, Huadong Dai, Yuhua Tang, Weixia Xu, Li Luo, Lei Wang. 521-524 [doi]
• Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy ExplorationYuhong Song, Edwin Hsing-Mean Sha, Longshan Xu, Qingfeng Zhuge, Zili Shao. 525-533 [doi]
• A Joint Optimization of Buffer and Splitter Insertion for Phase-Skipping Adiabatic Quantum - Flux - Parametron CircuitsRobert S. Aviles, Peter A. Beerel. 534-541 [doi]
• A Quantum Method to Match Vector Boolean Functions using Simon's SolverMarco Venere, Alessandro Barenghi, Gerardo Pelosi. 542-549 [doi]
• MOSQ: Accelerating Classical Simulation of UCCSD Ansatz Circuits using Merged OperationSeungwoo Choi, Enhyeok Jang, Youngmin Kim, Won Woo Ro. 550-557 [doi]
• AceMiner: Accelerating Graph Pattern Matching using PIM with Optimized Cache SystemLiang Yan, Xiaoyang Lu, Xiaoming Chen, Sheng Xu, Xingqi Zou, Yinhe Han 0001, Xian-He Sun. 558-565 [doi]
• Hardware Cache Locking for All Memory UpdatesAshkan Asgharzadeh, Eduardo José Gómez-Hernández, Juan M. Cebrian, Stefanos Kaxiras, Alberto Ros 0001. 566-574 [doi]
• CacheTrimmer: Adaptive Cache File Trimming for Optimized Performance and Lifetime on Mobile DevicesYi Zhang, Yunpeng Song, Wentong Li, Yiyang Huang, Dingcui Yu, Mengyang Ma, Liang Shi. 575-582 [doi]
• CCacheSim: A Circuit-Architecture Cross-Level Simulation Framework for SRAM-Based in-Cache Computing System EvaluationBaiqing Zhong, Mingyu Wang, Yicong Zhang, Xiaojie Li, Zhiyi Yu. 583-590 [doi]
• VEGA: Implementing a Versatile and Efficient Deep Learning Processor with Graph-Based ALUWenqiang Wang, Yuzhou Chen, Guanting Huo, Guanghui He, Ningyi Xu. 591-598 [doi]
• FloatMax: An Efficient Accelerator for Transformer-Based Models Exploiting Tensor-Wise Adaptive Floating-Point QuantizationSeoho Chung, Kwangrae Kim, Soomin Rho, Chanhoon Kim, Ki-Seok Chung. 599-607 [doi]
• EN-T: Optimizing Tensor Computing Engines Performance via Encoder-Based MethodologyQizhe Wu, Yuchen Gui, Zhichen Zeng, Xiaotian Wang, Huawen Liang, Xi Jin 0002. 608-615 [doi]
• SLIDE-x-ML: System-Level Infrastructure for Dataset E-xtraction and Machine Learning Framework for High-Level Synthesis EstimationsVittoriano Muttillo, Vincenzo Stoico, Marco Santic, Giacomo Valente, Luigi Pomante, Daniele Frigioni. 616-619 [doi]
• Early: An Importance-Aware Early Firing and Exit for SNN AccelerationXuan Zhang, Zhuoran Song, Peng Zhou, Xing Li, Xueyuan Liu, Xiaolong Lin, Zhezhi He, Li Jiang 0002, Naifeng Jing, Xiaoyao Liang. 624-627 [doi]
• Vision Transformer Inference on a CNN AcceleratorChangjae Yi, Hyunsu Moh, Soonhoi Ha. 628-636 [doi]
• WOLT: Transparent Deployment of ML Workloads on Lightweight Many-Accelerator ArchitecturesKuan-Lin Chiu, Guy Eichler, Chuan-Tung Lin, Giuseppe Di Guglielmo, Luca P. Carloni. 637-644 [doi]
• AirGun: Adaptive Granularity Quantization for Accelerating Large Language ModelsSungbin Kim, Hyunwuk Lee, Sungwoo Kim 0003, Cheolhwan Kim, Won Woo Ro. 645-652 [doi]
• TileMap: Mapping Multi-Head Attention on Spatial Accelerators with Tile-based AnalysisFuyu Wang, Minghua Shen. 653-660 [doi]
• ISVDA: An in Storage Processing Accelerator for Visual Data AnalysisZhenhua Zhao, Zhaoyan Shen, Xiaojun Cai. 661-664 [doi]
• Simultaneous Conjugate Gradient and iAFF-UNet for Accurate IR Drop CalculationHe Liu, Yipei Xu, Simin Tao, Zhipeng Huang 0009, Biwei Xie, Xingquan Li, Wei Gao. 665-672 [doi]
• Global and Local Attention-Based Inception U-Net for Static IR Drop PredictionYilu Chen, Zhijie Cai, Min Wei, Zhifeng Lin, Jianli Chen. 673-680 [doi]
• A Prototype-Based Framework to Design Scalable Heterogeneous SoCs with Fine-Grained DFSGabriele Montanaro, Andrea Galimberti, Davide Zoni. 681-684 [doi]
• A Methodology for Fast and Efficient ML-Based Power ModelingCaaliph Andriamisaina, Kods Trabelsi, Pierre-Guillaume Le Guay. 685-688 [doi]
• Tutorial: Evolutionary Design Methods in Electronic Design AutomationLukás Sekanina. 689-690 [doi]
• Multi-Model Inference Composition of Hyperdimensional Computing EnsemblesFlavio Ponzina, Rishikanth Chandrasekaran, Anya Wang, Seiji Minowada, Siddharth Sharma, Tajana Rosing. 691-698 [doi]
• Integrating Branching and Pruning for Efficient Hyperdimensional ComputingJing Liu, Zhiqian Guan, Di Liu, Shengfa Miao, Fei Dai 0002. 699-706 [doi]
• Efficient Forward-Only Training for Brain-Inspired Hyperdimensional ComputingHyunsei Lee, Jiseung Kim 0005, Seohyun Kim, Hyukjun Kwon, Mohsen Imani, Ilhong Suh, Yeseong Kim. 707-714 [doi]