Table of Contents

• Nail: Not Another Fault-Injection Framework for Chisel-generated RTLRobin Sehm, Christian Ewert, Rainer Buchty, Mladen Berekovic, Saleh Mulhem. 1-7 [doi]
• A Structured Approach to Verification of Digital Hardware in ScalaTjark Petersen, Luca Pezzarossa, Martin Schoeberl. 8-15 [doi]
• Modeling and Scheduling of Composable Instruction SetYu Yang, Paul Delestrac, Ahmed Hemani. 16-23 [doi]
• Unraveling Parallelism in Automated Workload Modeling for Distributed Cyber-Physical SystemsFaezeh Sadat Saadatmand, Todor P. Stefanov, Andy D. Pimentel, Benny Akesson, Ignacio Gonález Alonso. 24-33 [doi]
• On-Hardware Resilience Analysis of DPUAccelerated CNNs on FPGA-Based SystemsFederico Buccellato, Corrado De Sio, Sarah Azimi, Luca Sterpone. 34-41 [doi]
• In-Context Learning for Microcontroller Performance Screening Using Tabular Foundation ModelsNicolò Bellarmino, Riccardo Cantoro, Martin Huch, Tobias Kilian, Giovanni Squillero. 42-49 [doi]
• Synthesis for Testability: Polynomial Test Pattern Generation for KFDD CircuitsMartha Schnieber, Rolf Drechsler. 50-57 [doi]
• Design-Space Exploration of Serialized Floating-Point Division for DLP ArchitecturesLouis Ledoux. 58-65 [doi]
• Towards a Safe End-to-End AI framework: MISRA C-Compliant YOLO for Object DetectionJavier Fernández 0004, Irune Agirre, Irune Yarza, Jon Pérez-Cerrolaza. 66-72 [doi]
• A streaming algorithm and hardware accelerator for top-K flow detection in network trafficCarolina Gallardo-Pavesi, Yaime Fernández, Javier E. Soto, Cecilia Hernández, Miguel E. Figueroa. 73-80 [doi]
• VPSA: A Vectored Processing Element configured Systolic Array Architecture GeneratorKanish R, Komaragiri Sai Vishwanath Rohit, Yash Sengupta, Madhav Rao. 81-87 [doi]
• Hardware-aware Decision Tree Ensembles for Radar Data Processing on the Edge with Online LearningRodrigo Olmos, Pedro Lobo, Andrés Otero, Sergio Hernandez, Eduardo Casanueva. 88-96 [doi]
• Auto-repair without test cases: How LLMs fix compilation errors in large industrial embedded codeHan Fu, Sigrid Eldh, Kristian Wiklund, Andreas Ermedahl, Philipp Haller, Cyrille Artho. 97-105 [doi]
• Dynamic Multi-Accelerator Management for Deep Learning Applications on the FPGA EdgeHsin-Yu Ting, Sing-Yao Wu, Leming Cheng, Eli Bozorgzadeh. 106-113 [doi]
• DistriMuSe - Distributed Multi-Sensor Systems for Human Safety and HealthJohan Plomp, Fokke van Meulen, Juan José López Escobar, Eli De Poorter, Jeroen Hoebeke, Geert Vanstraelen, Michael Rölleke, Roberta Presta, Raúl Santos de La Cámara, Luca Davoli, Jaromír Hubálek. 114-121 [doi]
• Distributed AI Systems at Scale: Reflections from DAISAnders Lindgren. 122-129 [doi]
• CAPE - European Open Compute Architecture for Powerful EdgeMartin Kaiser, Lennart Tigges, Jens Hagemeyer, Christian Klarhorst, Björn Voß, Fred Buining, Bola Fakhoury, János Lazányi, René Griessl, Muhammad Shahzad, Yiannis Georgiou, Salim Mimouni, Pedro Velho, Michael Mercier, Eva Trungel, Julian Gajewski, Stefan Krupop, Michavor Dem Berge, Deepak M. Mathew, Skipis Dimitrios, Arnidis Iordanis, Orestis Vantzos, David Georgantas, Gautier Rouaze, Christoph Bühler, Guido Salvaneschi, Brandon Lewis, Angela Hauber. 130-137 [doi]
• Software Techniques for Soft Error Resilience: the ASTRAEUS projectFederico Reghenzani, Davide Baroffio, Emilio Corigliano, William Fornaciari, Giancarlo Storti Gajani, Paolo Maffezzoni, Antonino Catanese, Alessandro Balossino, Marco Giuliani. 138-144 [doi]
• AIDA4Edge: Twinning for Excellence in Adaptive Edge Artificial IntelligenceMarko S. Andjelkovic, Rizwan Tariq Syed, Alessandro Veronesi, Fabian Vargas 0001, Markus Ulbricht 0002, Leticia Bolzani Poehls, Milos Krstic, Davide Bertozzi, Edward G. Jones, Oliver Rhodes, Riccardo Zese, Michele Favalli, Alice Bizzarri, Evelina Lamma, Marco Gavanelli, Elena Bellodi, Zoran Peric, Jelena Nikolic, Milan Dincic, Aleksandra Jovanovic 0001, Dejan Ciric, Nikola Vucic, Sofija Peric, Jelena Jovanovic 0006, Milica Stojanovic, Tatjana Nikolic, Goran Nikolic, Jelena Nedeljkovic, Danijel Dankovic, Emilija Zivanovic, Milos Marjanovic, Sandra Veljkovic, Nikola Mitrovic, Bratislav Predic, Tamara Milovanovic. 145-152 [doi]
• NET4EXA: Pioneering the Future of Interconnects for Supercomputing and AIMichele Martinelli, Roberto Ammendola, Andrea Biagioni, Carlotta Chiarini, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Elena Pastorelli, Pierpaolo Perticaroli, Luca Pontisso, Cristian Rossi, Francesco Simula, Piero Vicini, David Colin, Grégoire Pichon, Alexandre Louvet, John Gliksberg, Claire Chen, Matteo Turisini, Andrea Monterubbiano, Jean-Philippe Nominé, Denis Dutoit, Hugo Taboada, Lilia Zaourar, Mohamed Benazouz, Angelos Bilas, Fabien Chaix, Manolis Katevenis, Nikolaos Chrysos, Evangelos Mageiropoulos, Christos Kozanitis, Thomas Moen, Steffen Persvold, Einar Rustad, Sandro Fiore, Fabrizio Granelli, Simone Pezzuto, Raffaello Potestio, Luca Tubiana, Philippe Velha, Flavio Vella, Daniele De Sensi, Salvatore Pontarelli. 153-159 [doi]
• Building a Side-Channel Attack Scheme on SipHash FPGA ImplementationVít Masek, Vojtech Miskovský, Matús Oleksák. 160-164 [doi]
• Artificial Intelligence Enables Increased Data Rate of True Random Number GeneratorEberhard Böhl, Günter Heglmeier. 165-173 [doi]
• AEGIS+AES folded architecture for FPGAJoãao Carlos Resende, Ricardo Chaves. 174-182 [doi]
• Side-channel analysis of Chacha20 implemented in softwareLukás Danêk, Vojtech Miskovský, Matús Oleksfák. 183-190 [doi]
• An FPGA Architecture for Authentication and Key Agreement Protocol for 5G NetworksMarios Papadopoulos, Kostas Lampropoulos 0001, Paris Kitsos. 191-197 [doi]
• Algebraic Cryptanalysis of Small-Scale Variants of the Bluetooth Stream Cipher E0Jan Dolejs, Martin Jurecek, Róbert Lórencz. 198-205 [doi]
• PREEMPT-K8S: Pod Prioritization for Mixed-Criticality Edge-Cloud ServicesStefano Toscano, Luigi De Simone, Marco Barletta, Marcello Cinque. 206-213 [doi]
• Designing Energy-Efficient Approximate Circuits for the FPGA TechnologyMario Barbareschi, Salvatore Barone, Nicola Mazzocca, Alberto Moriconi. 214-223 [doi]
• Impact of Contention-Aware Placement in Heterogeneous Edge DevicesJeremy Giesen, Ibai Irigoyen, Enrico Mezzetti, Jaume Abella 0001, Francisco J. Cazorla. 224-233 [doi]
• D-AWSIM: Distributed Autonomous Driving Simulator for Dynamic Map Generation FrameworkShunsuke Ito, Chaoran Zhao, Ryo Okamura, Takuya Azumi. 234-241 [doi]
• Non-Functional Properties in HPC Systems: Design Exploration of Energy, Power, and ReliabilityGiovanni Agosta, Enrico Bini, Davide Baroffio, Carlo Brandolese, Michele Castrovilli, Daniele Cattaneo 0002, Daniele Cesarini, William Fornaciari, Andrea Galimberti, Alberto Garfagnini, Arsenii Gavrikov, Francesco Iannone, Marco Lapegna, Tomas Antonio Lopez, Gabriele Magnani, Gabriele Mencagli, Cecilia Metra, Martin Eugenio Omana, Filippo Palombi, Federico Reghenzani, Josie E. Rodriguez Condia, A. Serafini, Matteo Sonza Reorda, Davide Zoni, Giuseppe Zummo. 242-251 [doi]
• RISC++: Towards an HLS Defined RISC-V SoCGuilherme Vareiro De Oliveira, Vinicius Pirassoli, Luís Miguel Sousa, Nuno Paulino 0001. 252-259 [doi]
• Evict+Spec+Time on RISC-V: Gem5-Based Implementation and Microarchitectural AnalysisMahreen Khan, Maria Mushtaq, Renaud Pacalet, Ludovic Apvrille. 260-267 [doi]
• Eliminating Write-After-Write Hazards to Improve Performance in Embedded ProcessorsCôme Allart, Junheng Zheng, Jean-Roch Coulon, André Sintzoff, Olivier Potin, Jean-Baptiste Rigaud. 268-275 [doi]
• FetchFlare: An Open-Source Strided Data Prefetcher for High-Performance Cache HierarchiesGolnaz Korkian, Neiel Leyva, Arnau Bigas, Noelia Oliete-Escuín, Abbas Haghi, Alireza Monemi, César Fuguet, Lluc Alvarez. 276-284 [doi]
• Efficient POSIT Multiplier with Multi-flag Priority Encoding and Multistage Booth ProcessingM. Arun, Madhav Rao. 285-291 [doi]
• You Shall Not Stall: Achieving RISC-V On-Demand Runtime-Reconfiguration using SCAIE-VTobias Scheipel, Maximilian Ogris, Marcel Baunach. 292-299 [doi]
• Towards an Energy-Efficient RISC-V Core Architecture with Dynamic Dual-Issue and Clock GatingAhmad Othman, Hueseyin Ege Pamuk, Ahmed Kamaleldin, Diana Göhringer. 300-307 [doi]
• Efficient Parallel Rotation of Hyperspectral Images on FPGA-Accelerated PlatformsCarlos E. Hernández, Jesús Barba, José L. Mira, Julián Caba, Fernando Rincón, Juan Carlos López 0001. 308-315 [doi]
• Development and Validation of a Low-Cost LEDbased Multispectral Imaging SystemAlvaro Falcon, Carlos Vega, Gustavo M. Callicó. 316-323 [doi]
• SAFEXPLAIN: a Complete Approach Towards Trustworthy AI-Based Safety-Critical SystemsJaume Abella 0001, Irune Agirre, Thanh Hai Bui, Frank Geujen, Gabriele Giordana, Carlo Donzella, Francisco J. Cazorla, Enrico Mezzetti, Axel Brando, Javier Fernández 0004, Irune Yarza, Joanes Plazaola, Robert Lowe, Maria Ulan, Rob Lavreysen, Lucas Tosi, Ilaria Bloise, Lorenzo Feruglio, Ilaria Cinelli, Stefano Lodico, William Guarienti, Giuseppe Nicosia, Valeria Dallara. 324-331 [doi]
• The Story of NextPerception - A survey of the project vision and realisation with examplesJohan Plomp, Michael Rölleke, Laura Belli, Felipe J. Gil-Castiñeira, Raúl Santos de La Cámara, Roberta Presta, Greet Bilsen, Fokke van Meulen, Luca Davoli, Jaromír Hubálek. 332-341 [doi]
• Enabling Smart Urban Mobility with Edge AILuigi Gallo, Andrea Tuscano, Paolo Giuseppetti, Pietro Amato, Alessandro Solinas, Federico Saluz, Andrea Tessieri, Mario Pedol, Manuel Pernigotto, Massimo Fioravanti, Giovanni Agosta, William Fornaciari, Paolo Maffezzoni, Fabio Salice, Irene Amerini, Francesco Pro, Paolo Satta, Giovanni Trovini. 342-349 [doi]
• ShapeFuture - Technical Progress After Year 1Norbert Druml, Martin Gschwandtner, Mayeul Jeannin, Rainer Matischek, Edgars Lielamurs, Maksis Celitans, Kaspars Ozols, Nurullah Demiralay, Besir Tayfur, Ismail Sinan Gulbas, Nadir Kucuk, Isa Kiyat, Yahya Nasolo, Jens Brandt, Noah Christoph Pütz, Thomas Bartz-Beielstein, Jose Isola, Nikola Mandic, Francesca Flamigni, Alexander Kuehhas, Gianluca Brilli, Paolo Burgio, Giacomo Paolieri, Jorge Villagra, Álvaro Flores Cueto, José Antonio Sánchez, Jacopo Sini, Massimo Violante, Lorenzo Giraudi, Paolo Santero, Uwe Kölbel, Moritz Schaffenroth, Panu Sjövall, Jarno Vanne, Morten Larsen, Nergis Gizem Yilmaz, Ziya Uygar Yengin, George Dimitrakopoulos 0001. 350-359 [doi]
• Towards RISC-V-based HPC: The Italian Pathfinding Activities in the DARE-SGA1 ProjectGiovanni Agosta, Marco Aldinucci, Andrea Bartolini, Laura Bellentani, Andrea Biagioni, Daniele Cesarini, Carlotta Chiarini, Iacopo Colonnelli, Pietro Delugas, Lev Denisov, Ottorino Frezza, Marco Grangetto, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Andrea Maslov, Mauro Olivieri, Pierpaolo Perticaroli, Luca Pontisso, Cristian Rossi, Davide Rossi 0001, Sergio Saponara, Antonio Sciarappa, Francesco Simula, Matteo Sonza Reorda, Massimo Torquati, Piero Vicini. 360-367 [doi]
• Portable Simulation Models for Energy Aspects of IoT Devices in the LoLiPoP-IoT ProjectJakub Lojda, Daire Joyce, Pavel Smrz, Shruti Kathuria, Josef Strnadel, Caitlin Quinn, Václav Simek, Patrik Staron. 368-375 [doi]
• Glitch Happens: Attacking the AMD-Xilinx PLL with a Clock Glitch GeneratorLukas Leuenberger, Roman Willi, Dorian Amiet, Paul Zbinden. 376-384 [doi]
• Pulsed ElectroMagnetic Fault Injection Attack on a Time Measurement-based Arbiter-PUFAzzadine Thajte, Sami El Amraoui, Paolo Maistri, Régis Leveugle, Giorgio Di Natale, Laurent Fesquet. 385-393 [doi]
• High-Performance Pipelined NTT Accelerators with Homogeneous Digit-Serial Modulo ArithmeticGeorge Alexakis, Dimitrios Schoinianakis, Giorgos Dimitrakopoulos. 394-401 [doi]
• Lightweight Performance Monitoring of Real-Time Applications in RISC-V PlatformsNuno Soares, Tiago Carvalho 0001, Luís Miguel Pinho. 402-409 [doi]
• Smart Sensing of Multi-bit Resistive Memory using a Single ReferenceJohn Reuben, Dietmar Fey. 410-417 [doi]
• Towards optimal reconfigurable constant multipliersBastien Barbe, Xiao Peng, Anastasia Volkova, Florent de Dinechin. 418-425 [doi]
• Execution Platform ContractsDorian Bourgeoisat, Ulrich Kühne, Florian Brandner. 426-434 [doi]
• FLAMA: Architecting Floating-Point Atomic Memory Operations for Heterogeneous HPC SystemsVíctor Soria Pardos, Adrià Armejach, Darío Suárez Gracia, Didier Martinot, Arnaud Grasset, Miquel Moretó. 435-442 [doi]
• LiteInjector: A LiteX Extension for Fault InjectionAdam Henault, Philippe Tanguy, Vianney Lapôtre. 443-451 [doi]
• Leveraging Design Static Analysis for Vertical Reuse in Functional VerificationPetr Bardonek, Marcela Zachariásová. 452-459 [doi]
• Analysis of Modern Memory Management Unit Functioning for Critical SystemsAlfonso Mascareñas González, Youcef Bouchebaba. 460-467 [doi]
• PhysioEdge: Multimodal Compressive Sensing Platform for Wearable Health MonitoringRens Baeyens, Dennis Laurijssen, Jan Steckel, Walter Daems. 468-474 [doi]
• ST-HAR: A Single Stretchable Sensor Dataset for Human Activity RecognitionGiuseppe Longo, Andrea Fasolino, Rosalba Liguori, Luigi Di Benedetto, Gian Domenico Licciardo, Alfredo Rubino. 475-479 [doi]
• Musculoskeletal Model Analysis for Underwater Assist Suit for Elbow JointChiharu Ishii, Naoki Tachibana, Nozomi Yamamoto. 480-485 [doi]
• Federated Learning for Obstacle Detection to Assist the Visually-Impaired Using Augmented RealityFatemeh Akbarian, Robbe Vlaeminck, Joran Verheijen, Amin Aminifar, Amir Aminifar. 486-490 [doi]
• A Multi-Channel Threshold-Based Seizure Detection Algorithm for Low-Complexity Hardware ImplementationAndrea Vittimberga, Giovanni Nicolini, Giuseppe Scotti. 491-496 [doi]
• Alleviating Attack Data Scarcity: SCANIA's Experience Towards Enhancing In-Vehicle Cyber Security MeasuresFrida Sundfeldt, Bianca Widstam, Mahshid Helali Moghadam, Kuo-Yun Liang, Anders Vesterberg. 497-506 [doi]
• Adversarial Analysis and Supervisory Control of Sensor NetworksDamas P. Gruska. 507-514 [doi]
• Hybrid Quantum-secure Group-based Communication with PQC and QKDJohanna Sepúlveda, Dominik Marchsreiter, Filippo Maria Cardano. 515-522 [doi]
• Cati - An Open-Source Framework to Evaluate Attacks on Cameras for Autonomous VehiclesMichael Kühr, Maximilian Mittmann, Mohammad Hamad, Sebastian Steinhorst. 523-530 [doi]
• A Comprehensive Synthesis and Verification Approach for RRAM-Based Neuromorphic ComputingFatemeh Shirinzadeh, Abhoy Kole, Kamalika Datta, Saeideh Shirinzadeh, Rolf Drechsler. 531-538 [doi]
• Hardware-Aware Feature Extraction Quantisation for Real-Time Visual Odometry on FPGA PlatformsMateusz Wasala, Mateusz Smolarczyk, Michal Danilowicz, Tomasz Kryjak. 539-548 [doi]
• SoC-SLAM: FPGA-Based Hardware/Software Co-Design for Real-Time Visual SLAM Front-End and Back-End AccelerationBhavay Arora, Paul Gottschaldt, Ariel Podlubne, Sergio A. Pertuz 0001, Diana Goehringer. 549-557 [doi]
• Enabling Time-Aware Priority Traffic Management over Distributed FPGA NodesAlberto Scionti, Paolo Savio, Francesco Lubrano, Federico Stirano, Antonino Nespola, Olivier Terzo, Corrado De Sio, Luca Sterpone. 558-565 [doi]
• Hardware-Level Adaptive Scheduling for Reconfigurable Accelerators on Virtualized FPGAsLu Jiang, Zuwen Ou, Diana Göhringer. 566-573 [doi]
• Medical Data Over Sound for Vital Signs MonitoringRadovan Stojanovic, Jovan Durkovic. 574-577 [doi]
• Fit4MedRob: A Next-Generation Platform for Intelligent Robotic RehabilitationBruna Maria Vittoria Guerra, Roberto Soldi, Lorenzo Vecchi, Stefania Sozzi, Leo Russo, Micaela Schmid, Stefano Ramat. 578-585 [doi]
• The CAPSARII Approach to Cyber-Secure Wearable, Ultra-Low-Power Networked Sensors for Soldier Health MonitoringLuciano Bozzi, Christian Celidonio, Umberto Nuzzi, Massimo Biagini, Stefano Cherubin, Asbjørn Djupdal, Tor A. Haugdahl, Andrea Aliverti, Alessandra Angelucci, Giovanni Agosta, Gerardo Pelosi, Paolo Belluco, Samuele Polistina, Riccardo Volpi, Luigi Malagò, Michael Schneider, Florian Wieczorek, Xabier Eguiluz. 586-591 [doi]
• LLM4CVE: Enabling Iterative Automated Vulnerability Repair with Large Language ModelsMohamad Fakih, Rahul Dharmaji, Halima Bouzidi, Gustavo Quiros Araya, Oluwatosin Ogundare, Mst-Ayesha Siddika, Mohammad Abdullah Al Faruque. 592-599 [doi]
• Automatic Polynomial Formal Verification of a Floating-Point MultiplierJan Kleinekathöfer, Rolf Drechsler. 600-607 [doi]
• Optimizing HQC using Frobenius Additive FFT on a RISC-V-based System-on-ChipAntonio Ras, Antoine Loiseau, Mikaël Carmona, Simon Pontié, Guénaël Renault, Benjamin Smith 0003, Emanuele Valea. 608-615 [doi]
• FPGA-Accelerated Early-Exit Neural Decoder for Quantum Error CorrectionRan Huo, Jose Nunez-Yanez. 616-624 [doi]
• Circadia: Checkpointing for Intermittent Computing in AI Driven ApplicationsMatthieu Rodet, Jean-Luc Béchennec, Mikaël Briday, Sébastien Faucou, Isabelle Puaut, Erven Rohou. 625-634 [doi]
• TraceFormer: A Transformer-Based Method for Weight Extraction from AIMC TilesRoozbeh Siyadatzadeh, Fatemeh Mehrafrooz, Nele Mentens, Todor P. Stefanov. 635-642 [doi]
• RL-ALMS: Reinforcement Learning-based Adaptive and Lightweight Model Selection Framework for Energy-Efficient Lane Detection in Electric VehiclesRhuthik P, Deepak Gangadharan. 643-652 [doi]
• DSEParted: Co-Optimization of Embedded NPU Architectures and Neural Network PartitioningPatrick Schmidt 0003, Fabian Krey, Alexey Serdyuk, Matthias Stammler, Tanja Harbaum, Jürgen Becker 0001. 653-660 [doi]