Erwin Janssen - researchr alias

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Viewing Publication 1 - 10 from 10

2017

A 14-Bit 30-MS/s 38-mW SAR ADC Using Noise Filter Gear ShiftingMartin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann. tcas, 64-II(2):116-120, 2017. [doi]

2015

15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOSMartin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann. isscc 2015: 1-3 [doi]

A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOSMartin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann. jssc, 50(12):2891-2900, 2015. [doi]

2013

2011

A 480mW 2.6GS/s 10b 65nm CMOS time-interleaved ADC with 48.5dB SNDR up to NyquistKonstantinos Doris, Erwin Janssen, Claudio Nani, Athon Zanikopoulos, Gerard Van der Weide. isscc 2011: 180-182 [doi]

A 480 mW 2.6 GS/s 10b Time-Interleaved ADC With 48.5 dB SNDR up to Nyquist in 65 nm CMOSKostas Doris, Erwin Janssen, Claudio Nani, Athon Zanikopoulos, Gerard Van der Weide. jssc, 46(12):2821-2833, 2011. [doi]

2005

Description of limit cycles in sigma-delta modulatorsDerk Reefman, Joshua D. Reiss, Erwin Janssen, Mark B. Sandler. tcas, 52-I(6):1211-1223, 2005. [doi]

2004

Lossless compression of one-bit audioErwin Janssen, Eric Knapen, Derk Reefman, Fons Bruekers. icassp 2004: 1020-1023 [doi]

2003

Super-audio CD: an introductionErwin Janssen, Derk Reefman. spm, 20(4):83-90, 2003. [doi]

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