Table of Contents

• Presentation "Automotive electronics and energy efficiency"Reinhard Ploss. 1-2 [doi]
• FinFETs - Technology and circuit design challengesWitold P. Maszara, M.-R. Lin. 3-8 [doi]
• MEMS for automotive and consumer electronicsStefan Finkbeiner. 9-14 [doi]
• Cyborg insects, neural dust and other things: Building interfaces between the synthetic and the multicellularTimothy J. Blanche, Joshua Paul van Kleef, Peter Ledochowitsch, Travis L. Massey, Rikky Muller, D. J. Seo, Michel M. Maharbiz. 15 [doi]
• Nanometer-scale InGaAs Field-Effect Transistors for THz and CMOS technologiesJesús A. del Alamo. 16-21 [doi]
• Compressive sensing: Principles and hardware implementationsEmmanuel J. Candès, Stephen Becker. 22-23 [doi]
• Digitally assisted data converter designBoris Murmann. 24-31 [doi]
• Scaling analog circuitsPeter R. Kinget, Jayanth Kuppambatti, Baradwaj Vigraham, Chun-Wei Hsu. 32 [doi]
• Design trade-offs in signal component separators for outphasing power amplifiersZhipeng Li, Yan Li 0029, Yehuda Avniel, Alexandre Megretski, Vladimir Stojanovic. 33-36 [doi]
• 2 1.8V-3.3V stress tolerant I/O buffer in 28nm CMOSVinod Kumar, Mohd. Rizvi. 37-40 [doi]
• All-digital process-variation-calibrated timing generator for ATE with 1.95-ps resolution and a maximum 1.2-GHz test rateKyungho Ryu, Dong-Hoon Jung, Seong-Ook Jung. 41-44 [doi]
• A supply-noise-rejection technique in ADPLL with noise-cancelling current sourceYusuke Niki, Daisuke Miyashita, Hiroyuki Kobayashi, Shouhei Kousai. 45-48 [doi]
• Wideband 2-16GHz local oscillator generation for short-range radar applicationsMichele Caruso, Matteo Bassi, Andrea Bevilacqua, Andrea Neviani. 49-52 [doi]
• A 3.4mW 2.3-to-2.7GHz frequency synthesizer in 0.18-µm CMOSChih-Hsiang Chang, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng, Nai-Chen Cheng 0001. 53-56 [doi]
• A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoCEdith Beigné, Ivan Miro Panades, Yvain Thonnart, Laurent Alacoque, Pascal Vivet, Suzanne Lesecq, Diego Puschini, Farhat Thabet, Benoît Tain, K. Benchehida, Sylvain Engels, Robin Wilson, Didier Fuin. 57-60 [doi]
• MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warpingMichael Schaffner, Pierre Greisen, Simon Heinzle, Frank K. Gürkaynak, Hubert Kaeslin, Aljoscha Smolic. 61-64 [doi]
• A flexible, clockless digital filterChristos Vezyrtzis, Weiwei Jiang 0002, Steven M. Nowick, Yannis P. Tsividis. 65-68 [doi]
• A 19-dBm, 15-Gbaud, 9-bit SOI CMOS power-DAC cell for high-order QAM W-band transmittersStefan Shopov, Andreea Balteanu, Sorin P. Voinigescu. 69-72 [doi]
• A 48 GHz 6-bit LO-path phase shifter in 40-nm CMOS for 60 GHz applicationsChuang Lu, Marion K. Matters-Kammerer, Reza Mahmoudi, Peter G. M. Baltus, Ernst Habekotté, Koen van Hartingsveldt, Floris van der Wilt. 73-76 [doi]
• A 142GHz fully integrated wireless chip to chip communication system for high data rate operationSamuel Foulon, Sébastien Pruvost, Denis Pache, Christophe Loyez, Nathalie Rolland. 77-80 [doi]
• A 0.32 THz FMCW radar system based on low-cost lens-integrated SiGe HBT front-endsKonstantin Statnikov, Erik Öjefors, Janusz Grzyb, Pascal Chevalier 0002, Ullrich R. Pfeiffer. 81-84 [doi]
• A four-channel, ±36 V, 780 kHz piezo driver chip for structural health monitoringYang Guo, Christopher Aquino, David Zhang, Boris Murmann. 85-88 [doi]
• An integrated 80-V class-D power output stage with 94% efficiency in a 0.14µm SOI BCD processHaifeng Ma, Ronan A. R. van der Zee, Bram Nauta. 89-92 [doi]
• A 443-µA 37.8-nV/√Hz CMOS multi-stage bandgap voltage referenceWeixun Yan, Thomas Christen. 93-96 [doi]
• A 0.25-mm CMOS, 7-ppm/°C, 8-mA quiescent current, ±5-mA output current low-dropout voltage regulatorFabrizio Conso, Gabriele Rescio, Marco Grassi, C. Ribellino, G. Billè, A. Rizzo, S. Petenyi, S. Privitera, Piero Malcovati. 97-100 [doi]
• A 40 nm LP CMOS self-biased continuous-time comparator with sub-100ps delay at 1.1V & 1.2mWVladimir M. Milovanovic, Horst Zimmermann. 101-104 [doi]
• On-chip temperature compensation of driver voltage for LC-displaysRolf Becker, Aleksandar Zhelyazkov, Bernie Kim. 105-108 [doi]
• A 12b 50MS/s 2.1mW SAR ADC with redundancy and digital background calibrationAlbert H. Chang, Hae-Seung Lee, Duane S. Boning. 109-112 [doi]
• A low power zero-crossing pipeline-SAR ADC with on-chip dynamically loaded pre-charged referenceJayanth Kuppambatti, Peter R. Kinget. 113-116 [doi]
• An 8-bit 450-MS/s single-bit/cycle SAR ADC in 65-nm CMOSVaibhav Tripathi, Boris Murmann. 117-120 [doi]
• An 11b 1GS/s ADC with parallel sampling architecture to enhance SNDR for multi-carrier signalsYu Lin, Kostas Doris, Erwin Janssen, Athon Zanikopoulos, Alessandro Murroni, Gerard Van der Weide, Hans Hegt, Arthur H. M. van Roermund. 121-124 [doi]
• A 9b 2GS/s 45mW 2X-interleaved ADCJorge Pernillo, Michael P. Flynn. 125-128 [doi]
• A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOSFrancesco Radice, Melchiorre Bruccoleri, Marcello Ganzerli, Giorgio Spelgatti, Davide Sanzogni, Massimo Pozzoni, Andrea Mazzanti. 129-132 [doi]
• A 78 pW 1 b/s 2.4 GHz radio transmitter for near-zero-power sensing applicationsPatrick P. Mercier, Saurav Bandyopadhyay, Andrew C. Lysaght, Konstantina M. Stankovic, Anantha P. Chandrakasan. 133-136 [doi]
• A 0.13µm CMOS integrated wireless power receiver for biomedical applicationsMeysam Zargham, P. Glenn Gulak. 137-140 [doi]
• 85 dB dynamic range 1.2 mW 156 kS/s biopotential recording IC for high-density ECoG flexible active electrode arraySohmyung Ha, Jongkil Park, Yu M. Chi, Jonathan Viventi, John A. Rogers, Gert Cauwenberghs. 141-144 [doi]
• A 14 µA ECG processor with robust heart rate monitor for a wearable healthcare systemShintaro Izumi, Ken Yamashita, Masanao Nakano, Toshihiro Konishi, Hiroshi Kawaguchi, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori, Hiroshi Nakajima, Toshikazu Shiga, Masahiko Yoshimoto. 145-148 [doi]
• A DC-connectable multi-channel biomedical data acquisition ASIC with mains frequency cancellationPhilipp Schönle, Felix Schulthess, Schekeb Fateh, Roger Ulrich, Fiona Huang, Thomas Burger, Qiuting Huang. 149-152 [doi]
• 94.6% peak efficiency DCM buck converter with fast adaptive dead-time controlSujan K. Manohar, Poras T. Balsara. 153-156 [doi]
• Switching-based charger with continuously built-in resistor detector (CBIRD) and analog multiplication-division unit (AMDU) for fast charging in Li-Ion batteryRuei-Hong Peng, Tsu-Wei Tsai, Ke-Horng Chen, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin-Yu Luo, Shih-Ming Wang, Long-Der Chen, Cheng-Chen Yang, Jui-Lung Chen. 157-160 [doi]
• An integrated ultracapacitor fast mains charger with combined power/current optimisationRares Bodnar, William Redman-White. 161-164 [doi]
• A monolithic stacked Class-D approach for high voltage DC-AC conversion in standard CMOSPiet Callemeyn, Michiel Steyaert. 165-168 [doi]
• A 0.18-µm CMOS, -92-dB THD, 105-dBA DR, third-order audio class-D amplifierDavide Cartasegna, Piero Malcovati, Lorenzo Crespi, Andrea Baschirotto. 169-172 [doi]
• Dual-band RF receiver for GPS and compass systems in 55-nm CMOSSongting Li, Jiancheng Li, Xiaochen Gu, Hongyi Wang, Jianfei Wu, Dun Yan, Zhaowen Zhuang. 173-176 [doi]
• A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperationsNan Qi, Baoyong Chi, Yang Xu 0039, Zhou Chen, Yang Xu 0005, Jun Xie, Zheng Song 0002, Zhihua Wang 0001. 177-180 [doi]
• A 0.9GHz-5.8GHz SDR receiver front-end with transformer-based current-gain boosting and 81-dB 3rd-order-harmonic rejection ratioAlan W. L. Ng, S. Y. Zheng, H. Leung, Y. Chao, Howard C. Luong. 181-184 [doi]
• An RF receiver with an integrated adaptive notch filter for multi-standard applicationsAshkan Borna, Chris Hull 0001, Yanjie Wang, Hua Wang 0006, Ali M. Niknejad. 185-188 [doi]
• A 2.14GHz watt-level power amplifier with passive load modulation in a SOI CMOS technologyGauthier Tant, Alexandre Giry, Pierre Vincent, Jean-Daniel Arnould, Jean-Michel Fournier. 189-192 [doi]
• A 65nm 4MB embedded flash macro for automotive achieving a read throughput of 5.7GB/s and a write throughput of 1.4MB/sMihail Jefremow, Thomas Kern, Ulrich Backhausen, J. Elbs, B. Rousseau, Christoph Roll, L. Castro, T. Roehr, E. Paparisto, K. Herfurth, R. Bartenschlager, Stefanie Thierold, R. Renardy, Stephan Kassenetter, N. Lawal, M. Strasser, W. Trottmann, Doris Schmitt-Landsiedel. 193-196 [doi]
• Dual-VT 4kb sub-VT memories with <1 pW/bit leakage in 65 nm CMOSOskar Andersson, Babak Mohammadi, Pascal Meinerzhagen, Andreas Burg, Joachim Neves Rodrigues. 197-200 [doi]
• A 40 nm, 454MHz 114 fJ/bit area-efficient SRAM memory with integrated charge pumpBram Rooseleer, Wim Dehaene. 201-204 [doi]
• Scalable 0.35V to 1.2V SRAM bitcell design from 65nm CMOS to 28nm FDSOIFady Abouzeid, Audrey Bienfait, Kaya Can Akyel, Sylvain Clerc, Lorenzo Ciampolini, Philippe Roche. 205-208 [doi]
• Design of a power-efficient CAM using automated background checking scheme for small match line swingAnh-Tuan Do, Chun Yin, Kiat Seng Yeo, Tony Tae-Hyoung Kim. 209-212 [doi]
• A dual vertical Hall latch with direction detectionDan Stoica, Mario Motz. 213-216 [doi]
• A continuous-time ripple reduction technique for spinning-current Hall sensorsJ. Jiang, Kofi A. A. Makinwa, Wilko J. Kindt. 217-220 [doi]
• A 40µW CMOS temperature sensor with an inaccuracy of ±0.4°C (3σ) from -55°C to 200°CKamran Souri, Kianoush Souri, Kofi A. A. Makinwa. 221-224 [doi]
• A resistor-based temperature sensor for MEMS frequency referencesMina Shahmohammadi, Kianoush Souri, Kofi A. A. Makinwa. 225-228 [doi]
• 128 nodes 4.5 mm pitch 15-bit pressure sensor ribbonCyril Condemine, Jérôme Willemin, S. Bouquet, Stéphanie Robinet, A. Robinet, L. Jouanet, Guillaume Regis, O. Compagnon, S. Vitry. 229-232 [doi]
• An injection-locking based programmable fractional frequency divider with 0.2 division step for quantization noise reductionRaghavasimhan Thirunarayanan, David Ruffieux, Christian C. Enz. 233-236 [doi]
• A 0.3-to-8.5GHz frequency synthesizer based on digital period synthesisTapio Rapinoja, Kari Stadius, Jussi Ryynänen. 237-240 [doi]
• Frequency translation through fractional division for a two-channel pulling mitigationSeyed Amir Reza Ahmadi Mehr, Massoud Tohidian, Robert Bogdan Staszewski. 241-244 [doi]
• High speed, high accuracy fractional-N frequency synthesizer using nested mixed-radix digital Δ-Σ modulatorsMichael Peter Kennedy, Brian Fitzgibbon, Austin Harney, Hyman Shanan, Mike Keaveney. 245-248 [doi]
• Solid state RF MEMS resonators in standard CMOSBichoy Bahr, Radhika Marathe, Wentao Wang 0008, Dana Weinstein. 249-252 [doi]
• Oxide electronics for imaging and displaysArokia Nathan, Sungsik Lee, Sanghun Jeon. 253-254 [doi]
• Why design reliable chips when faulty ones are even betterKrishna V. Palem, Avinash Lingamneni, Christian C. Enz, Christian Piguet. 255-258 [doi]
• A high-throughput 16× super resolution processor for real-time object recognition SoCJunyoung Park 0002, Byeong-Gyu Nam, Hoi-Jun Yoo. 259-262 [doi]
• Cross-layer optimization of QRD acceleratorsUpasna Vishnoi, Tobias G. Noll. 263-266 [doi]
• Word-parallel coprocessor architecture for digital nearest Euclidean distance searchToshinobu Akazawa, Seiryu Sasaki, Hans Jürgen Mattausch. 267-270 [doi]
• In-situ performance monitor employing threshold based notifications (TheBaN)Tobias Gemmeke, Mario Konijnenburg, Christian Bachmann. 271-274 [doi]
• A 0.4 GHz - 4 GHz direct RF-to-digital ΣΔ multi-mode receiverCharles Wu, Borivoje Nikolic. 275-278 [doi]
• A 0.7 - 3.7 GHz six phase receiver front-end with third order harmonic rejectionAnders Nejdel, Markus Törmänen, Henrik Sjöland. 279-282 [doi]
• A low out-of-band noise LTE transmitter with current-mode approachNicola Codega, Antonio Liscidini, Rinaldo Castello. 283-286 [doi]
• A 39 dB DR CMOS log-amp RF power detector with ±1.1 dB temperature drift from -40 to 85°CEric Muijs, Paulo Silva, Arie van Staveren, Wouter A. Serdijn. 287-290 [doi]
• 2×(4×)128 time-gated CMOS single photon avalanche diode line detector with 100 ps resolution for Raman spectroscopyIlkka Nissinen, Antti-Kalle Länsman, Jan Nissinen, Jouni Holma, Juha Kostamovaara. 291-294 [doi]
• Compact analog counting SPAD pixel with 1.9% PRNU and 530ps time gatingLucio Pancheri, Ekaterina Panina, Gian-Franco Dalla Betta, Leonardo Gasparini, David Stoppa. 295-298 [doi]
• Speed considerations for LDPD based time-of-flight CMOS 3D image sensorsAndreas Süss, Christian Nitta, Andreas Spickermann, Daniel Durini, Gabor Varga, Melanie Jung, Werner Brockherde, Bedrich J. Hosticka, Holger Vogt, Stefan Schwope. 299-302 [doi]
• A 80µW 30fps 104 × 104 all-nMOS pixels CMOS imager with 7-bit PWM ADC for robust detection of relative intensity changeMichele Benetti, Massimo Gottardi, Zeev Smilansky. 303-306 [doi]
• A 40nm-CMOS, 72 µW injection-locked timing reference and 1.8 Mbit/s coordination receiver for wireless sensor networksValentijn De Smedt, Georges G. E. Gielen, Wim Dehaene. 307-310 [doi]
• High-resolution and wide-dynamic range time-to-digital converter with a multi-phase cyclic Vernier delay lineMino Kim, Woo-Yeol Shin, Gi-Moon Hong, Jihwan Park, Joo-Hyung Chae, Nan Xing, Jong-Kwan Woo, Suhwan Kim. 311-314 [doi]
• A 32.55-kHz, 472-nW, 120ppm/°C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock applicationKeishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa. 315-318 [doi]
• 2 inverter-based 1.82mW 68.6dB-SNDR 10MHz-BW CT-ΣΔ-ADC in 65nm CMOSSebastian Zeller, Christian Muenker, Robert Weigel. 319-322 [doi]
• nd-order ΔΣ modulator noise suppressionMattias Andersson 0003, Martin Anderson, Lars Sundström, Sven Mattisson, Pietro Andreani. 323-326 [doi]
• A 40MHz-BW two-step open-loop VCO-based ADC with 42fJ/step FoM in 40nm CMOSXinpeng Xing, Peng Gao, Georges Gielen. 327-330 [doi]
• A 120GHz fully integrated 10Gb/s wireless transmitter with on-chip antenna in 45nm low power CMOSNoël Deferm, Wouter Volkaerts, Juan F. Osorio, Anton de Graauw, Michiel Steyaert, Patrick Reynaert. 331-334 [doi]
• A plastic waveguide receiver in 40nm CMOS with on-chip bondwire antennaMaarten Tytgat, Patrick Reynaert. 335-338 [doi]
• A 1-V 1.25-Gbps CMOS analog front-end for short reach optical linksCecilia Gimeno, Carlos Sánchez-Azqueta, Erick Guerrero, Concepción Aldea, Santiago Celma. 339-342 [doi]
• Integrated buck LED driver with application specific digital architectureGiovanni Capodivacca, Paolo Milanesi, Andrea Scenini. 343-346 [doi]
• Variable off time current-mode floating buck controller - A different approachVlad Anghel, Chris Bartholomeusz, Gheorghe Pristavu, Gheorghe Brezeanu. 347-350 [doi]
• Embedded fully self-biased switched-capacitor for energy and area-efficient cholesteric LCD driversWen-Shen Chou, Po-Hsien Huang, Ming-Yan Fan, Ke-Horng Chen, Kuei-Ann Wen, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin-Yu Luo, Shih-Ming Wang, Long-Der Chen, Cheng-Chen Yang, Jui-Lung Chen. 351-354 [doi]
• A 4 a peak current and 2 ns pulse width CMOS laser diode driver for high measurement rate applicationsJan Nissinen, Juha Kostamovaara. 355-358 [doi]
• High temperature analog circuit design in PD-SOI CMOS technology using reverse body biasingA. Schmidt, Holger Kappert, Rainer Kokozinski. 359-362 [doi]
• EMC compliant LIN transceiverPhilipp Schröter, Magnus-Maria Hell, Martin Frey. 363-366 [doi]
• A 1-V 99-to-75dB SNDR, 256Hz-16kHz bandwidth, 8.6-to-39µW reconfigurable SC ΔΣ Modulator for autonomous biomedical applicationsSerena Porrazzo, Venkata Narasimha Manyam, Alonso Morgado, David San Segundo Bello, Chris Van Hoof, Arthur H. M. van Roermund, Refet Firat Yazicioglu, Eugenio Cantatore. 367-370 [doi]
• A 105-dB SNDR, 10 kSps multi-level second-order incremental converter with smart-DEM consuming 280 µW and 3.3-V supplyYao Liu 0013, Edoardo Bonizzoni, Alessandro D'Amato, Franco Maloberti. 371-374 [doi]
• 2 3-channel area-optimized ΣΔ ADC in 0.16-µm CMOS with 20-kHz BW and 86-dB DRFabio Sebastiano, Robert H. M. van Veldhoven. 375-378 [doi]
• A 35 pJ/pulse injection-locking based UWB transmitter for wirelessly-powered RFID tagsJia Mao, Zhuo Zou, Li-Rong Zheng 0001. 379-382 [doi]
• 60-GHz, 9-µW wake-up receiver for short-range wireless communicationsToshiki Wada, Masayuki Ikebe, Eiichi Sano. 383-386 [doi]
• A 3-µW 868-MHz wake-up receiver with -83 dBm sensitivity and scalable data rateHeinrich Milosiu, Frank Oehler, Markus Eppel, Dieter Frühsorger, Stephan Lensing, Gralf Popken, Thomas Thönes. 387-390 [doi]
• EMI resisting voltage regulator with large signal PSR up to 1GHzFridolin Michel, Michiel Steyaert. 391-394 [doi]
• 2 fully integrated low-power hybrid buck converterStefan Dietrich, Lei Liao, Frank Vanselow, Ralf Wunderlich, Stefan Heinen. 395-398 [doi]
• An autonomous piezoelectric energy harvesting IC based on a synchronous multi-shots techniquePierre Gasnier, Jérôme Willemin, Sebastien Boisseau, Ghislain Despesse, Cyril Condemine, Guillaume Gouvernet, Jean-Jacques Chaillout. 399-402 [doi]
• A 13.2% locking-range divide-by-6, 3.1mW, ILFD using even-harmonic-enhanced direct injection technique for millimeter-wave PLLsTeerachot Siriburanon, Wei Deng 0001, Ahmed Musa, Kenichi Okada, Akira Matsuzawa. 403-406 [doi]
• A high-swing complementary class-C VCOLuca Fanori, Pietro Andreani. 407-410 [doi]
• A 0.54 THz signal generator in 40 nm bulk CMOS with 22 GHz tuning rangeWouter Steyaert, Patrick Reynaert. 411-414 [doi]
• Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias controlVivek Asthana, Malathi Kar, Jean Jimenez, Jean-Philippe Noel, Sébastien Haendler, Philippe Galy. 415-418 [doi]
• Performance impact of through-silicon vias (TSVs) in three-dimensional technology measured by SRAM ring oscillatorsJente B. Kuang, Keith A. Jenkins, Kevin Stawiasz, Jeremy D. Schaub. 419-422 [doi]
• Design of an organic electronic label on a flexible substrate for temperature sensingRamkumar Ganesan, Jürgen Krumm, Sebastian Pankalla, Klaus Ludwig, Manfred Glesner. 423-426 [doi]
• High temperature-low temperature coefficient analog voltage reference integrated circuit implemented with SiC MESFETsViorel Banu, Philippe Godignon, Mihaela Alexandru, Miquel Vellvehí, Xavier Jordà, José Millán. 427-430 [doi]