A 40 nm LP CMOS self-biased continuous-time comparator with sub-100ps delay at 1.1V & 1.2mW

Vladimir M. Milovanovic, Horst Zimmermann. A 40 nm LP CMOS self-biased continuous-time comparator with sub-100ps delay at 1.1V & 1.2mW. In ESSCIRC 2013 - Proceedings of the 39th European Solid-State Circuits Conference, Bucharest, Romania, September 16-20, 2013. pages 101-104, IEEE, 2013. [doi]

Abstract

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