Scalable 0.35V to 1.2V SRAM bitcell design from 65nm CMOS to 28nm FDSOI

Fady Abouzeid, Audrey Bienfait, Kaya Can Akyel, Sylvain Clerc, Lorenzo Ciampolini, Philippe Roche. Scalable 0.35V to 1.2V SRAM bitcell design from 65nm CMOS to 28nm FDSOI. In ESSCIRC 2013 - Proceedings of the 39th European Solid-State Circuits Conference, Bucharest, Romania, September 16-20, 2013. pages 205-208, IEEE, 2013. [doi]

Abstract

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