An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS

Davide Vecchi, Jan Mulder, Frank M. L. van der Goes, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult. An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS. J. Solid-State Circuits, 46(12):2834-2844, 2011. [doi]

Abstract

Abstract is missing.