VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits

Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo, Gregorio Cappuccino, Giovanni Staino. VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits. In Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001. pages 723-727, IEEE, 2001. [doi]

Abstract

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