Tudor Murgan - researchr alias

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Viewing Publication 1 - 34 from 34

2009

Low-Power Coding for Networks-on-Chip with Virtual ChannelsAlberto García Ortiz, Leandro Soares Indrusiak, Tudor Murgan, Manfred Glesner. jolpe, 5(1):77-84, 2009. [doi]

2008

2007

On the Design of a Reconfigurable Multiplier for Integer and Galois Field MultiplicationHeiko Hinkelmann, Tudor Murgan, G. Liu, Peter Zipf, Manfred Glesner. recosoc 2007: 185-191

On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron InterconnectsTudor Murgan, Petru Bogdan Bacinschi, Sujan Pandey, Alberto García Ortiz, Manfred Glesner. patmos 2007: 242-254 [doi]

Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive CouplingTudor Murgan, Andre Guntoro, Heiko Hinkelmann, Petru Bogdan Bacinschi, Manfred Glesner. recosoc 2007: 7-14

Signal Activity Analysis for High-Level Power Estimation in Time-Shared Linear SystemsAlberto García Ortiz, Tudor Murgan, Manfred Glesner. jolpe, 3(2):189-198, 2007. [doi]

2006

Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and RepeatersTudor Murgan, O. Mitrea, Sujan Pandey, Petru Bogdan Bacinschi, Manfred Glesner. vlsi 2006: 302-307 [doi]

A high-level compact pattern-dependent delay model for high-speed point-to-point interconnectsTudor Murgan, Massoud Momeni, Alberto García Ortiz, Manfred Glesner. iccad 2006: 323-328 [doi]

Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire CapacitanceTudor Murgan, Petru Bogdan Bacinschi, Alberto García Ortiz, Manfred Glesner. patmos 2006: 169-180 [doi]

Energy Conscious Simultaneous Voltage Scaling and On-chip Communication Bus SynthesisSujan Pandey, Tudor Murgan, Manfred Glesner. vlsi 2006: 296-301 [doi]

A signal theory based approach to the statistical analysis of combinatorial nanoelectronic circuitsOliver Soffke, Peter Zipf, Tudor Murgan, Manfred Glesner. date 2006: 632-637 [doi]

2005

Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design TechniquesManfred Glesner, Heiko Hinkelmann, Thomas Hollstein, Leandro Soares Indrusiak, Tudor Murgan, Abdulfattah Mohammad Obeid, Mihail Petrov, Thilo Pionteck, Peter Zipf. samos 2005: 12-21 [doi]

Design and Implementation of a Multi-Core Architecture for Overhead Processing in Optical Transport NetworksTudor Murgan, Abdulfattah Mohammad Obeid, Andre Guntoro, Peter Zipf, Manfred Glesner, Ulrich Heinkel. recosoc 2005: 151-156

HW/SW design and realization of a size-reconfigurable DCT acceleratorAbdulfattah Mohammad Obeid, Tudor Murgan, Abdelouahid Taadou, Manfred Glesner. icecsys 2005: 1-4 [doi]

A linear model for high-level delay estimation in VDSM on-chip interconnectsAlberto García Ortiz, Tudor Murgan, Mihail Petrov, Manfred Glesner. iscas 2005: 1078-1081 [doi]

Functional modeling techniques for a wireless LAN OFDM transceiverA. Petrov, Tudor Murgan, Peter Zipf, Manfred Glesner. iscas 2005: 3970-3973 [doi]

2004

Reconfigurable platforms for ubiquitous computingManfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan. cf 2004: 377-389 [doi]

Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessingTudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel, Jörg Pleickhardt, Bernd Bleisteiner. cf 2004: 404-418 [doi]

Flexible Overhead Processing Architectures for G.709 Optical Transport NetworksTudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel. mbmv 2004: 156-164

On Timing and Power Consumption in Inductively Coupled On-Chip InterconnectsTudor Murgan, Alberto García Ortiz, Clemens Schlachta, Heiko Zimmer, Mihail Petrov, Manfred Glesner. patmos 2004: 819-828 [doi]

Accurate capture of timing parameters in inductively-coupled on-chip interconnectsTudor Murgan, Clemens Schlachta, Mihail Petrov, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis. sbcci 2004: 117-122 [doi]

Moment-Based Estimation of Switching Activity for Correlated DistributionsAlberto García Ortiz, Tudor Murgan, Manfred Glesner. patmos 2004: 859-868 [doi]

The XPP Architecture and Its Co-simulation Within the Simulink EnvironmentMihail Petrov, Tudor Murgan, F. May, Martin Vorbach, Peter Zipf, Manfred Glesner. fpl 2004: 761-770 [doi]

Dynamic power optimization of the trace-back process for the Viterbi algorithmMihail Petrov, Tudor Murgan, Abdulfattah Mohammad Obeid, Cristian Chitu, Peter Zipf, Jörg Brakensiek, Manfred Glesner. iscas 2004: 721-724

2003

Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband SystemsRalf Ludewig, Alberto García Ortiz, Tudor Murgan, Juan Jesus, Ocampo Hidalgo, Manfred Glesner. rsp 2003: 172-178 [doi]

Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped SystemsRalf Ludewig, Alberto García Ortiz, Tudor Murgan, Manfred Glesner. dafes, 8(4):297-308, 2003. [doi]

Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable ArchitecturesTudor Murgan, Mihail Petrov, Alberto García Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernard Ölkrug, Jörg Brakensiek. fpl 2003: 1111-1114 [doi]

Moment-Based Power Estimation in Very Deep Submicron TechnologiesAlberto García Ortiz, Lukusa D. Kabulepa, Tudor Murgan, Manfred Glesner. iccad 2003: 107-112 [doi]

Transition Activity Estimation for General Correlated Data DistributionsAlberto García Ortiz, Tudor Murgan, Manfred Glesner. vlsid 2003: 440-445 [doi]

An Adaptive Trace-Back Solution for State-Parallel Viterbi DecodersMihail Petrov, Abdulfattah Mohammad Obeid, Tudor Murgan, Peter Zipf, Jörg Brakensiek, Bernard Ölkrug, Manfred Glesner. vlsi 2003: 167

2002

Power Estimation Based on Transition Activity Analysis with an Architecture Precise Rapid Prototyping SystemRalf Ludewig, Alberto García Ortiz, Tudor Murgan, Manfred Glesner. rsp 2002: 138 [doi]

Power Consumption in Point-to-Point Interconnect ArchitecturesAlberto García Ortiz, Tudor Murgan, Leandro Soares Indrusiak, Manfred Glesner. sbcci 2002: 155-162 [doi]

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