Sujan Pandey, Rolf Drechsler, Tudor Murgan, Manfred Glesner. Process variations aware robust on-chip bus architecture synthesis for MPSoCs. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 2989-2992, IEEE, 2008. [doi]
Abstract is missing.