Table of Contents

• Quantum parallelism and the exact simulation of physical systemsDan C. Marinescu. 1 [doi]
• javaset: declarative programming in Java with setsG. Rossi, E. Poleo. 2-11 [doi]
• Effect of auto-tuning with user s knowledge for numerical softwareTakahiro Katagiri, Kenji Kise, Hiroki Honda, Toshitsugu Yuba. 12-25 [doi]
• Introduction to NOMADS: networks of mobile adaptive dependable systemsMiroslaw Malek. 26-27 [doi]
• An architectural framework and a middleware for cooperating smart componentsAntonio Casimiro, Jörg Kaiser, Paulo Veríssimo. 28-39 [doi]
• An architecture to support cooperating mobile embedded systemsEdgar Nett, Stefan Schemmer. 40-50 [doi]
• Model-based evaluation of a radio resource management system for wireless networksStefano Porcarelli, Felicita Di Giandomenico, Andrea Bondavalli, Paolo Lollini. 51-59 [doi]
• Modeling service-based multimedia content adaptation in pervasive computingGirma Berhe, Lionel Brunie, Jean-Marc Pierson. 60-69 [doi]
• A framework for resource discovery in pervasive computing for mobile aware task executionK. Kalapriya, S. K. Nandy, Deepti Srinivasan, R. Uma Maheshwari, V. Satish. 70-77 [doi]
• Application-level power management in pervasive computing systems: a case studyLuca Negri, Domenico Barretta, William Fornaciari. 78-88 [doi]
• Quantum designer and network simulatorSándor Imre, Péter Abronits, Dániel Darabos. 89-95 [doi]
• Using HDLs for describing quantum circuits: a framework for efficient quantum algorithm simulationMihai Udrescu, Lucian Prodan, Mircea Vladutiu. 96-110 [doi]
• Toward a quantum process algebraPhilippe Jorrand, Marie Lalire. 111-119 [doi]
• States of matter, information organization and dimensions of expressivenessMarion G. Ceruti. 120-124 [doi]
• BLOB computingFrédéric Gruau, Yves Lhuillier, Philippe Reitz, Olivier Temam. 125-139 [doi]
• Biologically inspired rule-based multiset programming paradigm for soft-computingE. V. Krishnamurthy, Venu K. Murthy, Vikram Krishnamurthy. 140-149 [doi]
• Watson-Crick automata and PCFAS with two components: a computational power analogyLiliana Cojocaru. 150-161 [doi]
• Reflections on the memory wallSally A. McKee. 162 [doi]
• Fighting the memory wall with assisted executionMichel Dubois. 168-180 [doi]
• Self-correcting LRU replacement policiesMartin Kämpe, Per Stenström, Michel Dubois. 181-191 [doi]
• Dynamic techniques to reduce memory traffic in embedded systemsBen H. H. Juurlink, Pepijn J. de Langen. 192-201 [doi]
• Overcoming the Memory Wall by improved system design exploration and a link to process technology optionsAntonis Papanikolaou, Miguel Miranda, Francky Catthoor. 202-211 [doi]
• A first glance at Kilo-instruction based multiprocessorsMarco Galluzzi, Valentin Puente, Adrián Cristal, Ramón Beivide, José-Ángel Gregorio, Mateo Valero. 212-221 [doi]
• An active data-aware cache consistency protocol for highly-scalable data-shipping DBMS architecturesKeqiang Wu, Peng-fei Chuang, David J. Lilja. 222-234 [doi]
• Reducing traffic generated by conflict misses in cachesPepijn J. de Langen, Ben H. H. Juurlink. 235-239 [doi]
• Combining compiler and runtime IPC predictions to reduce energy in next generation architecturesSaurabh Chheda, Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz. 240-254 [doi]
• A docked-aware storage architecture for mobile computingChristopher R. LaRosa, Mark W. Bailey. 255-262 [doi]
• Knowledge-based generic intelligent network modelGábor Németh. 263-267 [doi]
• An information-interconnectivity-based retrieval method for network attached storageIliyak Georgiev, Ivo I. Georgiev. 268-275 [doi]
• Improving the execution time of global communication operationsMatthias Kühnemann, Thomas Rauber, Gudula Rünger. 276-287 [doi]
• Mobile agent: based module distribution in heterogeneous networksAmbrus Wagner. 288-293 [doi]
• Berserkr: a virtual beowulf cluster for fast prototyping and teachingMicaela Spigarolo, Renzo Davoli. 294-301 [doi]
• A parallel backtracking framework (BkFr) for single and multiple clustersMichal Kouril, Jerome L. Paul. 302-312 [doi]
• Approximating the optimal replacement algorithmBen H. H. Juurlink. 313-319 [doi]
• Parallel simulation of orography influence on large-scale atmosphere motion on APEmilleM. Francia, E. Panizzi, A. Petricola, G. Visconti. 320-325 [doi]
• A new technique to calculate dipolar energy and its implementation onto an application specific processorMarco Bera, Giovanni Danese, Francesco Leporati, Alvaro Spelgatti. 326-334 [doi]
• Repairing return address stack for buffer overflow protectionYong-Joon Park, Gyungho Lee. 335-342 [doi]
• MaRS: a macro-pipelined reconfigurable systemNozar Tabrizi, Nader Bagherzadeh, Amir Hosein Kamalizad, Haitao Du. 343-349 [doi]
• Fault tolerant clockless wave pipeline designT. Feng, Byoungjae Jin, J. Wang, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi. 350-356 [doi]
• The digital divide of computingReiner W. Hartenstein. 357-362 [doi]
• The happy marriage of architecture and application in next-generation reconfigurable systemsIngrid Verbauwhede, Patrick Schaumont. 363-376 [doi]
• Reconfigurable platforms for ubiquitous computingManfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan. 377-389 [doi]
• Physical design methodologies for performance predictability and manufacturabilityRicardo Reis, Fernanda Lima Kastensmidt, José Luís Almada Güntzel. 390-397 [doi]
• Platform-independent methodology for partial reconfigurationDirk Koch, Jürgen Teich. 398-403 [doi]
• Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessingTudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel, Jörg Pleickhardt, Bernd Bleisteiner. 404-418 [doi]
• Designing and testing fault-tolerant techniques for SRAM-based FPGAsFernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis. 419-432 [doi]
• Predictable performance in SMT processorsFrancisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero. 433-443 [doi]
• Fault secureness need for next generation high performance microprocessor design for testability structuresCecilia Metra, T. M. Mak, Martin Omaña. 444-450 [doi]
• High performance code compression architecture for the embedded ARM/THUMB processorX. H. Xu, C. T. Clarke, S. R. Jones. 451-456 [doi]
• Integrated temporal and spatial scheduling for extended operand clustered VLIW processorsRahul Nagpal, Y. N. Srikant. 457-470 [doi]
• Accelerating the secure remote password protocol using reconfigurable hardwarePeter Groen, Panu Hämäläinen, Ben H. H. Juurlink, Timo Hämäläinen. 471-480 [doi]
• SoC design of Ogg Vorbis decoder using embedded processorAtsushi Kosaka, Satoshi Yamaguchi, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa. 481-487 [doi]
• A perspective on the future of massively parallel computing: fine-grain vs. coarse-grain parallel models comparison & contrastPredrag T. Tosic. 488-502 [doi]
• Opportunities and challenges in application-tuned circuits and architectures based on nanodevicesTeng Wang, Zhenghua Qi, Csaba Andras Moritz. 503-511 [doi]