Wu-Shiung Feng - researchr alias

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Viewing Publication 1 - 55 from 55

2017

A Simple Drain Current Model for MOS Transistors with the Lorentz Force EffectHwang-Cherng Chow, Prasenjit Chatterjee, Wu-Shiung Feng. sensors, 17(6):1199, 2017. [doi]

2016

Drain Current Modulation of a Single Drain MOSFET by Lorentz Force for Magnetic Sensing ApplicationPrasenjit Chatterjee, Hwang-Cherng Chow, Wu-Shiung Feng. sensors, 16(9):1389, 2016. [doi]

2008

A 24GHz low-power CMOS receiver designChen-Yuan Chu, Chien-Cheng Wei, Hui-Chen Hsu, Shu-Hau Feng, Wu-Shiung Feng. iscas 2008: 980-983 [doi]

Model-order reductions for MIMO systems using global Krylov subspace methodsChia-Chi Chu, Ming-Hong Lai, Wu-Shiung Feng. mcs, 79(4):1153-1164, 2008. [doi]

2007

Lyapunov-Based Error Estimations of MIMO Interconnect Reductions by Using the Global Arnoldi AlgorithmChia-Chi Chu, Ming-Hong Lai, Wu-Shiung Feng. ieicet, 90-A(2):415-418, 2007. [doi]

Applications of AOGL Model-Order Reduction Techniques in Interconnect AnalysisMing-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng. iscas 2007: 1133-1136 [doi]

On the Equivalent of Structure Preserving Reductions Approach and Adjoint Networks Approach for VLSI Interconnect ReductionsMing-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng. ieicet, 90-A(2):411-414, 2007. [doi]

2006

The global Lanczos method for MIMO interconnect order reductionsChia-Chi Chu, Ming-Hong Lai, Wu-Shiung Feng. iscas 2006: [doi]

An Adjoint Network Approach for RLCG Interconnect Model Order ReductionsChia-Chi Chu, Herng-Jer Lee, Ming-Hong Lai, Wu-Shiung Feng. ieicet, 89-A(2):439-447, 2006. [doi]

MIMO Interconnects Order Reductions by Using the Multiple Point Adaptive-Order Rational Global Arnoldi AlgorithmChia-Chi Chu, Ming-Hong Lai, Wu-Shiung Feng. ieicet, 89-C(6):792-802, 2006. [doi]

The Multiple Point Global Lanczos Method for Multiple-Inputs Multiple-Outputs Interconnect Order ReductionsChia-Chi Chu, Ming-Hong Lai, Wu-Shiung Feng. ieicet, 89-A(10):2706-2716, 2006. [doi]

MIMO interconnects order reductions by using the global Arnoldi algorithmMing-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng. iscas 2006: [doi]

The Multiple Point Global Lanczos Method for MIMO Interconnect Model-Order ReductionsMing-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng. apccas 2006: 1268-1271 [doi]

Model-Order Reduction Algorithm with Structure Preserving TechniquesMing-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng. apccas 2006: 1607-1610 [doi]

XNOR-based double-edge-triggered flip-flop for two-phase pipelinesYing-Haw Shu, Shing Tenqchen, Ming-Chang Sun, Wu-Shiung Feng. tcas, 53-II(2):138-142, 2006. [doi]

A Brief Comparison of Two-phase and NOR-based Four-phase Pipelined Asynchronous SystemsYing-Haw Shu, Shing Tenqchen, Ming-Chang Sun, Wu-Shiung Feng. jise, 22(4):941-952, 2006. [doi]

2005

A 1.8 V, 0.3 mW, 10-bit SA-ADC with new self-timed timing control for biomedical applicationsHwang-Cherng Chow, Bo-Wei Chen, Hsiao-Chen Chen, Wu-Shiung Feng. iscas 2005: 736-739 [doi]

Interconnect model reductions by using the AORA algorithm with considering the adjoint networkChia-Chi Chu, Herng-Jer Lee, Wu-Shiung Feng, Ming-Hong Lai. iscas 2005: 1278-1281 [doi]

Perturbation Approach for Order Selections of Two-Sided Oblique Projection-Based Interconnect ReductionsChia-Chi Chu, Ming-Hong Lai, Wu-Shiung Feng. ieicet, 88-A(12):3573-3576, 2005. [doi]

Error Estimations of Arnoldi-Based Interconnect Model-Order ReductionsChia-Chi Chu, Herng-Jer Lee, Wu-Shiung Feng. ieicet, 88-A(2):533-537, 2005. [doi]

Moment Computations of Distributed Coupled RLC Interconnects with Applications to Estimating Crosstalk NoiseHerng-Jer Lee, Chia-Chi Chu, Ming-Hong Lai, Wu-Shiung Feng. ieicet, 88-C(6):1186-1195, 2005. [doi]

A One-Step Input Matching Method for Cascode CMOS Low-Noise AmplifiersMing-Chang Sun, Ying-Haw Shu, Shing Tenqchen, Wu-Shiung Feng. ieicet, 88-C(3):420-428, 2005. [doi]

2004

Generalizations of adjoint networks technique for RLC interconnects model-order reductionsHerng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng. iscas 2004: 185-188

Applications of tree/link partitioning for moment computations of general lumped RLC networks with resistor loopsHerng-Jer Lee, Ming-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng. iscas 2004: 713-716 [doi]

Moment Computations of Nonuniform Distributed Coupled RLC Trees with Applications to Estimating Crosstalk NoiseHerng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng. isqed 2004: 75-80 [doi]

An XNOR-based Double-edge-triggered Flip-Flop for Two-phase PipelinesYing-Haw Shu, Shing Tenqchen, Ming-Chang Sun, Wu-Shiung Feng. ccct 2004: 79-84

Blind Signal Extraction Algorithm for the License Plate Matching of Vehicle Positioning SystemShing Tenqchen, Ying-Haw Shu, Ming-Chang Sun, Wu-Shiung Feng. delta 2004: 440-442 [doi]

2003

Interconnect modeling and sensitivity analysis using adjoint networks reduction techniqueHerng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng. iscas 2003: 648-651 [doi]

Moment Computations of Lumped Coupled RLC Trees with Applications to Estimating Crosstalk NoiseHerng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng. ieiceta, 86-A(12):2952-2964, 2003. [doi]

A 2.4 GHz CMOS image-reject low noise amplifierMing-Chang Sun, Shing Tenqchen, Ying-Haw Shu, Wu-Shiung Feng. iscas 2003: 329-332 [doi]

2002

2001

A 2.4-GHz CMOS down-conversion doubly balanced mixer with low supply voltageChih-Chun Tang, Wen-Shih Lu, Lan-Da Van, Wu-Shiung Feng. iscas 2001: 794-797 [doi]

2000

Testable design of multiple-stage OTA-C filtersCheng-Chung Hsu, Wu-Shiung Feng. tim, 49(5):929-934, 2000. [doi]

A new VLSI architecture without global broadcast for 2-D digital filtersLan-Da Van, Chih-Chun Tang, Shing Tenqchen, Wu-Shiung Feng. iscas 2000: 547-550 [doi]

1999

A tree-systolic array of DLMS adaptive filterLan-Da Van, Shing Tenqchen, Chia-Hsun Chang, Wu-Shiung Feng. icassp 1999: 1253-1256 [doi]

Design of a lower-error fixed-width multiplier for speech processing applicationLan-Da Van, Shuenn-Shyang Wang, Shing Tenqchen, Wu-Shiung Feng, Bor-Shenn Jeng. iscas 1999: 130-133 [doi]

1995

Relaxation-based transient sensitivity computations for MOSFET circuitsChun-Jung Chen, Wu-Shiung Feng. tcad, 14(2):173-185, 1995. [doi]

1994

Transient Sensitivity Computation of MOSFET Circuits Using Iterated Timing Analysis and Selective-Tracing Waveform EelaxationChung-Jung Chen, Wu-Shiung Feng. dac 1994: 581-585 [doi]

An Accurate Time-Domain Current Waveform Simulator for VLSI CircuitsJyh-Herng Wang, Jen-Teng Fan, Wu-Shiung Feng. eurodac 1994: 562-566

New efficient designs for XOR and XNOR functions on the transistor levelJyh-Ming Wang, Sung-Chuan Fang, Wu-Shiung Feng. jssc, 29(7):780-786, July 1994. [doi]

1992

An analytical CMOS inverter delay model including channel-length modulationsHwang-Cherng Chow, Wu-Shiung Feng. jssc, 27(9):1303-1306, September 1992. [doi]

A New Efficient Approach to Multilayer Channel Routing ProblemSung-Chuan Fang, Wu-Shiung Feng, Shian-Lang Lee. dac 1992: 579-584 [doi]

An H-V alternating routerChia-Chun Tsai, Sao-Jie Chen, Wu-Shiung Feng. tcad, 11(8):976-991, 1992. [doi]

1991

Transient Sensitivity Computation for Waveform Relaxation Based Timing SimulationChun-Jung Chen, Jyuo-Min Shyu, Wu-Shiung Feng. iccad 1991: 120-123

Constrained via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing ProblemsSung-Chuan Fang, Kuo-En Chang, Wu-Shiung Feng, Sao-Jie Chen. dac 1991: 60-65 [doi]

A knowledge-based program for compacting mask layout of integrated circuitsPei-Yung Hsiao, S. F. Steven Chen, Chia-Chun Tsai, Wu-Shiung Feng. cad, 23(3):223-231, 1991. [doi]

1990

1989

The Control Model for a Knowledge-Based Approach to VLSI Compaction DesignS. F. Steven Chen, Pei-Yung Hsiao, Wu-Shiung Feng, Shun-Nan Dai, Wen-Zyh Wang. ifip 1989: 241-246

1988

A rule-based compactor for VLSI/CAD mask layoutPei-Yung Hsiao, Chen Yung Syau, Wu-Shiung Feng, T. M. Parng, Cheng-Chung Hsu. compsac 1988: 35-42 [doi]

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