Abstract is missing.
- Frame based signal compression using method of optimal directions (MOD)Kjersti Engan, Sven Ole Aase, John Håkon Husøy. 1-4 [doi]
- Blind deconvolution by modified Bussgang algorithmSimone Fiori, Aurelio Uncini, Francesco Piazza. 1-4 [doi]
- A low-complexity dynamic element matching technique for reduced-distortion digital-to-analog conversionHenrik T. Jensen, Joseph F. Jensen. 1-4 [doi]
- Jitter model of direct digital synthesis clock generatorsDorin Emil Calbaza, Yvon Savaria. 1-4 [doi]
- Analysis of the periodic steady-state in nonlinear circuits using an adaptive function baseAxel Wenzler, Ernst Lücker. 1-4 [doi]
- New results in multidimensional linear phase filter bank designS. Basu. 1-4 [doi]
- A time-varying Prony method for instantaneous frequency estimation at low SNRAloysius A. Beex, Peijun Shan. 5-8 [doi]
- Symbolic analysis of large signals in nonlinear systemsD. M. W. Leenaerts. 5-8 [doi]
- Mismatch-shaping serial digital-to-analog converterJesper Steensgaard, Un-Ku Moon, Gabor C. Temes. 5-8 [doi]
- An image compression using self-organization with genetic algorithmH. Ryu, Yoshikazu Miyanaga, Koji Tochinai. 5-8 [doi]
- A hybrid DBNS processor for DSP computationGraham A. Jullien, Vassil S. Dimitrov, B. Li, William C. Miller, A. Lee, Majid Ahmadi. 5-8 [doi]
- A behavioural approach to the pole/zero structure of nD linear systemsP. Zaris, J. Wood, Eric Rogers, David H. Owens. 5-8 [doi]
- Gain mismatch effect of cascaded sigma delta modulator reduced by serial techniqueC. C. Ho, C. J. Kuo. 9-12 [doi]
- Multiresolution analysis of time-variant electrical networksC. M. Arturi, A. Gandelli, S. Leva, S. Marchi, A. P. Morando. 9-13 [doi]
- Design of general block oriented expansions for efficient signal representationJohn Håkon Husøy, Sven Ole Aase, Karl Skretting, Kjersti Engan. 9-12 [doi]
- User selectable feature support for an embedded processorAllan R. Dyck, S. Evenson, H. Fu, Richard F. Hobson. 9-12 [doi]
- Lossless image compression based on a fuzzy-clustered predictionBruno Aiazzi, Stefano Baronti, Luciano Alparone. 9-12 [doi]
- Matrix completion problems in multidimensional systemsW. M. Lawton, Zhiping Lin. 9-12 [doi]
- Two rapidly convergent algorithms for signal separationM. F. Fahmy, G. M. A. El-Raheem, A. A. El-Sallam. 13-16 [doi]
- Synthesis of checker EFSMs from timing diagram specificationsE. K. Ogoubi, Eduard Cerny. 13-18 [doi]
- On the design of 2nd order multi-bit Sigma-Delta-modulatorsSaska Lindfors, M. Lansirinne, T. Lindeman, Kari Halonen. 13-16 [doi]
- A critique of SVD-based image coding systemsSven Ole Aase, John Håkon Husøy, P. Waldemar. 13-16 [doi]
- 2D feedback system design: the tracking and disturbance rejection problemsLi Xu, O. Saito, Jiang Qian Ying. 13-16 [doi]
- Steady states prediction in nonlinear circuit by wavelet transformTakashi Hisakado, Kohshi Okumura. 14-17 [doi]
- New results in numerically integrating PDES by the wave digital approachAlfred Fettweis, G. A. Seraji. 17-20 [doi]
- A multi-input multi-output adaptive FIR filter with guaranteed convergence for feedforward ANC systemTak Keung Yeung, Sze-Fong Yau. 17-20 [doi]
- A novel image compression algorithm by using Log-Exp transformSheng-Chieh Huang, Liang-Gee Chen, Hao-Chieh Chang. 17-20 [doi]
- Tunable current mirrors for ultra low voltageYngvar Berg, Tor Sverre Lande. 17-20 [doi]
- A model for predicting sampler RF bandwidth and conversion lossP. Eriksson, Hannu Tenhunen. 18-21 [doi]
- An exact BIBO stability condition for Bode-type variable-amplitude digital equalizersArthur T. G. Fuller, Behrouz Nowrouzian. 19-22 [doi]
- Design and analysis of an ultra low-voltage CMOS class-AB V-I converter for dynamic range enhancementC. H. Lin, M. Ismail. 21-24 [doi]
- Solution of vector partial differential equations by transfer function modelsRudolf Rabenstein, Lutz Trautmann. 21-24 [doi]
- Peer group filtering and perceptual color image quantizationYining Deng, Charles S. Kenney, Michael S. Moore, B. S. Manjunath. 21-24 [doi]
- Adaptive noise subspace construction for harmonic retrievalC. D. Schmitz, W. Kenneth Jenkins. 21-24 [doi]
- A new diode model formulation for electro-thermal analysisDario D Amore, Paolo Maffezzoni. 22-25 [doi]
- Embedded cores using built-in mechanismsDimitrios Kagaris, Spyros Tragoudas. 23-26 [doi]
- Edge-based image synthesis model and its application to image codingMakoto Nakashizuka, Hisakazu Kikuchi. 25-28 [doi]
- Adaptive blind demodulation of DS/CDMA signals with transform domain Griffiths algorithmHe-Chi Hwang, Che-Ho Wei. 25-28 [doi]
- Input common-mode feedback technique for very low voltage CMOS amplifiersJ. Francisco Duque-Carrillo, José L. Ausín, Guido Torelli, Juan M. Carrillo, P. Merchan. 25-28 [doi]
- Analysis and numerical integration of nonlinear systems using MD passive circuitsB. G. Mertzios, F. N. Koumboulis. 25-28 [doi]
- The sampling of noise for random number generationC. S. Petrie, J. Alvin Connelly. 26-29 [doi]
- Performance evaluation of 1-bit CMOS adder cellsAhmed M. Shams, Magdy A. Bayoumi. 27-30 [doi]
- Restoration of noise corrupted images using new 2-D window familiesS. H. Saeid, J. K. Gautam. 29-32 [doi]
- Design of nonrecursive 2-D digital filters using semidefinite programmingWu-Sheng Lu, Andreas Antoniou. 29-32 [doi]
- Bootstrapped low-voltage analog switchesJesper Steensgaard. 29-32 [doi]
- Subband signal processing for hearing aidsS. Wyrsch, A. Kaelin. 29-32 [doi]
- New microwave bandstop filter using lumped and transversal networkKam-Weng Tam, P. Viror, J. C. Freire, Rui Paulo Martins. 30-32 [doi]
- Correcting multiple design errors in digital VLSI circuitsAndreas G. Veneris, Ibrahim N. Hajj. 31-34 [doi]
- Time-referenced single-path multi-bit Sigma-Delta ADC using a VCO based quantizerRavindranath Naiknaware, Terri S. Fiez. 33-36 [doi]
- A theoretical investigation on exact blind channel and input sequence estimationAhmet Kemal Özdemir, Orhan Arikan. 33-36 [doi]
- Expanded GMC for transient analysis of transmission line networksA. Kamo, T. Watanabe, H. Asai. 33-36 [doi]
- A simple M-dimensional model-based phase unwrapping based on integration by partsI. Yamada, K. Nakajima. 33-36 [doi]
- Restoration of three dimensional microscopic images using the row action projection methodV. K. Gopalakrishnan, Ravi P. Ramachandran, J. Wilder, Richard J. Mammone. 33-36 [doi]
- A system verification strategy based on the BST infrastructureGustavo R. Alves, José M. M. Ferreira. 35-38 [doi]
- Efficient block-based coding of noise images by combining pre-filtering and DCTSung Deuk Kim, Sung Kyu Jang, Myung Jun Kim, Jong Beom Ra. 37-40 [doi]
- A novel decoder for Sigma-Delta modulator providing both high resolution and low latencyM. R. Sherkat, Steven B. Bibyk. 37-40 [doi]
- Adaptive filters with nonlinear RLS algorithm in impulse noiseShu Hung Leung, Jian-Feng Weng. 37-40 [doi]
- Design of phase equalizers via symmetry of the impulse responseD. B. Carvalho, Sidnei Noceti Filho, Rui Seara. 37-40 [doi]
- Approximation of convexly constrained pseudoinverse by hybrid steepest descent methodI. Yamada. 37-40 [doi]
- A load-adaptive, low switching-noise data output bufferSeung Wook Lee, Daeyun Shim, Yeon-Jae Jung, Dong-Yun Lee, Chang-Hyun Kim, Wonchan Kim. 39-42 [doi]
- On the robustness of vector set partitioning image coders to bit errorsD. Mukherjee, S. K. Mitra. 41-45 [doi]
- Logarithmic sampling of gain and phase approximationCorneliu Rusu, Pauli Kuosmanen. 41-44 [doi]
- A low-voltage/low-power second-order /Sigma/Delta modulator with signal adaptive control architectureQ. Li, Jan Van der Spiegel, K. R. Laker. 41-44 [doi]
- Rejection of narrow-band interference in BPSK demodulation using adaptive IIR notch filterS. Nishimura, M. Aloys. 41-44 [doi]
- Complete parametrization of synthesis in multidimensional perfect reconstruction FIR systemsHyungju Park. 41-44 [doi]
- A 10-transistor low-power high-speed full adder cellHanan A. Mahmoud, Magdy A. Bayoumi. 43-46 [doi]
- Adaptive feed-forward linear power amplifier (LPA) for the IMT-2000 frequency bandKisuk Yoo, Sanggee Kang, Jae Ick Choi, Jong-Suk Chae. 45-48 [doi]
- Design and switched-capacitor implementation of a new cascade-of-resonators Sigma-Delta converter configurationY. Botteron, Behrouz Nowrouzian, Arthur T. G. Fuller. 45-48 [doi]
- Matrix completion problems in multidimensional systemsW. M. Lawton, Zhiping Lin. 45-48 [doi]
- Adaptive alpha-trimmed mean filters based on asymptotic variance minimizationRemzi Öten, Rui J. P. de Figueiredo. 45-48 [doi]
- A novel method for blocking effect reduction in DCT-coded imagesWing-kuen Ling, Bing Zeng. 46-49 [doi]
- A new dynamic ternary sense amplifier for 1.5-bit/cell multi-level low-voltage CMOS DRAMsChung-Yu Wu, Yu-Yee Liow. 47-50 [doi]
- Direct blind deconvolution of multiuser-multichannel systemsRuey-Wen Liu, Yujiro Inouye. 49-52 [doi]
- Pipelined QR decomposition based multi-channel least square lattice adaptive filter architecturesZhipei Chi, Jun Ma, Keshab K. Parhi. 49-53 [doi]
- A modified inverse-Chebyshev filter with an all positive elements ladder passive realizationDavid Báez-López, E. Jimenez-Lopez. 49-52 [doi]
- Low-voltage switched-capacitor circuitsE. Bidari, M. Keskin, Franco Maloberti, Un-Ku Moon, Jesper Steensgaard, Gabor C. Temes. 49-52 [doi]
- Low-overhead error-resilient bit-plane image codingTe-Chung Yang, Sunil Kumar, C. C. Jay Kuo. 50-53 [doi]
- A novel DHT-based FFT/IFFT processor for ADSL transceiversChin-Liang Wang, Ching-Hsien Chang. 51-54 [doi]
- A 1 V front-end interface for switched-op amp circuitsS. Karthikeyan, A. Tammineedi, C. Boecker, E. K. F. Lee. 53-56 [doi]
- Passive device modeling methodology using nonlinear optimizationL. A. Carastro, R. Poddar, E. Moon, Martin A. Brooke, Nan M. Jokerst. 53-56 [doi]
- Nonlinear ICA through low-complexity autoencodersSepp Hochreiter, Jürgen Schmidhuber. 53-56 [doi]
- Obtaining digital gradient signals for analog adaptive filtersAnthony Chan Carusone, David A. Johns. 54-57 [doi]
- Multi-frame motion estimation: application to motion compensated predictionD. Gibson, M. Spann. 54-57 [doi]
- A CMOS 10 b 60 Msample/s ADC with ultra fast gain controlK. Bacrania, Tzi-Hsiung Shu. 55-58 [doi]
- Multilevel PWM for single-phase power factor pre-regulatorBor-Ren Lin, Hsin-Hung Lu. 57-60 [doi]
- Fast ICA for noisy data using Gaussian momentsAapo Hyvärinen. 57-61 [doi]
- Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivitySeng-Pan U., Rui Paulo Martins, José E. Franca. 57-60 [doi]
- Smart copying-a new approach to reconstruction of audio signalsK. Cisowski, M. Niedzwiecki. 58-63 [doi]
- Real-time adaptive signal processing using a dynamic reconfigurable systolic architecture in analog VLSIKlaus Wiehler, Rolf-Rainer Grigat. 58-61 [doi]
- Low power datapath design using transformation similar to temporal localization of SFGsSven Simon, Marek Wróblewski. 59-61 [doi]
- Timing skew insensitive switching for double sampled circuitsMikko Waltari, Kari Halonen. 61-64 [doi]
- Analysis of noise in higher-order translinear filtersMichiel H. L. Kouwenhoven, J. Mulder, Wouter A. Serdijn, Arthur H. M. van Roermund. 61-64 [doi]
- Monaural separation of independent acoustical componentsGert Cauwenberghs. 62-65 [doi]
- Improved-Booth encoding for low-power multipliersKei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.. 62-65 [doi]
- Power-of-two adaptive filters using tabu searchStefano Traferro, Aurelio Uncini. 62-65 [doi]
- Asymmetric, space-variant point spread function model for a spherical lens optical systemThomas P. Costello, Wasfy B. Mikhael. 64-67 [doi]
- High-range switched-capacitor tracking filterLuis G. Bustamante, Michael A. Soderstrand. 65-68 [doi]
- Signal analysis of externally linear filtersG. Efthivoulidis, Yannis P. Tsividis. 65-68 [doi]
- Adaptive blind equalization of multichannel FIR systemsS. Ohno, H. Sakai, H. Yoshida. 66-69 [doi]
- The state space framework for blind dynamic signal extraction and recoveryFathi M. A. Salam, Gail Erten. 66-69 [doi]
- Minimizing switchings of the function units through binding for low powerAshok Kumar, Magdy A. Bayoumi, Raghava V. Cherabuddi. 66-69 [doi]
- A real-time line extraction algorithmJohn Gates, Miki Haseyama, Hideo Kitajima. 68-71 [doi]
- Switched-capacitor Litton-code matched filter for satellite ODBH busR. Boi, S. Brigati, F. Francesconi, C. Ghidini, Piero Malcovati, Franco Maloberti, M. Poletti. 69-72 [doi]
- The linear time-varying approach applied to a first-order dynamic translinear filterF. C. M. Kuijstermans, F. M. Diepstraten, Wouter A. Serdijn, P. van der Kloet, Arie van Staveren, Arthur H. M. van Roermund. 69-72 [doi]
- Set theoretic estimation through triangular noise distributionC. J. Kuo, C. Y. Lin, John R. Deller Jr.. 70-73 [doi]
- Combinatorial architectural level power optimization for a class of orthogonal transformsImed Ben Dhaou, Hannu Tenhunen. 70-75 [doi]
- Energy-efficient adaptive signal decomposition: the silicon and biological cochleaRahul Sarpeshkar. 70-73 [doi]
- Restoration of color images subjected to interchannel blurringNarasimha Kaulgud, Uday B. Desai. 72-75 [doi]
- Switched-capacitor decimation filters with direct form polyphase structure having very small sensitivity characteristicsAntonio Petraglia, Jacqueline S. Pereira. 73-76 [doi]
- Theoretical bases of convolution technique in gradient estimation of average quality index of electronic circuitsM. Keramat. 73-76 [doi]
- Variable-rate punctured convolutional coding over fading mobile communication channelsA. Abou-El-Azm, F. S. Mohammed. 74-77 [doi]
- Auditory cortical spectral shape analysis in analog VLSIM. Erturk, David J. Klein, Shihab A. Shamma. 74-77 [doi]
- Watermarking for still images using the human visual system in the DCT domainO-Hyung Kwon, Young-Sik Kim, Rae-Hong Park. 76-79 [doi]
- Instruction level power model of microcontrollersC. Chakrabarti, D. Gaitonde. 76-79 [doi]
- High performance multirate SC circuits with predictive correlated double sampling techniqueSeng-Pan U., Rui Paulo Martins, José E. Franca. 77-80 [doi]
- High power factor of metal halide lamp with dimming controlBor-Ren Lin, Yuen-Chou Hsieh. 77-80 [doi]
- Two-dimensional direction finding for wideband signals using simplified array configurationLiang Jin, Wenjie Wang, Qinye Yin. 78-81 [doi]
- Blind separation and filtering using state space modelsAndrzej Cichocki, Liqing Zhang, Tomasz M. Rutkowski. 78-81 [doi]
- Wavelet based watermarking method for digital images using the human visual systemYoung-Sik Kim, O-Hyung Kwon, Rae-Hong Park. 80-83 [doi]
- Multi-objective design strategy for high-level low power design of DSP systemsMark S. Bright, Tughrul Arslan. 80-83 [doi]
- Efficient simulation of on-chip RF components using model-reduction techniquesRamachandra Achar, Michel S. Nakhla. 81-84 [doi]
- A heuristic algorithm SDS for scheduling with timed Petri netsM. Yamauchi, T. Watanabe. 81-84 [doi]
- Combined carrier phase tracking and equalization for pi/4-DQPSK signals in mobile radioTen-Szu Chen, Der-Zheng Liu, Che-Ho Wei. 82-85 [doi]
- Analysis of subsystem integration in aircraft power distribution systemsS. Chandrasekaran, D. K. Lindner, D. Boroyevich. 82-85 [doi]
- Reduction of waiting time for retrieving images from distributed image databasesK. Suzuki, M. Nagao, H. Ikeda, Y. Shimodaira, M. Yamazaki. 84-89 [doi]
- Low-energy software Reed-Solomon codecs using specialized finite field datapath and division-free Berlekamp-Massey algorithmLeilei Song, Keshab K. Parhi. 84-89 [doi]
- 6.5 mW CMOS low noise amplifier at 1.9 GHzShijun Yang, Ralph Mason, Calvin Plett. 85-88 [doi]
- Transimpedance amplifiers for optical fiber systems based on common-base transistorsJ. Martínez-Castillo, J. Silva-Martinez. 85-88 [doi]
- New mode-domain representation of transmission line for power system studies-comparing with existing modelsM. C. Tavares, J. Pissolato, C. M. Portela. 86-89 [doi]
- Error analysis of a multi-step prediction based blind equalizerJ. Mannerkoski, Visa Koivunen. 86-89 [doi]
- Supply noise insensitive bandgap regulator using capacitive charge pump DC-DC converterChang-Hyeon Lee, K. McCellan, John Choma Jr.. 89-92 [doi]
- A 200 MHz frequency-locked loop based on new frequency-to-voltage converters approachAbdelouahab Djemouai, Mohamad Sawan, Mustapha Slamani. 89-92 [doi]
- A new adaptive equalizer for carrierless amplitude and phase (CAP) receiversJ. Gao, Y. H. Leung. 90-93 [doi]
- Vector median-rational hybrid filters for multichannel image processingLazhar Khriji, Moncef Gabbouj. 90-93 [doi]
- Application of perturbation methods to the analysis of inter-area oscillationsA. R. Messina, E. Baracio, E. Sanchez C. 90-93 [doi]
- Device level based cell modeling for fast power estimationChristian V. Schimpfle, Sven Simon, Josef A. Nossek. 90-93 [doi]
- Differential 0.35µm CMOS circuits for 622 MHz/933 MHz monolithic clock and data recovery applicationsHormoz Djahanshahi, C. Andre T. Salama. 93-96 [doi]
- VLSI concentric partitioning using interior point quadratic programmingLaleh Behjat, Anthony Vannelli. 93-96 [doi]
- A criterion-based image segmentation method with a genetic algorithmMiki Haseyama, N. Iwai, Hideo Kitajima. 94-97 [doi]
- A technique for designing self-checking logic for FPGAsParag K. Lala, A. L. Burress. 94-96 [doi]
- Calculation of multiple power flow solutions with the Krawczyk methodH. Mori, A. Yuihara. 94-97 [doi]
- Combined matched filter and polynomial-based interpolator for symbol synchronization in digital receiversJ. Vesma, Tapio Saramäki, Markku Renfors. 94-97 [doi]
- New low-power low-voltage high-CMRR CMOS instrumentation amplifierA. Harb, Mohamad Sawan. 97-100 [doi]
- Continuous-time adaptive-analog coaxial cable equalizer in 0.5 um CMOSG. P. Hartman, K. W. Martin, A. McLaren. 97-100 [doi]
- Configuration self-test in FPGA-based reconfigurable systemsW. Quddus, Abhijit Jas, Nur A. Touba. 97-100 [doi]
- New switch-mode topology for VAR compensationD. Shmilovitz, Dariusz Czarkowski, Zivan Zabar. 98-101 [doi]
- Improved feedforward ML timing estimation for PSK signalingGonçalo Nuno Gomes Tavares, Luís Miguel Gomes Tavares, Moisés Simões Piedade. 98-101 [doi]
- Region detection using color similarityN. Yabuki, Y. Matsuda, Y. Fukui, S. Miki. 98-101 [doi]
- Nonlinear signal processor design: a building block approachP. A. Ramamoorthy. 101-104 [doi]
- A switched-current ratio-independent algorithmic D/A converterShenhong Wang, M. Omair Ahmad. 101-104 [doi]
- A design for test perspective on memory synthesisKamran Zarrineh, Shambhu J. Upadhyaya. 101-104 [doi]
- A novel frequency compensation technique for low-voltage low-dropout regulatorKa Nang Leung, Philip K. T. Mok, Wing-Hung Ki. 102-105 [doi]
- New dominant point detection for image recognitionChun-Pong Chau, Wan-Chi Siu. 102-105 [doi]
- Investigating speaker features from very short speech recordsB. LaRoy Berg, Aloysius A. Beex. 102-105 [doi]
- Circuit modeling to predict the performance of force-cooled cold plate structuresR. J. Pieper, S. Michael. 105-108 [doi]
- Design of a transistor-mismatch-insensitive switched-current memory cellChunyan Wang, M. Omair Ahmad, M. N. S. Swamy. 105-108 [doi]
- On-line IDDQ fault testing for CMOS/BiCMOS logic familiesK. Raahernifar, M. Ahmadi. 105-109 [doi]
- A survey of mixed transform techniques for speech and image codingA. P. Berg, Wasfy B. Mikhael. 106-109 [doi]
- Accurate modelling and simulation of a DC brushless motor drive system for high performance industrial applicationsRichard A. Guinee, C. Lyden. 106-109 [doi]
- A GUI system for speech synthesis through graphical manipulation of spectrogramsA. M. Abdelatty Ali, G. Haentjens, O. Palmer, K. Pinnaduwage, Jan Van der Spiegel, Paul Mueller. 106-109 [doi]
- A built-in current monitor for testing analog circuit blocksSassan Tabatabaei, André Ivanov. 109-114 [doi]
- A novel QRDCL circuit for zero voltage switched inverterM. D. Bagewadi, B. G. Fernandes, R. V. S. Subrahmanyam. 109-112 [doi]
- Sampled-data modeling and analysis of closed-loop PWM DC-DC convertersChung-Chieh Fang, E. H. Abed. 110-115 [doi]
- A 4.1 kb/s hybrid speech coderM. R. Nakhai, Farrokh Marvasti. 110-113 [doi]
- Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activityPatrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, P. Teixeira, M. Santos. 110-113 [doi]
- VLSI circuits with fractal layout for spatial image decorrelationStefano Rovetta, Rodolfo Zunino. 110-113 [doi]
- Multi-mode impedance synthesis for subscriber line applicationsD. L. Youngblood. 113-116 [doi]
- Estimating head s measurements from front-view head and shoulders imagesAdnan M. Alattar, Sarah A. Rajala. 114-117 [doi]
- Test pattern generation for width compression in BISTPaulo F. Flores, Horácio C. Neto, K. Chakrabarty, João P. Marques Silva. 114-118 [doi]
- A variable-rate harmonic speech coder with efficient spectral quantizationEric W. M. Yu, Cheung-fat Chan. 114-117 [doi]
- A low-power CMOS frequency synthesizer design methodology for wireless applicationsA. M. Fahim, Mohamed I. Elmasry. 115-119 [doi]
- Feature tracking linear optic flow sensor chipK. T. Miller, G. L. Borrows. 116-119 [doi]
- Balancing Steiner minimum trees and shortest-path trees in the rectilinear planeGuo-Hui Lin, Guoliang Xue. 117-120 [doi]
- An acoustic-phonetic feature-based system for automatic phoneme recognition in continuous speechA. M. Abdelatty Ali, Jan Van der Spiegel, Paul Mueller, G. Haentjens, J. Berman. 118-121 [doi]
- Naturalness preserving transform for missing frame compensationM. A. Kohler, P. Yarlagadda. 118-122 [doi]
- Observing test response of embedded cores through surrounding logicP. K. Jaini, Nur A. Touba. 119-123 [doi]
- The current-feedback differential difference amplifier: new CMOS realization with rail to rail class-AB output stageSoliman A. Mahmoud, Ahmed M. Soliman. 120-123 [doi]
- Modified cellular neural network architecture for integrated image sensing and processingGail Erten, Fathi M. A. Salam. 120-123 [doi]
- Extracting nonplanar connections in a terminal-vertex graphE. Miuno, T. Abaashi, T. Watanabe. 121-124 [doi]
- An improvement of LPC based on noise reduction using pitch synchronous additionY. Kuroiwa, T. Shimamura. 122-125 [doi]
- A DWT-based encoder architecture for symmetrically extended imagesC. Chakrabarti. 123-126 [doi]
- A new concept for flash AD conversionD. M. W. Leenaerts. 124-127 [doi]
- CMOS drive circuit for opto-electronic readout of image sensorsW. B. Lawler. 124-127 [doi]
- Internal testing of integrated circuits by noncontact sampling electrostatic force microscopy using pulse width modulation techniqueR. A. Said. 124-128 [doi]
- The 1-Steiner tree problem in lambda-3 geometry planeGuo-Hui Lin, A. P. Thurber, Guoliang Xue. 125-128 [doi]
- A new predictive method for all-pole modelling of speech spectra with a compressed set of parametersSusanna Varho, Paavo Alku. 126-129 [doi]
- Very fast tracking and depth estimation by using focal plane compression sensorsTakayuki Hamamoto, Yasuhiro Ohtsuka, Kiyoharu Aizawa. 127-130 [doi]
- A fully integrated CMOS magnetic current monitorPiero Malcovati, Franco Maloberti. 128-131 [doi]
- A tunable, video-frequency, low-power, single-amplifier biquadratic filter in CMOSH. Schmid, George S. Moschytz. 128-131 [doi]
- VLSI implementation of a multicast ATM switchRobert C. Chang, Lung-Chih Kuo, Chih-Yuan Hsieh. 129-132 [doi]
- Structural properties for transformation of extended marked graphsK. Tsuji. 129-132 [doi]
- Design of a lower-error fixed-width multiplier for speech processing applicationLan-Da Van, Shuenn-Shyang Wang, Shing Tenqchen, Wu-Shiung Feng, Bor-Shenn Jeng. 130-133 [doi]
- Recovery of lost blocks by dynamic pixel interleavingVictor E. DeBrunner, Linda DeBrunner, Longji Wang. 131-134 [doi]
- A novel optical Bi-Cell with integrated readout circuitryLorenzo Gonzo, Massimo Gottardi, J.-Angelo Beraldin, Andrea Simoni. 132-135 [doi]
- The design of a 1 V, 40 MHz, current-mode sample-and-hold circuit with 10-bit linearityY. Sugimoto, S. Imai. 132-135 [doi]
- Design of a super-pipelined Viterbi decoderLihong Jia, Yonghong Gao, Jouni Isoaho, Hannu Tenhunen. 133-136 [doi]
- A topology-based method for identifying flip-flop graphs in BJT circuitsR. Vargas Bernal, A. Samtiento Reyes. 133-136 [doi]
- Convergence analysis of a new subband adaptive structure with critical samplingMariane R. Petraglia, Rogerio Guedes Alves, Paulo S. R. Diniz. 134-137 [doi]
- Visual location of license plates by vector quantizationRodolfo Zunino, Stefano Rovetta. 135-138 [doi]
- A 2 V 5th-order fully-differential CMOS Gm-C filter for wideband communicationC.-H. Liu, M. Ismail. 136-139 [doi]
- The design and fabrication of microfluidic flow sensorsA. Rasmussen, Mona E. Zaghloul. 136-139 [doi]
- A genetic algorithm for determining multiple routes and its applicationsJun Inagaki, Miki Haseyama, Hideo Kitajima. 137-140 [doi]
- Low power ACS unit design for the Viterbi decoder [CDMA wireless systems]Chi-Ying Tsui, R. S.-K. Cheng, C. Ling. 137-140 [doi]
- Prototype filter design for oversampled subband adaptive filtering structuresMariane R. Petraglia, P. R. V. Piber. 138-141 [doi]
- Removal of blocking and ringing artifacts using transform domain denoisingK. Eginzarian, Mika Helsingius, Pauli Kuosmanen, Jaakko Astola. 139-142 [doi]
- A 6 GHz, 1.8 V, divide-by-2 circuit implemented in silicon bipolar technologyC. Pala, G. Schuppener, M. Mokhtari. 140-143 [doi]
- A MOSFET bridge fluid biosensorLouiza Sellami, Robert W. Newcomb. 140-143 [doi]
- Graph-theoretic algorithms for image segmentationJ. Scanlon, N. Deo. 141-144 [doi]
- VLSI decoder architecture for embedded zerotree wavelet algorithmLi-minn Ang, Hon Nin Cheung, Kamran Eshraghian. 141-144 [doi]
- Adaptive minimax filtering via recursive optimal quadratic approximationsS. Gollamudi, Yih-Fang Huang. 142-145 [doi]
- Critical quantization decisions in transform coding and blocking artifactsSeyfullah H. Oguz, Truong Q. Nguyen, Yen Hen Hu. 143-146 [doi]
- Optimization of CMOS MEMS microwave power sensorsV. Milanovic, M. Hopcroft, C. A. Zincke, M. Gaitan, Mona E. Zaghloul. 144-147 [doi]
- Rail-to-rail operation of very low voltage CMOS switched-capacitor circuitsMohamed Dessouky, Andreas Kaiser. 144-147 [doi]
- A low power prototype for a 3D discrete wavelet transform processorGuoqing Zhang, M. Talley, Wael M. Badawy, Michael Weeks, Magdy A. Bayoumi. 145-148 [doi]
- Clustering to improve bi-partition quality and run timeGregory Tumbush, Dinesh Bhatia. 145-148 [doi]
- The Euclidean direction search algorithm for adaptive filteringGuo-Fang Xu, Tamal Bose, Jim Schroeder. 146-149 [doi]
- A novel interpolation scheme for quincunx-subsampled imagesChi-Man Lee, Bing Zeng. 147-150 [doi]
- A high speed camera system based on an image sensor in standard CMOS technologyNenad Stevanovic, Matthias Hillebrand, Bedrich J. Hosticka, Uri Iurgel, Andreas Teuner. 148-151 [doi]
- Compensation of nonideal effects in video-frequency sinc(x)-equalizers using tunable gm-C structureF. Dudek, Bashir M. Al-Hashimi, M. Moniri. 148-151 [doi]
- A new algorithm for computing the overall network reliabilityChen Liu, Mingde Dai, Xin-Yu Wu, Wai-Kai Chen. 149-152 [doi]
- Low power DCT implementation approach for VLSI DSP processorsS. Masupe, T. Arslan. 149-152 [doi]
- Rapid convergence in fault tolerant adaptive algorithmsRobert A. Soni, Kyle A. Gallivan, W. Kenneth Jenkins. 150-153 [doi]
- A maximum entropy Kalman filter for signal reconstructionA. David, Tyseer Aboulnasr. 151-154 [doi]
- Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesisLizhong Sun, Thierry Lepley, Franck Nozahic, Amaud Bellissant, Tad A. Kwasniewski, Bany Heim. 152-155 [doi]
- A telemetry and interface circuit for piezoelectric sensorsKavita Nair, Ramesh Harjani. 152-155 [doi]
- Cost-effective low-power architectures of video coding systemsJie Chen, K. J. Ray Liu. 153-156 [doi]
- Graph theoretic or computational geometric research of cellular mobile communicationsHiroshi Tamura, Masakazu Sengoku, Keisuke Nakano, Shoji Shinoda. 153-156 [doi]
- A study of the robustness of the M-Max NLMS adaptive algorithmK. Mayyas, Tyseer Aboulnasr, Taisir Eldos. 154-157 [doi]
- A stochastic model for correlated signal sources based on higher-order statisticsWolfgang Niehsen. 155-158 [doi]
- Implementation of a 2D motion vector detection on image sensor focal planeZheng Li, Kiyoharu Aizawa, Mitsutoshi Hatori. 156-159 [doi]
- Low-noise, low-distortion Gilbert current gain-cell and Gilbert cell transconductorPhanumas Khumsat, A. J. Payne. 156-159 [doi]
- Generalized shuffle-exchange digraphs: Hamiltonian propertiesHongfang Liu, D. Frank Hsu, S. Horiguchi. 157-160 [doi]
- Architecture of a hardware module for MPEG-4 shape decodingMladen Berekovic, K. Jacob, Peter Pirsch. 157-160 [doi]
- Simplification of stochastic fastest NLMS algorithmMasahiro Fukumoto, Hajime Kubota, Shigeo Tsujii. 158-161 [doi]
- Programmable 2D image filter for AER vision processingTeresa Serrano-Gotarredona, Andreas G. Andreou, Bernabé Linares-Barranco. 159-162 [doi]
- A single chip 200 MHz digital correlation system for laser spectroscopy with 512 correlation channelsM. Engels, Bernhard Hoppe, Hermann Meuth, R. Peters. 160-163 [doi]
- Design of a fully integrated 2 GHz CMOS frequency synthesizerR. Ahola, Kari Stadius, Kari Halonen. 160-163 [doi]
- A comparison of two alternative architectures of digital ratioed compressor design for inner product processingC.-C. Wang, C. J. Huang, P.-M. Lee. 161-164 [doi]
- Correct diagnosis of almost all faulty units in a multiprocessor systemKrishnaiyan Thulasiraman, Anindya Das, Kaiyuan Huang, Vinod K. Agarwal. 161-164 [doi]
- An adaptive projection pursuit filter for separating stationary interferences from nonstationary signalsTing Wai Siu, Sze-Fong Yau, Wai Kuen Lai. 162-165 [doi]
- Localization of wide-band signals via extended Kalman filterE. F. Sagiroglu. 163-166 [doi]
- A novel self-tuning pulse width modulator based on master-slave architecture for a Class D amplifierMeng Tong Tan, Joseph Sylvester Chang, Yit-Chow Tong. 164-167 [doi]
- Development of the hydrogen gas sensor for the nondestructive test evaluation (NDE) applicationEui-Jung Yun, Hyun-Joon Jin, Nho-Kyung Park. 164-167 [doi]
- On VLSI decompositions for deBruijn graphsT. Yamada, S. Imai, S. Ueno. 165-169 [doi]
- Power implications of precision limited arithmetic in floating point FIR filtersR. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili. 165-168 [doi]
- Statistical analysis of the FXLMS algorithm with a nonlinearity in the secondary-pathM. H. Costa, José Carlos M. Bermudez, Neil J. Bershad. 166-169 [doi]
- An invariance transformation technique for interpreting images obtained from unknown operational conditionsS. Mandayam, R. P. Ramachandran. 167-170 [doi]
- High-performance BiCMOS output buffer design strategiesP. Costa, Carlo Fiocchi, Umberto Gatti, Franco Maloberti. 168-171 [doi]
- The design of high-performance 128×128 CMOS image sensors using new current-readout techniquesYu-Chuan Shih, Chung-Yu Wu. 168-171 [doi]
- Board-level prototype validation: a built-in controller and extended BST architectureGustavo R. Alves, Tito G. B. Amaral, José M. M. Ferreira. 169-172 [doi]
- Geolocation for partially polarized electromagnetic sources using multiple sparsely and uniformly spaced spatially stretched vector sensors K. T. Wong. 170-174 [doi]
- A fast hypergraph minimum cut algorithmWai-Kei Mak, D. F. Wong. 170-173 [doi]
- Efficient computation of the ambiguity function and the Wigner distribution on arbitrary line segmentsAhmet Kemal Özdemir, Orhan Arikan. 171-174 [doi]
- A three-phase TMS320C30 DSP based resonant-commutated converterS. A. Chickamenahalli, S. Mahadevan, V. Nallaperumal. 172-175 [doi]
- A novel analog-digital flash converter architecture based on capacitive threshold gatesAlexandre Schmid, D. Bowler, R. Baumgartner, Yusuf Leblebici. 172-175 [doi]
- A novel approach to testing LUT-based FPGAsShyue-Kung Lu, Cheng-Wen Wu. 173-177 [doi]
- Enumerating the min-cuts for applications to graph extraction under size constraintsKengo R. Azegami, Atsushi Takahashi, Y. Kajitan. 174-177 [doi]
- A nonlinear technique for image contrast enhancement and sharpeningSean C. Matz, Rui J. P. de Figueiredo. 175-178 [doi]
- Analytical design of digital nonrecursive maximally flat fractional Hilbert transformerSoo-Chang Pei, Peng-Hua Wang. 175-178 [doi]
- Simple criteria to evaluate converter dynamics suitability for operation in active power factor correction systemsD. Shmilovitz, Dariusz Czarkowski, Zivan Zabar. 176-179 [doi]
- A quadrature output voltage controlled ring oscillator based on three-stage sub-feedback loopsLizhong Sun, Tad A. Kwasniewski, Kris Iniewski. 176-179 [doi]
- A fast algorithm for routability testingM. Sarrafzadeh, T. Takahashi. 178-181 [doi]
- A novel RTD-HEMT-RTD structure based on simulationsBin Zhang, K. J. Chen, Ruan Gang, Richard M. M. Chen. 178-181 [doi]
- Fast compression artifact reduction technique based on nonlinear filteringMei-Yin Shen, JongWon Kim, C. C. Jay Kuo. 179-182 [doi]
- Discrete fractional Hadamard transformSoo-Chang Pei, Min-Hung Yeh. 179-182 [doi]
- Low voltage mixer biasing using monolithic integrated transformer dc-couplingL. A. MacEachern, Eyad Abou-Allam, L. Wang, Tajinder Manku. 180-183 [doi]
- Harmonic analysis of PWM switching power converter state variable in steady-state operationS.-S. Qiu, Igor M. Filanovsky. 180-183 [doi]
- Grade of service Euclidean Steiner minimum treesGuoliang Xue, Guo-Hui Lin, Ding-Zhu Du. 182-185 [doi]
- A receiver for stardard IEEE 1596-1992 scalable coherent interfaceM. Fedeli, C. Vacchi. 182-185
- On the input output behavior of the Hilbert transformHolger Boche. 183-186 [doi]
- A multiresolution method for singular points detection in fingerprint imagesMarius Tico, Pauli Kuosmanen. 183-186 [doi]
- An antialiasing filter using complementary MOS transconductors biased in the triode regionD. Python, Christian C. Enz. 184-187 [doi]
- Generic analytical solution for calculating the harmonic characteristics of multilevel sinusoidal PWM inverterC. M. Wu, W. H. Lau, H. Chung. 184-187 [doi]
- Optimization-based calibration of a static timing analyzer to path delay measurementsJohn P. Fishburn. 186-189 [doi]
- A mixed-signal IC for a semi-implantable hearing aidP. J. Amantia, M. J. Kane, E. A. Kimball, S. L. Garverick. 186-189 [doi]
- A high-speed RSD adaptive filter architecture with a fast carry-free SPT converterHsiang-Feng Chi. 187-190 [doi]
- Fine tuning the GALE edge detection methodTimothy P. Donovan, Nelson L. Passos. 187-190 [doi]
- Modular graphing technique for small-signal low-frequency characterizations of PWM DC/DC regulatorsB. K. H. Wong, H. S. H. Chung. 188-191 [doi]
- Analog CMOS high-frequency continuous wavelet transform circuitE. W. Justh, F. J. Kub. 188-191 [doi]
- Signal waveform characterization in RLC treesYehea I. Ismail, Eby G. Friedman, José Luis Neves. 190-193 [doi]
- Digital I/Q demodulation and digital filtering for a DAB receiverE. Andre, G. Martel, P. Senn. 190-193 [doi]
- Blind source separation from hybrid mixture based on nonlinear InfoMax approachLuxi Yang, Ziyi Lu, Zhenya He, J. Cheung. 191-194 [doi]
- Sort-scan predictive vector quantization on multispectral satellite imagesYu-Jie Yang, Wen-Nung Lie. 191-194 [doi]
- Feedback control of paralleled symmetric systems, with applications to nonlinear dynamics of paralleled power convertersA. Garg, D. J. Perreault, George C. Verghese. 192-197 [doi]
- Clock jitter noise spectra in continuous-time delta-sigma modulatorsOmid Oliaei. 192-195 [doi]
- An implantable power and data receiver and neuro-stimulus chip for a retinal prosthesis systemMark Clements, Kasin Vichienchom, Wentai Liu, C. Hughes, E. McGucken, C. DeMarco, J. Mueller, Mark S. Humayun, E. De Juan, James D. Weiland, R. Greenberg. 194-197 [doi]
- A mixed frequency-time approach for quasi-periodic steady-state simulation of multi-level modeled circuitsJinghong Chen, Sung-Mo Kang. 194-197 [doi]
- Filtering heavy noised images using ICI rule for adaptive varying bandwidth selectionVladimir Katkovnik, Hakan Öktem, Karen Egiazarian. 195-198 [doi]
- A novel approach of adaptive feedback cancellation for hearing aidsHsiang-Feng Chi, Shawn X. Gao, Sigfrid D. Soli. 195-198 [doi]
- A 20-dB CMOS IF amplifier with embedded single-to-differential input converterGiovanni Palmisano, Salvatore Pennisi. 196-199 [doi]
- The VLSI implementation of a baseband receiver for DECT-based portable applicationsM. Perakis, A. E. Tzimas, E. G. Metaxakis, Dimitrios Soudris, G. A. Kalivas, C. Katis, Chrissavgi Dre, Constantinos E. Goutis, Adonios Thanailakis, Thanos Stouraitis. 198-201 [doi]
- A five-level neutral-point-clamped H-bridge PWM inverter with superior harmonics suppression: a theoretical analysisC. M. Wu, W. H. Lau, H. Chung. 198-201 [doi]
- An analytical, transistor-level energy model for SRAM-based cachesNikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos. 198-201 [doi]
- A comparison of fractal dimension algorithms using synthetic and experimental dataR. Esteller, George J. Vachtsevanos, J. R. Echauz, B. Lilt. 199-202 [doi]
- Adaptive segmentation of electroencephalographic data using a nonlinear energy operatorR. Agarwal, J. Gotman. 199-202 [doi]
- Programmable low-voltage continuous-time filter for audio applicationsAlberto Yufera, Adoración Rueda. 200-203 [doi]
- A frequency hopping synthesizer IC for IF and RF applicationsJuha Häkkinen, Timo Rahkonen, Juha Kostamovaara. 202-205 [doi]
- Development of switched-capacitor-based DC/DC converter with bi-directional power flowH. S. H. Chung, W. C. Chow. 202-205 [doi]
- Modeling of accumulation MOS capacitors for analog design in digital VLSI processesS. Pavan, Yannis P. Tsividis, K. Nagaraj. 202-205 [doi]
- Fast motion estimation algorithm and low-power CMOS motion estimation array LSI for MPEG-2 encodingT. Enomoto, Y. Sasajima, A. Hirobe, T. Ohsawa. 203-206 [doi]
- An FFT-based algorithm for multichannel blind deconvolutionMarcel Joho, Heinz Mathis, George S. Moschytz. 203-206 [doi]
- The linear time-varying approach applied to the design of a negative-feedback class-B output amplifierArie van Staveren, T. H. A. J. Cordenier, F. C. M. Kuijstermans, P. van der Kloet, F. L. Neerhoff, Chris J. M. Verhoeven, Arthur H. M. van Roermund. 204-207 [doi]
- Non-smooth continuation of periodic orbits in a chaotic buck converterGerard Olivar, Enric Fossas, Carles Batlle. 206-209 [doi]
- A complex polynomial predistorter chip in CMOS for baseband or IF linearization of RF power amplifiersE. Westesson, Lars Sundström. 206-209 [doi]
- An analytical source-and-drain series resistance model of quarter micron MOSFETs and its influence on circuit simulationE. Gondro, P. Klein, F. Schuler. 206-209 [doi]
- A novel closed-form azimuth/elevation angle and polarization estimation technique using only electric dipole triads or only magnetic loop triads with arbitrary unknown spacingsK. T. Wong. 207-210 [doi]
- A fast motion estimation algorithm for MPEG2 video using ripple-shaped searchYasuyuki Nakajima, Akio Yoneyama, Masaru Sugano, Hiromasa Yanagihara. 207-210 [doi]
- Bipolar, wideband, bias current sourceMartin Lantz, Henrik Floberg. 208-211 [doi]
- Accurate modeling of simultaneous switching noise in low voltage digital VLSISang Won Song, M. Ismail, Gyu Moon, Dong Yong Kim. 210-213 [doi]
- Integrated 1.2 um CMOS photodiodes, transimpedance amplifier, 12 bits A/D converter, and DSP interface for microinstrument applicationsWuping Chen, Hongwei Duan, S. H. Jones. 210-213 [doi]
- Development of DC/DC regulators based on switched-capacitor circuitsH. S. H. Chung. 210-213 [doi]
- Convergence properties of mixed-norm algorithms under general error criteriaTareq Y. Al-Naffouri, Azzedine Zerguine, M. Bettayeb. 211-214 [doi]
- Complexity reduction method for overlapped block motion compensation based on spatio-temporal correlationSeung Hwan Kim, Dong-Il Chang, Choong Woong Lee, Sang Uk Lee. 211-214 [doi]
- A very flexible BiCMOS low-voltage high-performance source followerCarlo Fiocchi, Umberto Gatti. 212-215 [doi]
- Temperature-driven power and timing analysis for CMOS ULSI circuitsYi-Kan Cheng, Sung-Mo Kang. 214-217 [doi]
- Influence of parasitic inductance on serial fixed type switched-capacitor transformerIchirou Oota, Noriaki Hara, Fumio Ueno. 214-217 [doi]
- A low-power minimum distance 1D-search engine using hybrid digital/analog circuit techniquesChang-Ki Kwon, Kwyro Lee. 214-217 [doi]
- Intrinsically stable adaptive recursive filtersPaolo Campolucci, A. Migliaccio, Francesco Piazza. 215-218 [doi]
- Polynomial search algorithms for motion estimationChung J. Kuo, Chia H. Yeh, Souheil F. Odeh. 215-218 [doi]
- A low distortion high frequency transconductor structureR. Ganti, L. R. Carley, Brad A. Myers. 216-219 [doi]
- Design and analysis of digital audio amplifier using ZVS PWM converterW. H. Lau, H. S. H. Chung, C. M. Wu, N. K. Poon. 218-221 [doi]
- A process independent ESD design methodologyJ. C. Bernier, G. D. Croft, W. R. Young. 218-221 [doi]
- Design-oriented substrate noise coupling macromodels for heavily doped CMOS processesAnil Samavedam, Kartikeya Mayaram, Terri S. Fiez. 218-221 [doi]
- A new architecture for computationally adaptive full-search block-matching motion estimationVasily G. Moshnyaga. 219-222 [doi]
- Transform domain adaptive Volterra filter algorithm based on constrained optimizationYuexian Zou, Shing-Chow Chan, Tung-Sang Ng. 219-222 [doi]
- A wide-range tunable bandpass filter cum sinusoidal oscillator using a new current-controlled resistorS. Kumar, A. Govil, A. Bhattacharyya, D. Dutta. 220-223 [doi]
- Statistical modeling of MOS transistor mismatch based on the parameters autocorrelation functionMassimo Conti, Paolo Crippa, Simone Orcioni, Claudio Turchetti. 222-225 [doi]
- A real-time realization of MPEG-4 video decoderLap-Pui Chau, Nam Ling, Gunnar Hovden, Hui Lan, Hon-Cheong Ng, Keng Pang Lim. 222-225 [doi]
- A single-stage power factor correction converter with soft-switching operationH. Wei, I. Batarseh. 222-225 [doi]
- Fast algorithms for signal subspace estimation with applications to DOA estimationH. A. Hasan, J. A. K. Hasan. 223-226 [doi]
- Improving rate and quality in MPEG 2 sequences using global motion informationLorenzo Favalli, Alessandro Mecocci. 223-226 [doi]
- High speed and high resolution WTA circuitSpiridon Vlassis, Stilianos Siskos. 224-227 [doi]
- Single-stage single-switch AC-DC power factor correction converter with low output voltage (3.3 V)H. Wei, G. Zhu, I. Batarseh, C. Iannello, P. Kornetzky. 226-229 [doi]
- Event-overlapping processing in current waveform simulationJ. H. Wang. 226-229 [doi]
- CMOS Pass-gate No-race Charge-recycling Logic (CPNCL)Seung-Moon Yoo, Sung-Mo Kang. 226-229 [doi]
- The performance of simplified CGM-BOPA in noisy environment [adaptive processing]M. Okamoto, Y. Nishikawa, T. Furukawa. 227-230 [doi]
- Multi-level successive elimination algorithm for motion estimation in video codingX. Q. Gao, C. J. Duanmu, C. R. Zou, Z. Y. He. 227-230 [doi]
- A current-mode implementation of a traveling wave amplifier model similar to the cochleaTodd Hinck, Z. Yang, Q. Zhang, Allyn E. Hubbard. 228-231 [doi]
- A novel software architecture for computer-aided analysis of circuits with uncertain parametersMassimo De Santo, Nicola Femia, Giovanni Spagnuolo, F. Arcelli. 230-233 [doi]
- A Low-Voltage High-Performance Differential Static Logic (LVDSL) familyA. M. Fahim, Mohamed I. Elmasry. 230-233 [doi]
- Modeling and parameter extraction technique for high-voltage MOS deviceT. Myono, E. Nishibe, S. Kikuchi, K. Iwatsu, T. Suzuki, Y. Sasaki, K. Itoh, H. Kobayashi. 230-233 [doi]
- A nonlinear equalizer based on estimation of RBF s centersM. Mimura, T. Fukukawa. 231-234 [doi]
- Fast motion estimation using modified circular zonal searchAlexis M. Tourapis, Oscar C. Au. 231-234 [doi]
- Semi-parallel rank-order filtering in analog VLSIR. Kalim, D. M. Wilson. 232-235 [doi]
- A new switched-capacitor dc-dc converter with improved line and load regulationsG. Zhu, H. Wei, I. Batarseh, Adrian Ioinovici. 234-237 [doi]
- Low voltage swing gates for low power consumptionAbdoul Rjoub, Odysseas G. Koufopavlou. 234-237 [doi]
- CMOS gate modeling based on equivalent inverterAlexander Chatzigeorgiou, Spiridon Nikolaidis, Ioannis Tsoukalas, Odysseas G. Koufopavlou. 234-237 [doi]
- Syntax and discontinuity based error concealmentWilliam E. Lynch, V. Papadakis, R. Krishnamurthy, Tho Le-Ngoc. 235-238 [doi]
- Blind identification of second-order statistics using periodic Toeplitz systemY. Kitaoka, T. Furukawa, K. Urahama. 235-238 [doi]
- Synthesis of multiple-input translinear element networksBradley A. Minch, Paul E. Hasler, Chris Diorio. 236-239 [doi]
- H:::infty::: control of DC-to-DC switching convertersEnric Vidal-Idiarte, Luis Martinez-Salamero, H. Valderrama, Francesc Guinjoan. 238-241 [doi]
- Compact modeling of interconnect and substrate coupling at GHz frequenciesR. Lowther. 238-241 [doi]
- Novel high positive and negative pumping circuits for low supply voltageHongchin Lin, Kai-Hsun Chang, Shyh-Chyi Wong. 238-241 [doi]
- Modeling performance of the two dimensional frequency domain least squares algorithm in airborne surveillance radar applicationsQingwen Zhang, J. R. Roman, D. W. Davis, Wasfy B. Mikhael. 239-242 [doi]
- Receiver-based congestion control mechanism for Internet video transmissionYon Jun Chung, Young-Gook Kim, JongWon Kim, C. C. Jay Kuo. 239-242 [doi]
- A wide linear range four quadrant multiplier in subthreshold CMOSAlberto Pesavento, Christof Koch. 240-243 [doi]
- Multi-point multi-port reduction of high-speed distributed interconnects using Krylov-space techniquesPavan K. Gunupudi, Michel S. Nakhla, Ramachandra Achar. 242-245 [doi]
- Sliding mode control of a boost-buck converter for AC signal tracking taskDomingo Biel, Enric Fossas, Francesc Guinjoan, R. Ramos. 242-245 [doi]
- A universal CMOS voltage interface circuitRadu M. Secareanu, Eby G. Friedman, Juan Becerra, Scott Warner. 242-245 [doi]
- Signal subspace approximation with applications to system identificationM. A. Hasan, A. A. Hasan. 243-246 [doi]
- A fast motion vector composition method for temporal transcodingJeongnam Youn, Ming-Ting Sun. 243-246 [doi]
- Bounding of thermal Sigma-Delta modulators output for sensorsM. Dominguez, L. Castaner. 244-247 [doi]
- DC and AC analysis of buck PWM DC-DC converter with peak-voltage-modulation feedforward controlMarian K. Kazimierczuk, A. J. Edstrom. 246-249 [doi]
- A new approach to analyze interconnect delays in RC wire modelsZhong-Fang Jin, J.-J. Laurin, Yvon Savaria, P. Garon. 246-249 [doi]
- Power reduction through iterative gate sizing and voltage scalingChingwei Yeh, Min-Cheng Chang, Shih-Chieh Chang, Wen-Ben Jone. 246-249 [doi]
- A digital watermark method using the wavelet transform for video dataHisashi Inoue, Akio Miyazaki, T. Araki, Takashi Katsura. 247-250 [doi]
- Reduction of errors in blind identification of FIR systems under order overestimationY. J. Park, B. C. Ihm, D. J. Park. 247-250 [doi]
- Bulk compensated CMOS squaring circuitsP. K. Chan, L. S. Ng, L. Siek, M. S. Tse, J. Y. Ong, K. S. Lok. 248-251 [doi]
- A reduced-order scheme for coupled lumped-distributed interconnect simulationNinglong Lu, Ibrahim N. Hajj. 250-253 [doi]
- Memory exploration for low power embedded systemsWen-Tsong Shiue, Chaitali Chakrabarti. 250-253 [doi]
- Feedforward control with reference voltage modulationMarian K. Kazimierczuk, A. Massarini, M. A. Izadi. 250-253 [doi]
- Convergence analysis results for the class of affine projection algorithmsS. G. Sankaran, Aloysius A. Beex. 251-254 [doi]
- Joint transcoding of multiple MPEG video bitstreamsHani Sorial, William E. Lynch, André Vincent. 251-254 [doi]
- Design and implementation of a CMOS power feedback linearization IC for RF power amplifiersBo Shi, Lars Sundström. 252-255 [doi]
- A new high-speed/low-power dynamic CMOS logic and its application to the design of an AOI-type ROMChing-Rong Chang, Jinn-Shyan Wang. 254-257 [doi]
- Methodology of layout based schematic and its usage in efficient high performance CMOS designFenghao Mu, Christer Svensson. 254-257 [doi]
- Dynamic model of PWM zero-voltage-transition DC-DC boost converterYefim Berkovich, Adrian Ioinovici. 254-257 [doi]
- Automatic detection of fade-in and fade-out in video sequencesWarnakulasuriya Anil Chandana Fernando, Cedric Nishan Canagarajah, David R. Bull. 255-258 [doi]
- Adaptively-fit, space-variant point spread function model for a spherical lens optical systemThomas P. Costello, Wasfy B. Mikhael. 255-258 [doi]
- A CMOS RMS-to-DC converter using /Sigma/Delta multiplier-dividerWei-Shinn Wey, Yu-Chung Huang. 256-258 [doi]
- A new approach to avoid walk error in pulsed laser rangefindingP. Palojarvi, T. Ruotsalainen, Juha Kostamovaara. 258-261 [doi]
- Large-signal simulation of a distributed power supply system with power factor correctionG. Zhu, H. Wei, C. Iannello, I. Batarseh. 258-261 [doi]
- An automatic clock tree design system for high-speed VLSI designs: planar clock routing with the treatment of obstaclesHaksu Kim, Dian Zhou. 258-261 [doi]
- A fast decomposition of banded symmetric Toeplitz matrices for parallel processingW. Xiong, J. Li, Richard M. M. Chen, S. Qian. 259-262 [doi]
- Hybrid inverse halftoning using adaptive filteringOscar C. Au, Ming Sun Fu, Peter H. W. Wong, Justy W. C. Wong, Zihua Guo. 259-262 [doi]
- An efficient RF power transfer and bidirectional data transmission to implantable electronic devicesAbdelouahab Djemouai, Mohamad Sawan, Mustapha Slamani. 259-262 [doi]
- Sliding orbits and double spiral bifurcation diagrams in power electronic DC/DC convertersMario di Bernardo, A. R. Champneys, Chris J. Budd, Francesco Vasca. 262-265 [doi]
- PIN count prediction in ratio cut partitioning for VLSI and ULSID. Stroobannt. 262-265 [doi]
- Analysis and suppression of unnecessary transitions in weakly complementary MOS logic networks for low powerM. Kaneko. 262-265 [doi]
- Improved current-feedback op-amp with good DC and CMRR performanceKhaled Hayatleh, W. J. Su, F. J. Lidgey. 263-266 [doi]
- Design of nonlinear-phase FIR digital filters: a semidefinite programming approachW.-S. Lu. 263-266 [doi]
- An error diffusion technique with reduced directional hysteresisYuk-Hee Chan, H. T. Kwong, K. T. Lo, C. K. Li. 263-266 [doi]
- Power consumption of a 2 s complement adder minimized by effective dynamic data rangesR. R.-B. Sheen, S. Wang, Oscal T.-C. Chen, Ruey-Liang Ma. 266-269 [doi]
- A study of synchronization in chaotic autonomous Cuk convertersHerbert H. C. Iu, C. K. Tse. 266-269 [doi]
- Efficient synthesis technique of time-domain models for interconnects having 3-D structures based on FDTD methodT. Watanabe, H. Asai. 266-269 [doi]
- A new approach for weighted least-square design of FIR filtersWei-Ping Zhu, M. Omair Ahmad, M. N. S. Swamy. 267-270 [doi]
- High output impedance current-mode multifunction filter using FTFNsAli Toker, Serdar Özoguz, Oguzhan Cicekoglu. 267-269 [doi]
- Modeling of layered video for low-bit-rate video conferencing applicationsR. E. Parker Jr., M. Tummala. 267-270 [doi]
- On dynamic range limitations of CMOS current conveyorsErik Bruun. 270-273 [doi]
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- Bidirectional buffer for mixed voltage applicationsHwang-Cherng Chow. 270-273 [doi]
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- A VLSI chip for wavelet image compressionM. Schwarzenberg, M. Traber, M. Scholles, René Schüffny. 271-274 [doi]
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- Current-balanced logic for mixed-signal IC sEdgar F. M. Albuquerque, Manuel M. Silva. 274-277 [doi]
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- Reliability driven module generation for analog layoutsMarkus Wolf, Ulrich Kleine. 412-415 [doi]
- A chaotic network based on intermittently coupled capacitorsF. Komatsu, Hiroyuki Torikai, Toshimichi Saito. 414-417 [doi]
- A 230 MHz 8 tap programmable FIR filter using redundant binary number systemSung-Ho Baik, Kyung-Nam Han, E. Yoon. 415-418 [doi]
- Multicarrier QAM modulatorJouko Vankka, Marko Kosunen, Kari Halonen. 415-418 [doi]
- Methodology for analog technology porting including performance tuningKenneth Francken, Georges G. E. Gielen. 415-418 [doi]
- Floating gate analog memory for parameter and variable storage in a learning silicon neuronPhilipp Häfliger, C. Rasche. 416-419 [doi]
- A cell selection strategy for low power applicationsChingwei Yeh, Chin-Chao Chang, Jinn-Shyan Wang. 416-419 [doi]
- A 4-D chaotic oscillator with a hysteresis 2-port VCCS: the first example of chaotic oscillators consisting of 2-port VCCSs and capacitorsM. Kataoka, T. Saito. 418-421 [doi]
- Implementation of maximally fast ladder wave digital filters using a numerically equivalent state-space representationOscar Gustafsson, Lars Wanhammar. 419-422 [doi]
- An efficient method for parametric yield gradient estimationTing Wu, Say Wei Foo. 419-422 [doi]
- Performance improvement in a binary phase comparator type PLL frequency synthesizerS. Obote, Y. Sumi, N. Kitai, Y. Fukui, Y. Itoh. 419-422 [doi]
- A 640 mW high accuracy 8-bit 1 GHz flash ADC encoderR. Kanan, F. Kaess, Michel J. Declercq. 420-423 [doi]
- Low power synthesis of sum-of-product computation in DSP algorithmsKostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis. 420-423 [doi]
- Analysis of chaotic wandering of phase patterns in a two-dimensional coupled chaotic circuits networkYoshifumi Nishio, Akio Ushida. 422-425 [doi]
- A wavelet packet algorithm for 1D data with no block end effectsB. Leslie, M. Sandler. 423-426 [doi]
- On finite-precision implementation of a decoder for turbo codesJah-Ming Hsu, Chin-Liang Wang. 423-426 [doi]
- A new bus assignment in a designed shared bus switch fabricD. Torres, J. Gonzalez, M. Guzman, L. Nunez. 423-426 [doi]
- An analog VLSI decoding technique for digital codesFelix Lustenberger, Markus Helfenstein, Hans-Andrea Loeliger, Felix Tarköy, George S. Moschytz. 424-427 [doi]
- Design of experiments in CAD: context and new data sets for ISCAS 99Franc Brglez, Rolf Drechsler. 424-427 [doi]
- On-off intermittency from a mutually coupled phase-locked loopT. Endo, M. Endo. 426-429 [doi]
- Theory and design of causal stable IIR PR cosine-modulated filter banksJ. S. Mao, Shing-Chow Chan, Ka-Leung Ho. 427-430 [doi]
- Routing chip based on a modified trie for ATM, IP and EthernetD. Torres, A. Larios, M. Guzman. 427-430 [doi]
- Complementary code keying for RAKE-based indoor wireless communicationK. Halford, S. Halford, M. Webster, Carl Andren. 427-430 [doi]
- Equivalence classes of clone circuits for physical-design benchmarkingMichael D. Hutton, Jonathan Rose. 428-431 [doi]
- High-speed interfaces for analog, iterative VLSI decodersMarkus Helfenstein, Felix Lustenberger, A. Loeliger, Felix Tarköy, George S. Moschytz. 428-431 [doi]
- Extinction and intermittency of the chaotic attractor in phase-locked loop equation with periodic external forcing termW. Ohno, T. Endo. 430-433 [doi]
- Tensor-product wavelet vs. Mallat decomposition: a comparative analysisCarolyn Pe Rosiene, Truong Q. Nguyen. 431-434 [doi]
- A mixed-signal behavioral level implementation of 1000BASE-X physical layer for gigabit EthernetHuimin Xia, K. Bataineh, M. Hassoun, J. Kryzak. 431-434 [doi]
- A novel high gain, high bandwidth CMOS differential front-end for wireless optical systemsE. de Vasconcelos, J. L. Cura, Rui L. Aguiar, Dinis M. Santos. 431-434 [doi]
- An area-efficient analog VLSI architecture for state-parallel Viterbi decodingKai He, Gert Cauwenberghs. 432-435 [doi]
- Equivalence classes of circuit mutants for experimental designDebabrata Ghosh, Franc Brglez. 432-435 [doi]
- A 1.2 GHz CMOS quadrature self-oscillating mixerMichael B. Bendak, Baernard A. Xavier, Paul M. Chau. 434-437 [doi]
- Realization of a programmable rank-order filter architecture using capacitive threshold logic gatesIlhan Hatirnaz, Frank K. Gürkaynak, Yusuf Leblebici. 435-438 [doi]
- Coefficient quantization error recoveryJ. I. Suarez, C. S. Lindquist. 435-438 [doi]
- A comparison of two adaptive equalizers: DFE and ACEInseop Lee, W. Kenneth Jenkins. 435-437 [doi]
- Functional yield enhancement and statistical design of a low power transconductorTuna B. Tarim, Mohammed Ismail. 436-439 [doi]
- Creating hard problem instances in logic synthesis using exact minimizationWolfgang Günther, Rolf Drechsler. 436-439 [doi]
- Switched-capacitor multi-internal-state chaotic neuron circuit with unipolar and bipolar output functionsYoshihiko Horio, I. Kobayashi, M. Kawakami, H. Hayashi, Kazuyuki Aihara. 438-441 [doi]
- A necessary condition for Schur stability of 2D polynomials [digital filters]Yang Xiao, Rolf Unbehauen, Xiyu Du. 439-442 [doi]
- The implementation of object-based shot boundary detection using edge tracing and trackingW. J. Heng, K. N. Ngan. 439-442 [doi]
- A chip design of radix-4/2 64b/32b signed and unsigned integer divider using Compass cell libraryC.-C. Wang, C. J. Huang, G.-C. Lin. 439-442 [doi]
- User-configurable experimental design flows on the web: the ISCAS 99 experimentsHemang Lavana, Franc Brglez, Robert B. Reese. 440-443 [doi]
- Design of a 1.5 V CMOS integrated 3 GHz LNAR. A. Rafla, Mourad N. El-Gamal. 440-443 [doi]
- CMOS cryptosystem using a Lorenz chaotic oscillatorO. A. Gonzalez, Gunhee Han, José Pineda de Gyvez, Edgar Sánchez-Sinencio. 442-445 [doi]
- Direction finding for multiuser correlated signals based on spatial signature estimation in cyclic cumulant domainMinli Yao, Yilin Wang, Qinye Yin. 443-446 [doi]
- An efficient algorithm for the design of lattice wave digital filters with short coefficient wordlengthJuha Yli-Kaakinen, Tapio Saramäki. 443-448 [doi]
- Development of a high performance TSPC library for implementation of large digital building blocksB. Le Chapelain, A. Mechain, Yvon Savaria, Guy Bois. 443-446 [doi]
- Evaluating iterative improvement heuristics for bigraph crossing minimizationMatthias F. M. Stallmann, Franc Brglez, Debabrata Ghosh. 444-447 [doi]
- Fault modeling and fault sampling for isolating faults in analog and mixed-signal circuitsS. Chakrabarti, A. Chatterjee. 444-447 [doi]
- Noise reduction methods for chaotic communication schemesA. Kisel, Hervé Dedieu, Maciej Ogorzalek. 446-449 [doi]
- A self-sensing tristate pad driver for control signals of multiple bus controllersLouis Luh, John Choma Jr., Jeffrey T. Draper. 447-450 [doi]
- 3D wavelet video codec and its rate control in ATM networkGang Lin, Zemin Liu. 447-450 [doi]
- A novel concurrent fault simulation method for mixed-signal circuitsJunwei Hou, William H. Kao, Abhijit Chatterjee. 448-451 [doi]
- Applications of clone circuits to issues in physical-designMichael D. Hutton, Jonathan Rose. 448-451 [doi]
- Use of the Remez algorithm for designing FIR filters utilizing the frequency-response masking approachTapio Saramäki, Yong Ching Lim. 449-455 [doi]
- Maximal cycle length of pseudochaotic sequences generated by piecewise linear mapsM. Jessa. 450-453 [doi]
- Signal selective 2-D direction finding for non-Gaussian cyclostationary sourcesMinli Yao, Qinye Yin. 451-454 [doi]
- Novel high-radix residue number system multipliers and addersVassilis Paliouras, Thanos Stouraitis. 451-454 [doi]
- Mirror, mirror, on the wall...is the new release any different at all? [BDDs]Justin E. Harlow III, Franc Brglez. 452-455 [doi]
- A 14-b, 125 MSPS digital-to-analog converter and bandgap voltage reference in 0.5 um CMOSB. J. Tesch, P. M. Pratt, K. Bacrania, M. Sanchez. 452-455 [doi]
- Chaotic generation of PN sequences: a VLSI implementationA. Dornbusch, José Pineda de Gyvez. 454-457 [doi]
- A high-speed constant-factor redundant CORDIC processor without extra correcting or scaling iterationsShen-Fu Hsiao. 455-458 [doi]
- A standard target decoder model for MPEG-4 FlexMux streamsA. Ramaswamy. 455-458 [doi]
- Class AB technique for high performance switched-current memory cellsApisak Worapishet, John B. Hughes, Christofer Toumazou. 456-459 [doi]
- Methodology and technology for virtual component driven hardware/software co-design on the system-levelS. J. Krolikoski, Frank Schirrmeister, B. Salefski, J. Rowson, Grant Martin. 456-459 [doi]
- Design and implementation of narrow-band linear-phase FIR filters with piecewise polynomial impulse responseTapio Saramäki, S. K. Mitra. 456-461 [doi]
- Synchronization and anti-synchronization of Chua s oscillators via a piecewise linear coupling circuitD. A. Miller, K. L. Kowalski, A. Lozowski. 458-462 [doi]
- New multiresolution motion estimation and compensation schemeJayashree Karlekar, Uday B. Desai. 459-462 [doi]
- New high radix maximally-redundant signed digit adderM. C. Mekhallalati, M. K. Ibrahim. 459-462 [doi]
- Cost-effective co-verification using RTL-accurate C modelsP. P. Jain. 460-463 [doi]
- Error neutralisation in switched current memory cellsJohn B. Hughes, Kenneth W. Moulding. 460-463 [doi]
- Bipolar merged arithmetic for wavelet architecturesGwangwoo Choe, Earl E. Swartzlander Jr.. 462-465 [doi]
- Decoder-driven switching matrices in multicontext FPGAs: area reduction and their effect on routabilityVicente Baena Lecuyer, M. A. Aguirre, Antonio B. Torralba, Leopoldo García Franquelo, Julio Faura. 463-466 [doi]
- A chaotic CMOS true-random analog/digital white noise generatorSantina Rocchi, Valerio Vignoli. 463-466 [doi]
- Synchronization scheme in non-coherent demodulator for TDMA digital mobile radio systemDer-Zheng Liu, Che-Ho Wei. 463-466 [doi]
- Towards systems integration in a virtual environment: small steps, big results, and complications to come for embedded systems engineering in the next millenniumG. J. Bunza. 464-467 [doi]
- Error neutralised switched-current comparatorApisak Worapishet, John B. Hughes, Christofer Toumazou. 464-467 [doi]
- Lost transform domain data concealment in GenLOT based codersSeyfullah H. Oguz, Truong Q. Nguyen, Yu Hen Hu. 466-469 [doi]
- Statistical analysis and design of chaotic switched dynamical systemsAlexander L. Baranovski, Wolfgang M. Schwarz, Andreas Mögel. 467-470 [doi]
- Adaptive multi-channel prediction for lossless scalable codingShinji Fukuma, Masahiro Iwahashi, Noriyoshi Kambayashi. 467-470 [doi]
- A design of the new FPGA with data path logic and run time block reconfiguration methodJaeyoung Kwak, Sang-Sic Yoon, Hung-Jun Kwon, Kwyro Lee. 467-469 [doi]
- Designing system on a chip products using systems engineering toolsGraham R. Hellestrand. 468-473 [doi]
- Pseudo-N-path cells for switched-current signal processingA. E. J. Ng, John I. Sewell. 468-471 [doi]
- Low-power distributed arithmetic architectures using nonuniform memory partitioningSumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj. 470-473 [doi]
- PARC: a new pyramidal FPGA architecture based on a RISC processorC. E. Rabel, Mohamad Sawan. 470-473 [doi]
- A method of inserting binary data into MPEG bitstreamsHitoshi Kiya, Yoshihiro Noguchi, Ayuko Takagi, Hiroyuki Kobayashi. 471-474 [doi]
- Probability distribution of the switching intervals in chaotic pulse streams-a comparative studyT. Tsubone, T. Saito, Wolfgang M. Schwarz. 471-474 [doi]
- A programmable low voltage switched-current FIR filterFathi A. Farag, Carlos Galup-Montoro, Márcio C. Schneider. 472-475 [doi]
- A routability and performance driven technology mapping algorithm for LUT based FPGA designsChi-Chou Kao, Yen-Tai Lai. 474-477 [doi]
- Co-verification as risk management: minimizing the risk of incorporating a new processor in your next embedded system designJ. Kenney. 474-477 [doi]
- RAM-based programmable stack filter implementationM. Hu, Olli Vainio, Jaakko Astola, Karen Egiazarian, David Z. Gevorkian. 474-477 [doi]
- Various impulsive synchronous patterns from mutually coupled ISC chaotic oscillatorsH. Nakano, T. Saito, K. Mitsubori. 475-478 [doi]
- Enhanced versions of DCSK and FM-DCSK data transmission systemsGéza Kolumbán, Z. Jako, Michael Peter Kennedy. 475-478 [doi]
- Non-ideal quantization noise shaping in switched-current bandpass Sigma-Delta modulatorsJosé Manuel de la Rosa, Maria Belen Pérez-Verdú, Rocio del Río, Ángel Rodríguez-Vázquez. 476-479 [doi]
- Mixed arithmetic architecture: a solution to the iteration bound for resource efficient FPGA and CPLD recursive digital filtersJ. Living, Bashir M. Al-Hashimi. 478-481 [doi]
- Grouped-moduli residue number systems for fast signal processingAlexander Skavantzos, Thanos Stouraitis. 478-483 [doi]
- Advanced instrument controller ASICS. Davis, J. Braatz, J. Clement, D. Honda. 478-480 [doi]
- Self-organisation in arrays of nonlinear systems induced by chaotic perturbation: An experimental approachPaolo Arena, Luigi Fortuna, Domenico Porto, Alessandro Rizzo. 479-482 [doi]
- A lossless image coder with context-based minimizing MSE prediction and entropy codingMusik Kwon, HyoJoon Kim, Choong Woong Lee, Sang Uk Lee. 479-482 [doi]
- Sensitivity and error reduction by component swapping in switched-current filtersAntônio Carlos M. de Queiroz, Jones Schechtman. 480-483 [doi]
- A modular digital VLSI architecture for stereo depth estimation in industrial applicationsAndrea Alimonda, Salvatore Carta, Luigi Raffo. 481-484 [doi]
- Fast FPGA-based pipelined digit-serial/parallel multipliersJavier Valls, T. Sansaloni, M. M. Peiro, Eduardo I. Boemo. 482-485 [doi]
- On the realization of n-scroll attractorsMustak E. Yalcin, Johan A. K. Suykens, Joos Vandewalle. 483-486 [doi]
- Impact of ATM traffic control on MPEG-2 video qualityJiayi Gu, M. Jurczyk, Chang Wen Chen. 483-486 [doi]
- Numerically stable fast sequential calculation for projection approximation subspace trackingJ. Lee, Kyung-Bin Bae. 484-487 [doi]
- Bilinear transformed switched-current ladder interpolatorsA. E. J. Ng, John I. Sewell. 484-487 [doi]
- A new ASIC for washer controllerGyung-Hae Han, Hwa-Young Yi, Bum-Suk Go, Dong-Geun Lee, In-Haeng Cho, Dong-Il Oh. 485-488 [doi]
- RNS implementation of FIR filters based on distributed arithmetic using field-programmable logicAntonio García, Uwe Meyer-Bäse, Antonio Lloris-Ruíz, Fred J. Taylor. 486-489 [doi]
- Chaotic itinerancy phenomena on coupled n-double scrolls chaotic circuitsM. Wada, Yoshifumi Nishio, Akio Ushida. 487-490 [doi]
- Robust video segmentation employing variable bandwidth object boundaryJu Guo, JongWon Kim, C. C. Jay Kuo. 487-490 [doi]
- Circuit design technologies for high-speed lightwave communications beyond 40 Gbit/sS. Kimura, T. Otsuji, H. Kikuchi, K. Murata, E. Sano. 488-491 [doi]
- Improving performance of high precision signal processing algorithms on programmable DSPsM. N. Mahesh, Mahesh Mehendale. 488-491 [doi]
- An IC for closed-loop control of a micromotor with an electrostatically levitated rotorD. J. Alladi, M. L. Nagy, S. L. Gaverick. 489-492 [doi]
- Parallel modular multiplication with application to VLSI RSA implementationWilliam L. Freking, Keshab K. Parhi. 490-495 [doi]
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- Motion-compensated frame interpolation scheme for H.263 codecTien-Ying Kuo, JongWon Kim, C. C. Jay Kuo. 491-494 [doi]
- Dynamic trellis diagrams for optimized DSP code generationStefan Fröhlich, Martin Gotschlich, Udo Krebelder, B. Wess. 492-495 [doi]
- SiGe circuits for high bit-rate optical transmission systemsB. Wedding, Werner Pohlmann, D. Schlump, E. Schlag, R. Ballentin. 492-495 [doi]
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- Robust encoding of 3D mesh using data partitioningZhidong Yan, Sunil Kumar, Jiankun Li, C. C. Jay Kuo. 495-498 [doi]
- Phase-jitter dynamics in second-order DPLLs with irrational and integer input frequenciesAlexey Teplinsky, Orla Feely. 495-498 [doi]
- Design of high speed bipolar Si/SiGe ICs for optical wide band communicationsT. Baumheinrich, U. Langmann. 496-499 [doi]
- An efficient VLSI architecture for RSA public-key cryptosystemJen-Shiun Chiang, Jian-Kao Chen. 496-499 [doi]
- Memory address allocation method for a indirect addressing DSP with consideration of modification in local computational orderNobuhiko Sugino, H. Funaki, Akinori Nishihara. 496-499 [doi]
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- Distortion analysis of periodically switched nonlinear circuitsFei Yuan, Ajoy Opal. 499-502 [doi]
- A novel system architecture for real-time low-level visionArrigo Benedetti, Pietro Perona. 500-503 [doi]
- Ultra high frequency integrated circuits using transferred substrate heterojunction bipolar transistorsM. Rodwell, Q. Lee, D. Mensa, J. Guthrie, Y. Betser, S. C. Martin, R. P. Smith, S. Jaganathan, T. Mathew, P. Krishnan, C. Serhan, S. Long. 500-503 [doi]
- A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystemChe-Han Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu, Jia-Lin Sheu. 500-503 [doi]
- A dedicated hardware system for CNN stereo visionM. Salerno, F. Sargeni, V. Bonaiuto, Sergio Taraglio, Andrea Zanela. 501-504 [doi]
- Asymptotical optimality of DFT based DMT transceiversYuan-Pei Lin, See-May Phoong. 503-506 [doi]
- A numerical algorithm for computing Neimark-Sacker bifurcation parametersTetsushi Ueta, Guangrong Chen, Tetsuya Yoshinaga, Hiroshi Kawakami. 503-506 [doi]
- Analytic derivation of the performance degradation in recursive implementation of sliding-DFT with the twiddle factors of finite-bit precisionJae-Hwa Kim, Tae-Gyu Chang. 504-507 [doi]
- Design and implementation of an RSA public-key cryptosystemJyh-Huei Guo, Chin-Liang Wang, Hung-Chih Hu. 504-507 [doi]
- InP HBT circuits for high speed ETDM systemsP. Andre, N. Kauffmann, P. Desrousseaux, J. Godin, A. Konczykowska. 504-507 [doi]
- A new compact neuron-bipolar cellular neural network structure with adjustable neighborhood layers and high integration levelWen-Cheng Yen, Chung-Yu Wu. 505-508 [doi]
- Volterra kernels description using piecewise linear functionsM. Padin, P. Julian, L. Castro, A. Desages. 507-510 [doi]
- 2D angle and array response estimation with arbitrary array configurationLiang Jin, Minli Yao, Qinye Yin. 507-510 [doi]
- Low-complexity modified Mastrovito multipliers over finite fields GF(2M)Leilei Song, Keshab K. Parhi. 508-512 [doi]
- Bit-rate transparent electronic data regeneration in repeaters for high speed lightwave communication systemsM. Mokhtari, A. Ladjemi, U. Westergren, L. Thylen. 508-511 [doi]
- The best basis problem, compaction problem and PCFB design problems [filter banks]Sony Akkarakaran, P. P. Vaidyanathan. 508-511 [doi]
- Hardware implementation of a nonlinear processorV. K. Jain, S. Shrivastava, A. D. Snider, D. Damerow, D. Chester. 509-514 [doi]
- Region and time based unequal error protection for video transmission over mobile linksSang-ug Kang, Kook-yeol Yoo. 511-514 [doi]
- Orthonormal high level canonical PWL functionsP. Julian, A. Desages, B. D Amico. 511-514 [doi]
- On optimization of filter banks with denoising applicationsSony Akkarakaran, P. P. Vaidyanathan. 512-515 [doi]
- Globally asynchronous locally synchronous architecture for large high-performance ASICsThomas Meincke, Ahmed Hemani, Shashi Kumar, Peeter Ellervee, Johnny Öberg, Thomas Olsson, Peter Nilsson, Dan Lindqvist, Hannu Tenhunen. 512-515 [doi]
- A low complexity Reed-Solomon architecture using the Euclid s algorithmHyunman Chang, Myung Hoon Sunwoo. 513-516 [doi]
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- Notes on representation theorems for linear discrete-space systemsIrwin W. Sandberg. 515-518 [doi]
- High speed interface for system-on-chip design by self-tested self-synchronizationFenghao Mu, Christer Svensson. 516-519 [doi]
- PLT versus KLT [transforms]See-May Phoong, Yuan-Pei Lin. 516-519 [doi]
- An area-efficient versatile Reed-Solomon decoder for ADSLJin-Chuan Huang, Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu. 517-520 [doi]
- A simple method to determine observable islands for state estimationB. Gou, A. Abur. 519-522 [doi]
- Design of low-jitter 1-GHz phase-locked loops for digital clock generationWoogeun Rhee. 520-523 [doi]
- DFD based scene segmentation for H.263 video sequencesWarnakulasuriya Anil Chandana Fernando, Cedric Nishan Canagarajah, David R. Bull. 520-523 [doi]
- On the implementation of 2-band cyclic filterbanksMahalingam Ramkumar, G. V. Anand, Ali N. Akansu. 520-523 [doi]
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- A new efficient algorithm for singular value decompositionSau-Gee Chen, Chin-Chi Chang. 523-526 [doi]
- Modified predictive motion estimation for reduced-resolution video from high-resolution compressed videoJusty W. C. Wong, Oscar C. Au. 524-527 [doi]
- A radiation-hard 80 MHz phase locked loop for clock and data recoveryT. Toifl, P. Moreira. 524-527 [doi]
- Efficient VLSI architecture for 2-D inverse discrete wavelet transformsChu Yu, Sao-Jie Chen. 524-527 [doi]
- Power and signal integrity improvement in ultra high-speed current mode logicHien Ha, Forrest Brewer. 525-528 [doi]
- Controllability and observability of RLC networks over F(z)Kunsheng Lu, Kai-Sheng Lu. 527-530 [doi]
- A practical load-optimized VCO design for low-jitter 5 V 500 MHz digital phase-locked loopChua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen. 528-531 [doi]
- Optimizing the compaction gain in a class of IIR filtersIoan Tabus, Corneliu Popeea, Jaakko Astola. 528-531 [doi]
- Fast motion estimation for video resolution down-conversion using spatial-variant filterJusty W. C. Wong, Oscar C. Au. 528-531 [doi]
- Dynamic CMOS noise immunity estimation in submicron regimeAdnan Kabbani, A. J. Al-Khalili. 529-532 [doi]
- A second-order differential system for orthonormal optimizationSimone Fiori, Francesco Piazza. 531-534 [doi]
- Efficient anti-aliasing algorithm for computer generated imagesTsuyoshi Isshiki, Hiroaki Kunieda. 532-535 [doi]
- PLL frequency synthesizer with an auxiliary programmable dividerY. Sumi, S. Obote, N. Kitai, R. Furuhashi, Y. Matsuda, Y. Fukui. 532-536 [doi]
- Balanced-uncertainty optimized wavelet filters with prescribed regularityDavid B. H. Tay. 532-535 [doi]
- Estimation of ground bounce effects on CMOS circuitsAdnan Kabbani, A. J. Al-Khalili. 533-536 [doi]
- Parametrical modeling and identification of a class of hybrid systems under persistent excitation of the inputManuel de la Sen. 535-538 [doi]
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- Stable output error identification scheme using periodic excitation signalsP. A. Janakiraman, A. Bhattacharyya. 539-542 [doi]
- Dictionaries for matching pursuits video codingDavid R. Bull, Cedric Nishan Canagarajah, Przemysalw Czerepinski. 540-543 [doi]
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- High speed multistage CMOS clock buffers with pulse width control loopFenghao Mu, Christer Svensson. 541-544 [doi]
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- ESD buses for whole-chip ESD protectionMing-Dou Ker, Hun-Hsien Chang, Tung-Yang Chen. 545-548 [doi]
- Design of high-performance CMOS charge pumps in phase-locked loopsW. Rhee. 545-548 [doi]
- Unifying results in CNN theory using delta operatorM. Hanggi, H. Reddy, G. Moschytz. 547-550 [doi]
- Performance of array signal processing algorithms for wideband digital wireless communicationChih-Sheng Chou, David W. Lin. 548-551 [doi]
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- Noise-tolerant dynamic circuit designLei Wang, Naresh R. Shanbhag. 549-552 [doi]
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- A novel learning algorithm for global synchronization of oscillatory neural networksM. C.-Y. Ho, Y.-G. Wu, H. Kurokawa. 551-554 [doi]
- Maximizing channel capacity in FSK modulation systemsMichael A. Soderstrand, L. Gao, E. McCune. 552-555 [doi]
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- A 3.3 V high speed CMOS PLL with 3-250 MHz input locking rangeHyuk-Jun Sung, Kwang Sub Yoon. 553-556 [doi]
- Theoretical analysis of hysteresis neural network solving N-Queens problemsT. Nakaguchi, K. Jin no, M. Tanaka. 555-558 [doi]
- Acoustic noise reduction for speech communication: (second-order gradient microphone)G. S. Kang, D. A. Heide. 556-559 [doi]
- A 2.4-GHz CMOS monolithic VCO based on an MOS varactorPietro Andreani, Sven Mattisson. 557-560 [doi]
- Cooperative and competitive cellular neural networksM. Mori, Y. Tanji, Mamoru Tanaka. 559-562 [doi]
- A novel method to determine insert frequency of pilot symbolsZexian Li, Ping Zhang, Jiandong Hu. 560-563 [doi]
- A current-controlled oscillator coarse-steering acquisition-aid for high frequency SOI CMOS PLL circuitsYi Chang, E. W. Greeneich. 561-564 [doi]
- A neural networks based system for post pulse fault detection and disruption data validation in tokamak machinesLuigi Fortuna, V. Marchese, Alessandro Rizzo, Maria Gabriella Xibilia. 563-566 [doi]
- On improving the accuracy of a wavelet based identifier to classify CDMA signal and GSM signalK. C. Ho, Haiqin Liu, Liang Hong. 564-567 [doi]
- A monolithic 1.25 Gbits/sec CMOS clock/data recovery circuit for fibre channel transceiverL. Wu, H. Chen, S. Nagavarapu, Randall L. Geiger, E. Lee, W. Black. 565-568 [doi]
- A neural network method for adaptive noise cancellationL. Tao, H. K. Kwan. 567-570 [doi]
- Simulation of the multipath performance of FM-DCSK digital communications using chaosMichael Peter Kennedy, Géza Kolumbán, Gábor Kis. 568-571 [doi]
- A 2 GHz VCO with process and temperature compensationH. Chen, E. Lee, Randall L. Geiger. 569-572 [doi]
- Automatic synthesis of analog and mixed-signal fuzzy controllers with emphasis in power consumptionRamón González Carvajal, Antonio B. Torralba, Rafael L. Millán, Leopoldo García Franquelo. 571-574 [doi]
- Recursive maximum likelihood decoder for high-speed satellite communicationMorgan Hirosuke Miki, Daisuke Taki, Gen Fujita, Takao Onoye, Isao Shirakawa, T. Fujiwara, T. Kasami. 572-575 [doi]
- Novel Si integrated inductor and transformer structures for RF IC designYorgos Koutsoyannopoulos, Yannis Papananos, Sotiris Bantas, C. Alemanni. 573-576 [doi]
- Stability analysis of the class of delayed neural networksSabri Arik, Vedat Tavsanoglu. 575-578 [doi]
- Efficient implementation of parallel correlators for code acquisition in DS/CDMA systemsSeung Hyuk Ahn, Joon Tae Kim, Yong-Hoon Lee. 576-579 [doi]
- High Q backside micromachined CMOS inductorsM. Ozgur, Mona E. Zaghloul, M. Gaitan. 577-580 [doi]
- Transform domain neural filtersIsao Nakanishi, Y. Itoh, Yutaka Fukui. 579-582 [doi]
- Multiple access over wireline channels using orthogonal signalingAhmed F. Shalash, Keshab K. Parhi. 580-583 [doi]
- CMOS tunable bandpass RF filters utilizing coupled on-chip inductorsSotiris Bantas, Yannis Papananos, Yorgos Koutsoyannopoulos. 581-584 [doi]
- Theoretical expectation value of the capacity of fuzzy polynomial bidirectional hetero-correlatorChua-Chin Wang, Cheng-Fa Tsai. 583-586 [doi]
- A track&hold-mixer for direct-conversion by subsamplingT. Vasseaux, B. Huyart, Patrick Loumeau, Jean-François Naviner. 584-587 [doi]
- 2-V 900-MHz quadrature coupled LC oscillators with improved amplitude and phase matchingsChi-Wa Lo, H. C. Luong. 585-588 [doi]
- Channel equalization by feedforward neural networksBiao Lu, Brian L. Evans. 587-590 [doi]
- Full duplex transhybrid circuit for voice communications through a single crosspointD. B. LaFontaine. 588-591 [doi]
- A fourth-order CMOS bandpass amplifier with high linearity and high image rejection for GSM receiversD. L. C. Leung, H. C. Luong. 589-592 [doi]
- Fuzzy logic damping controller for FACTS devices in interconnected power systemsNi Yixin, Mak Lai On, Huang Zhenyu, Chen Shousun, Zhang Baolin. 591-594 [doi]
- On the design and sensitivity of RC sequence asymmetric polyphase networks in RF integrated transceiversS. H. Galal, Maged S. Tawfik, H. F. Ragaie. 593-597 [doi]
- Very fast and compact fixed template CNN realizations for B/W processingAri Paasio, Asko Kananen, Kari Halonen. 595-598 [doi]
- A low voltage bulk driven downconversion mixer coreG. Kathiresan, Christofer Toumazou. 598-601 [doi]
- Neural detectors with variable thresholdA. Burian, P. Kuosmanen, J. Saarinen. 599-602 [doi]
- Design of highly-efficient power-controllable CMOS class E RF power amplifiersS. H.-L. Tu, Christofer Toumazou. 602-605 [doi]
- Blind multiuser detection for DS-CDMA systems: a neural network approachNeng Wang, Wei-Ping Zhu, Baoyu Zheng. 603-606 [doi]
- A low voltage fully differential nested Gm capacitance compensation amplifier: analysis and designG. Xu, Sherif H. K. Embabi, P. Hao, Edgar Sánchez-Sinencio. 606-609 [doi]
- An algorithm for symbolic and numeric architecture determination in a knowledge-based analog-to-digital converter synthesis environment using fuzzy membership functionsA. Odet-Allah, M. Hassoun. 607-611 [doi]
- A new multipath amplifier design technique for enhancing gain without sacrificing bandwidthM. E. Schlarmann, E. K. F. Lee, Randall L. Geiger. 610-615 [doi]
- The generalized back-propagation algorithm with convergence analysisSin Chun Ng, Shu Hung Leung, Andrew Luk. 612-615 [doi]
- A new hybrid recurrent neural networkXiqun Lu, Chun Chen. 616-618 [doi]
- Optimum nested Miller compensation for low-voltage low-power CMOS amplifier designKa Nang Leung, Philip K. T. Mok, Wing-Hung Ki. 616-619 [doi]
- An in-the-loop training method for VLSI neural networksJ. Yang, Majid Ahmadi, Graham A. Jullien, William C. Miller. 619-622 [doi]
- Linear amplifiers architectures with very high gain-bandwidth productJaime Ramírez-Angulo. 620-623 [doi]
- A comparison of architectures for a programmable fuzzy logic chipT. Lund, Antonio B. Torralba, Ramón González Carvajal, Jaime Ramírez-Angulo. 623-626 [doi]
- Transimpedance amplifier with differential photodiode current sensingB. Zand, K. Phang, D. A. Johns. 624-627 [doi]
- Neural blind separation of complex sources by extended APEX algorithm (EAPEX)Simone Fiori, Aurelio Uncini, Francesco Piazza. 627-630 [doi]
- A 110 MHz 70 dB CMOS variable gain amplifierMohamed Mostafa, Hassan O. Elwan, A. Bellaour, B. Kramer, Sherif H. K. Embabi. 628-631 [doi]
- A CNN implementation of a hysteresis chaos generatorC. Aissi, A. Shams. 631-634 [doi]
- A low voltage CMOS class AB operational transconductance amplifierHassan O. Elwan, Weinan Gao, Roberto Sadkowski, Mohammed Ismail. 632-635 [doi]
- CMOS operational transconductance amplifier for PRML read channel applicationsA. Ryan, M. Neag, O. McCarthy. 636-639 [doi]
- A tunable triode-MOSFET transconductor and its application to gm-C filtersJader A. De Lima, C. Dualibe. 640-643 [doi]
- New 1.4 volt transconductor with superior power supply rejectionY. Ro, William R. Eisenstadt, Robert M. Fox. 644-647 [doi]
- Design considerations for high performance very low frequency filtersJ. Silva-Martinez, S. Solis-Bustos. 648-651 [doi]
- Comparison of magnitude and delay sensitivity in IFLF and cascade g m-C filtersD. H. Chiang, R. Schaumann. 652-655 [doi]
- A CMOS continuous-time active biquad filter for gigahertz-band applicationsYuyu Chang, John Choma Jr., Jack Wills. 656-659 [doi]
- A high dynamic-range, self-tuned Gm-C filter for video-range applicationsP. H. Shanjani, Seyed Mojtaba Atarodi. 660-663 [doi]
- A 150 MHz continuous-time seventh order 0.05° equiripple linear phase filterN. Rao, V. Balan, R. Contreras, J.-G. Chern, Y. Wang. 664-666 [doi]
- Automatic tuning of high-Q filters based on envelope detectionAydin I. Karsilayan, Rolf Schaumann. 668-671 [doi]
- On instantaneous vs. syllabic companding in log domain filtersD. Frey. 672-676 [doi]
- Improved bandwidth, low voltage log domain building blocksSergio Callegari, Gianluca Setti. 677-680 [doi]
- A 1.2 V NPN-only log-domain integratorMourad N. El-Gamal, Gordon W. Roberts. 681-684 [doi]
- A 1-V CMOS log-domain integratorD. Python, Manfred Punzenberger, Christian C. Enz. 685-688 [doi]
- Multiple operating points in a CMOS log-domain filterR. M. Fox, M. Nagarajan. 689-692 [doi]
- Structured log-domain synthesis of nonlinear systemsEmmanuel M. Drakakis, A. J. Payne. 693-696 [doi]
- Synthesis of multiple-input translinear element log-domain filtersBradley A. Minch. 697-700 [doi]
- A low-voltage translinear second-order quadrature oscillatorWouter A. Serdijn, J. Mulder, Michiel H. L. Kouwenhoven, Arthur H. M. van Roermund. 701-704 [doi]