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Viewing Publication 1 - 95 from 95

2015

A methodology for speeding up matrix vector multiplication for single/multi-core architecturesVasilios I. Kelefouras, Angeliki Kritikakou, Elissavet Papadima, Constantinos E. Goutis. tjs, 71(7):2644-2667, 2015. [doi]

A methodology for speeding up loop kernels by exploiting the software information and the memory architectureVasilios I. Kelefouras, Angeliki Kritikakou, Constantinos E. Goutis. Comp. Lang., Syst. \& Struct., 41:21-41, 2015. [doi]

2010

Exploration of cryptographic ASIP designs for wireless sensor nodesIoanna Tsekoura, Georgios N. Selimis, Jos Hulzink, Francky Catthoor, Jos Huisken, Harmke de Groot, Constantinos E. Goutis. icecsys 2010: 827-830 [doi]

2008

Novel Hardware Implementation of the Cipher Message Authentication CodeHarris E. Michail, Georgios N. Selimis, Michalis D. Galanis, Dimitrios M. Schinianakis, Constantinos E. Goutis. jcnc, 2008, 2008. [doi]

2007

2006

Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architecturesGrigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis. ipps 2006: [doi]

Resource constrained modulo scheduling for coarse-grained reconfigurable arraysGrigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis. iscas 2006: [doi]

Mapping DSP applications on processor/coarse-grain reconfigurable array architecturesMichalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis. iscas 2006: [doi]

Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logicMichalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis. ipps 2006: [doi]

Mapping DSP applications on processor systems with coarse-grain reconfigurable hardwareMichalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis. ipps 2006: [doi]

A high-performance data path for synthesizing DSP kernelsMichalis D. Galanis, George Theodoridis, Spyros Tragoudas, Constantinos E. Goutis. tcad, 25(6):1154-1162, 2006. [doi]

2005

A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000Grigoris Dimitroulakos, Michalis D. Galanis, Athanasios Milidonis, Constantinos E. Goutis. integration, 39(1):1-11, 2005. [doi]

An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arraysMichalis D. Galanis, Gregory Dimitroulakos, Constantinos E. Goutis. iscas 2005: 3519-3522 [doi]

A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable PlatformsMichalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis. ipps 2005: [doi]

A methodology for partitioning DSP applications in hybrid reconfigurable systemsMichalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis. iscas 2005: 1206-1209 [doi]

A Reconfigurable Coarse-grain Data-path for Accelerating Computational Intensive KernelsMichalis D. Galanis, George Theodoridis, Spyros Tragoudas, Constantinos E. Goutis. jcsc, 14(4):877-893, 2005. [doi]

Comparison of the Hardware Implementation of Stream CiphersMichalis D. Galanis, Paris Kitsos, Giorgos Kostopoulos, Nicolas Sklavos, Constantinos E. Goutis. iajit, 2(4):267-274, 2005. [doi]

A low-power and high-throughput implementation of the SHA-1 hash functionHaralambos Michail, A. P. Kakarountas, Odysseas G. Koufopavlou, Constantinos E. Goutis. iscas 2005: 4086-4089 [doi]

Novel high throughput implementation of SHA-256 hash function through pre-computation techniqueHarris E. Michail, Athanasios Milidonis, Athanasios Kakarountas, Constantinos E. Goutis. icecsys 2005: 1-4 [doi]

2004

A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable PlatformsMichalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis. date 2004: 247-252 [doi]

A novel coarse-grain reconfigurable data-path for accelerating DSP kernelsMichalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis. fpga 2004: 252 [doi]

Mapping Computational Intensive Applications to a New Coarse-Grained Reconfigurable Data-PathMichalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis. patmos 2004: 652-661 [doi]

Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-PathMichalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis. fpl 2004: 868-873 [doi]

Accelerating DSP Applications on a Mixed Granularity Platform with a New Reconfigurable Coarse-Grain Data-PathMichalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis. fccm 2004: 275-276 [doi]

The Impact of Low-Power Techniques on the Design of Portable Safety-Critical SystemsAthanasios Kakarountas, Vassilis Spiliotopoulos, Spiridon Nikolaidis, Constantinos E. Goutis. patmos 2004: 501-509 [doi]

A Novel Constant-Time Fault-Secure Binary CounterDimitris Karatasos, Athanasios Kakarountas, George Theodoridis, Constantinos E. Goutis. patmos 2004: 742-749 [doi]

Combined Application of Data Transfer and Storage Optimizing Transformations and Subword Parallelism Exploitation for Power Consumption and Execution Time Reduction in VLIW Multimedia ProcessorsKostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man. vlsisp, 37(1):53-73, 2004. [doi]

An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive ApplicationsAthanasios Milidonis, Grigoris Dimitroulakos, Michalis D. Galanis, George Theodoridis, Constantinos E. Goutis, Francky Catthoor. scopes 2004: 122-136 [doi]

A Framework for Data Partitioning for C++ Data-Intensive ApplicationsAthanasios Milidonis, Gregory Dimitroulakos, Michalis D. Galanis, Athanasios P. Kakarountas, George Theodoridis, Constantinos E. Goutis, Francky Catthoor. dafes, 9(2):101-121, 2004. [doi]

2003

2002

Confronting violations of the TSCG(T) in low-power designAthanasios Kakarountas, K. Papadomanolakis, Spiridon Nikolaidis, Dimitrios Soudris, Constantinos E. Goutis. iscas 2002: 313-316 [doi]

A Code Transformation-Based Methodology for Improving I-Cache Performance of DSP ApplicationsNikolaos D. Liveris, Nikolaos D. Zervas, Dimitrios Soudris, Constantinos E. Goutis. date 2002: 977-983 [doi]

Power Efficient Vector Quantization Design Using Pixel TruncationKostas Masselos, Panagiotis Merakos, Constantinos E. Goutis. patmos 2002: 409-418 [doi]

A systematic methodology for the application of data transfer and storage optimizing code transformations for power consumption and execution time reduction in realizations of multimedia algorithms on programmable processorsKostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man. tvlsi, 10(4):515-518, 2002. [doi]

Power Efficient Hierarchical Scheduling for DSP TransformationsPanagiotis K. Merakos, Konstantinos Masselos, Constantinos E. Goutis. vlsi, 2002(2):203-217, 2002. [doi]

A fast and accurate delay dependent method for switching estimation of large combinational circuitsS. Theoharis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis, Adonios Thanailakis. jsa, 48(4-5):113-124, 2002. [doi]

2001

Power, performance and area exploration of block matching algorithms mapped on programmable processorsNikolas Kroupis, Minas Dasygenis, Antonios Argyriou, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis, Nikolaos D. Zervas, Constantinos E. Goutis. icip 2001: 728-731 [doi]

A Fast and Accurate Method of Power Estimation for Logic Level NetworksGeorgios Theodoridis, S. Theoharis, Dimitrios Soudris, Constantinos E. Goutis. vlsi, 2001(2):205-219, 2001. [doi]

A Probabilistic Power Estimation Method for Combinational Circuits Under Real Gate Delay ModelGeorgios Theodoridis, Spyros Theoharis, Dimitrios Soudris, Constantinos E. Goutis. vlsi, 2001(1):69-79, 2001. [doi]

Performance comparison of DWT scheduling alternatives on programmable platformsNikolaos D. Zervas, I. Tagopoulos, Vassilis Spiliotopoulos, Giorgos P. Anagnostopoulos, Dimitrios Soudris, Constantinos E. Goutis. iscas 2001: 761-764 [doi]

2000

Comparative Study on Self-Checking Carry-Propagate Adders in Terms of Area, Power and PerformanceAthanasios Kakarountas, K. Papadomanolakis, V. Kokkinos, Constantinos E. Goutis. patmos 2000: 187-194 [doi]

Low power synthesis of sum-of-products computation (poster session)Kostas Masselos, S. Theoharis, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis. islped 2000: 234-237 [doi]

Low power architectures for digital signal processingKostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis. jsa, 46(7):551-571, 2000. [doi]

A Specification Refinement Methodology for Power Efficient Partitioning of Data-Dominated Algorithms Within Performance ConstraintsKostas Masselos, Koen Danckaert, Francky Catthoor, Nikolaos D. Zervas, Constantinos E. Goutis, Hugo De Man. vlsisp, 26(3):291-317, 2000. [doi]

Low power design of a multi-mode transceiverDimitrios Soudris, M. Perakis, X. Mizas, V. Mardiris, K. Katis, Chrissavgi Dre, A. E. Tzimas, E. G. Metaxakis, Grigorios Kalivas, Nikolaos D. Zervas, Spyros Theoharis, George Theodoridis, Adonios Thanailakis, Constantinos E. Goutis. iscas 2000: 721-724 [doi]

Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia ApplicationsDimitrios Soudris, Nikolaos D. Zervas, Antonios Argyriou, Minas Dasygenis, Konstantinos Tatas, Constantinos E. Goutis, Adonios Thanailakis. patmos 2000: 243-254 [doi]

Accurate Power Estimation of Logic Structures Based on Timed Boolean FunctionsGeorge Theodoridis, S. Theoharis, Nikolaos D. Zervas, Constantinos E. Goutis. patmos 2000: 76-87 [doi]

A methodology for the behavioral-level event-driven power management of digital receiversNikolaos D. Zervas, Dimitrios Soudris, Spyros Theoharis, Constantinos E. Goutis, Adonios Thanailakis. iscas 2000: 589-592 [doi]

Reducing Power Consumption through Dynamic Frequency Scaling for a Class of Digital ReceiversNikolaos D. Zervas, S. Theoharis, Athanasios Kakarountas, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis. patmos 2000: 47-55 [doi]

1999

Strategy for power-efficient design of parallel systemsKoen Danckaert, Kostas Masselos, Francky Catthoor, Hugo De Man, Constantinos E. Goutis. tvlsi, 7(2):258-265, 1999. [doi]

A Space-Time Representation Method of Iterative Algorithms for the Design of Processor ArraysEfstathios D. Kyriakis-Bitzaros, Constantinos E. Goutis. vlsisp, 22(3):151-162, 1999. [doi]

Low power synthesis of sum-of-product computation in DSP algorithmsKostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis. iscas 1999: 420-423 [doi]

Computation Reordering: A Novel Transformation for Low Power DSP SynthesisKostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis. vlsi, 1999(2):177-202, 1999. [doi]

Novel techniques for bus power consumption reduction in realizations of sum-of-product computationKostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis. tvlsi, 7(4):492-497, 1999. [doi]

A methodology for power efficient partitioning of data-dominated algorithm specifications within performance constraintsKostas Masselos, Koen Danckaert, Francky Catthoor, Constantinos E. Goutis, Hugo De Man. islped 1999: 270-272 [doi]

The VLSI implementation of a baseband receiver for DECT-based portable applicationsM. Perakis, A. E. Tzimas, E. G. Metaxakis, Dimitrios Soudris, G. A. Kalivas, C. Katis, Chrissavgi Dre, Constantinos E. Goutis, Adonios Thanailakis, Thanos Stouraitis. iscas 1999: 198-201 [doi]

An efficient probabilistic method for logic circuits using real delay gate modelGeorge Theodoridis, S. Theoharis, Dimitrios Soudris, Thanos Stouraitis, Constantinos E. Goutis. iscas 1999: 286-289 [doi]

A New Method for Low Power Design of Two-Level Logic CircuitsGeorgios Theodoridis, Spyros Theoharis, Dimitrios Soudris, Constantinos E. Goutis. vlsi, 1999(2):147-157, 1999. [doi]

Power exploration of multimedia applications realized on embedded coresNikolaos D. Zervas, Kostas Masselos, Odysseas G. Koufopavlou, Constantinos E. Goutis. iscas 1999: 378-381 [doi]

1998

1996

Transformation of Nested Loops into Uniform Recurrences and their Mapping to Regular Processor ArraysEfstathios D. Kyriakis-Bitzaros, Dimitrios Soudris, Constantinos E. Goutis. jcsc, 6(3):243-266, 1996. [doi]

1995

Alternative Architectures for the 2-D DCT AlgorithmChrissavgi Dre, Anna Tatsaki, Thanos Stouraitis, Constantinos E. Goutis. iscas 1995: 2156-2159

Artificial neural networks in medical decision making systems: an application to pulmonary diseases' diagnosis through VHDL synthesisGeorge-Peter K. Economou, John Ant. Hallas, Evaggelinos P. Mariatos, Constantinos E. Goutis. date 1995: 590 [doi]

A floating-point advanced cordic processorD. E. Metafas, Constantinos E. Goutis. vlsisp, 10(1):53-65, 1995. [doi]

1994

Experiences accumulated working towards medical decision support systemsGeorge-Peter K. Economou, N. M. Economopoulos, Dimitris K. Lymberopoulos, Constantinos E. Goutis. jsa, 40(10-12):883-886, 1994. [doi]

A CAD Tool for the Development of an Extra-Fast Fuzzy Logic Controller Based on FPGAs and Memory ModulesJohn Ant. Hallas, Evaggelinos P. Mariatos, Michael K. Birbas, Alexios N. Birbas, Constantinos E. Goutis. fpl 1994: 309-311

Near-Lossless Compression of Continuous-Tone Still Images Using Fuzzy Logic Notions and the Binary Arithmetic Coder (Q-Coder)John Ant. Hallas, Michael K. Birbas, Alexios N. Birbas, John C. Kikidis, Constantinos E. Goutis. iscas 1994: 125-128

A Fast DCT Processor, Based on Special Purpose CORDIC RotatorsEvaggelinos P. Mariatos, D. E. Metafas, John Ant. Hallas, Constantinos E. Goutis. iscas 1994: 271-274

Array processor for block adaptive LS FIR filteringSpiridon Nikolaidis, S. Theodoridis, Constantinos E. Goutis. sigpro, 39(1-2):215-222, 1994. [doi]

1993

Development of a technology independent libraryGeorge-Peter K. Economou, Spiridon Nikolaidis, D. E. Metafas, Constantinos E. Goutis. jsa, 39(2-5):241-244, 1993. [doi]

Space-Time Representation of Iterative Algorithms and The Design of Regular Processor ArraysEfstathios D. Kyriakis-Bitzaros, Odysseas G. Koufopavlou, Constantinos E. Goutis. icpp 1993: 2-9

Implementation of Given s Rotation processors for DSP real-time applicationsD. E. Metafas, Evaggelinos P. Mariatos, Spiridon Nikolaidis, Constantinos E. Goutis. jsa, 38(1-5):351-357, 1993. [doi]

Real time Cepstrum computation based on an Advanced CORDIC processorD. E. Metafas, Spiridon Nikolaidis, Constantinos E. Goutis. jsa, 37(1-5):57-60, 1993. [doi]

CORDIC Based Pipeline Architecture for All-pass FiltersSpiridon Nikolaidis, D. E. Metafas, Constantinos E. Goutis. iscas 1993: 1917-1920

A Systematic Methodology for Designing Multilevel Systolic ArchitecturesDimitrios Soudris, P. D. Georgakopoulos, Constantinos E. Goutis. iscas 1993: 1738-1741

Systematic design of full adder-based architectures for convolutionDimitrios Soudris, Vassilis Paliouras, Thanos Stouraitis, Alexander Skavantzos, Constantinos E. Goutis. icassp 1993: 389-392 [doi]

1992

1991

A placing and routing tool implemented in PrologN. A. Kyrloglou, S. Koutroubinas, A. Koyandis, Constantinos E. Goutis. jsa, 32(1-5):425-433, 1991. [doi]

Array processor for LS FIR system identificationSpiros Nikolaidis, Odysseas G. Koufopavlou, Sergios Theodoridis, Constantinos E. Goutis. jsa, 32(1-5):557-563, 1991. [doi]

Direct mapping of nested loops on piecewise regular processor arraysDimitrios Soudris, Michael K. Birbas, Constantinos E. Goutis. ccc 1992: 145-150

1986

An optimal technique for constraint-based image restoration and reconstructionRichard M. Leahy, Constantinos E. Goutis. tsp, 34(6):1629-1642, 1986. [doi]

1984

Tomographic and spectral analysis using noise statisticsRichard M. Leahy, Constantinos E. Goutis, S. Drossos. icassp 1984: 146-149 [doi]

1983

Reconstruction algorithms for limited view projection dataConstantinos E. Goutis, M. R. Leahy, S. Drossos. icassp 1983: 143-146 [doi]

1982

An optimal technique for tomographic image reconstruction from curved ray projectionsConstantinos E. Goutis, Tariq S. Durrani. icassp 1982: 1549-1552 [doi]

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