Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen. A practical load-optimized VCO design for low-jitter 5 V 500 MHz digital phase-locked loop. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 528-531, IEEE, 1999. [doi]
Abstract is missing.