The design of a 1 V, 40 MHz, current-mode sample-and-hold circuit with 10-bit linearity - researchr publication

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Y. Sugimoto, S. Imai. The design of a 1 V, 40 MHz, current-mode sample-and-hold circuit with 10-bit linearity. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 132-135, IEEE, 1999. [doi]

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