Asim J. Al-Khalili - researchr alias

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Viewing Publication 1 - 53 from 53

2021

A finite element-guided mathematical surrogate modeling approach for assessing occupant injury trends across variations in simplified vehicular impact conditionsP. R. Berthelson, P. Ghassemi, J. W. Wood, G. G. Stubblefield, Asim J. Al-Khalili, M. D. Jones, Mark F. Horstemeyer, S. Chowdhury, R. K. Prabhu. mbec, 59(5):1065-1079, 2021. [doi]

2014

10 GHz throughput FinFET dual-edge triggered flip-flopsSeyed Ebrahim Esmaeili, Asim J. Al-Khalili. ccece 2014: 1-4 [doi]

Vt-conscious repeater insertion in power-managed VLSIHouman Zarrabi, Asim J. Al-Khalili, Yvon Savaria. isicir 2014: 99-102 [doi]

2012

2011

Analysis of Resistive Open Defects in Drowsy SRAM CellsAfshin Nourivand, Asim J. Al-Khalili, Yvon Savaria. et, 27(2):203-213, 2011. [doi]

SRAM read-assist scheme for high performanc low power applicationsAli Valaee, Asim J. Al-Khalili. isocc 2011: 179-182 [doi]

Repeater insertion in power-managed VLSI systemsHouman Zarrabi, Asim J. Al-Khalili, Yvon Savaria. glvlsi 2011: 395-398 [doi]

2010

2009

Estimation of energy performance in computing platformsHouman Zarrabi, Asim J. Al-Khalili, Yvon Savaria. icecsys 2009: 783-786 [doi]

An interconnect-aware delay model for dynamic voltage scaling in NM technologiesHouman Zarrabi, Asim J. Al-Khalili, Yvon Savaria. glvlsi 2009: 45-50 [doi]

2006

A CAD Tool for Generation of Synthesizable and Scalable Square of Binary NumbersAsim J. Al-Khalili. icn 2006: 183 [doi]

Zero skew differential clock distribution networkHouman Zarrabi, Haydar Saaied, Asim J. Al-Khalili, Yvon Savaria. iscas 2006: [doi]

2005

2004

Modulo deflation in (2:::n:::+1, 2:::n:::, 2:::n:::-1) convertersShaoqiang Bi, Wei Wang 0003, Asim J. Al-Khalili. iscas 2004: 429-432

New modulo decomposed residue-to-binary algorithm for general moduli setsShaoqiang Bi, Wei Wang 0003, Asim J. Al-Khalili. icassp 2004: 141-144 [doi]

Clock tree tuning using shortest paths polygonHaydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili. socc 2004: 59-62 [doi]

2003

2002

Quadratic deferred-merge embedding algorithm for zero skew clock distribution networkHaydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili. tau 2002: 119-125 [doi]

2001

A Low Power Approach to Floating Point Adder Design for DSP ApplicationsR. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah. vlsisp, 27(3):195-213, 2001. [doi]

1999

Lossy Compression of Images Using Logic MinimizationJacob Augustine, William E. Lynch, Yuke Wang, Asim J. Al-Khalili. vlsid 1999: 538-543 [doi]

Power implications of precision limited arithmetic in floating point FIR filtersR. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili. iscas 1999: 165-168 [doi]

An IEEE Compliant Floating Point MAFR. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili. ifip10-5 2000: 149-160

1998

A Low Power Floating Point AccumulatorR. V. K. Pillai, Asim J. Al-Khalili, Dhamin Al-Khalili. vlsid 1998: 330 [doi]

1997

Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for additionR. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili. islped 1997: 235-238 [doi]

A Low Power Approach to Floating Point Adder DesignR. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili. iccd 1997: 178-185

1996

Energy delay analysis of partial product reduction methods for parallel multiplier implementationR. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili. islped 1996: 201-204 [doi]

1995

Design techniques for fault-tolerant systolic arraysMichael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri, Dhamin Al-Khalili. vlsisp, 11(1-2):151-168, 1995. [doi]

Area efficient computing structures for concurrent error detection in systolic arraysMichael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri. vlsisp, 10(3):237-260, 1995. [doi]

1992

Design Methodology for Fault-Tolerant Systolic Array ArchitecturesMichael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri. icpp 1992: 267-274

Power estimation tool for sub-micron CMOS VLSI circuitsF. Rouatbi, Baher Haroun, Asim J. Al-Khalili. iccad 1992: 204-209 [doi]

1991

Area Efficient Computing Structures for Concurrent Error Detection in Systolic ArchitecturesMichael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri. icpp 1991: 484-491

On the Design of Optimal Fault-Tolerant Systolic Array ArchitecuresMichael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri. ipps 1991: 352-357

1990

A module generator for optimized CMOS buffersAsim J. Al-Khalili, Yong Zhu, Dhamin Al-Khalili. tcad, 9(10):1028-1046, 1990. [doi]

Design of optimal systolic arrays: a systematic approachMichael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri. spdp 1990: 166-173 [doi]

1989

A Module Generator for Optimized CMOS BuffersAsim J. Al-Khalili, Yong Zhu, Dhamin Al-Khalili. dac 1989: 245-250 [doi]

1988

An algorithm for polygon conversion to boxes for VLSI layoutsAsim J. Al-Khalili, Dhamin Al-Khalili, K. Ammar. integration, 6(3):291-308, 1988. [doi]

A micro-manipulator vision in IC ManufacturingRam Dantu, Nikitas J. Dimopoulos, R. V. Patel, Asim J. Al-Khalili. icra 1988: 1455-1460 [doi]

1985

A general approach to relative offset settings of traffic signalsAsim J. Al-Khalili. tsmc, 15(4):587-594, 1985. [doi]

The optimum green split of a cycle timeAsim J. Al-Khalili. tsmc, 15(5):675-681, 1985. [doi]

Urban traffic control - A general approachAsim J. Al-Khalili. tsmc, 15(2):260-271, 1985. [doi]

1984

An Algorithm for an Intelligent Arabic Computer TerminalAsim J. Al-Khalili. ijmms, 20(4):331-341, 1984.

1973

An On-Line Optimization Procedure for an Urban Traffic SystemC. J. Macleod, Asim J. Al-Khalili. ifip7 1973: 31-41

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