Richard F. Hobson - researchr alias

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Viewing Publication 1 - 17 from 17

2015

A framework for high-speed parallel-prefix adder performance evaluation and comparisonRichard F. Hobson. ijcta, 43(10):1474-1490, 2015. [doi]

2009

A 5T Sram Cell with 4 Power Terminals for Read/Write/Standby AssistRichard F. Hobson. cdes 2009: 10-16

2007

A New Single-Ended SRAM Cell With Write-AssistRichard F. Hobson. tvlsi, 15(2):173-181, 2007. [doi]

2004

SoC Features for a Multi-Processor WCDMA Base-station ModemRichard F. Hobson, Allan R. Dyck, Keith Cheung. iwsoc 2004: 318-321 [doi]

1999

1998

Power Reducing Techniques for Clocked CMOS PLAsRichard F. Hobson. glvlsi 1998: 34-38 [doi]

1995

An efficient maximum-redundancy radix-8 SRT division and square-root methodRichard F. Hobson, Michael W. Fraser. jssc, 30(1):29-38, January 1995. [doi]

1989

Opportunities for System and User Features in a New APL InterpreterRichard F. Hobson, J. D. Hoskin, R. W. Spilsbury. aplas 1989: 190-196 [doi]

1984

A Directly Executable Encoding for APLRichard F. Hobson. TOPLAS, 6(3):314-332, 1984. [doi]

1981

Software sympathetic chip set designRichard F. Hobson. afips 1981: 3-10 [doi]

Structured Machine Design: An Ongoing ExperiementRichard F. Hobson. isca 1981: 37-56

High-level microprogramming with APL syntaxRichard F. Hobson, Patrick Hannon, Jonathan Thornburg. micro 1981: 131-139 [doi]

1978

Computing science hardware laboratories and the LSI revolutionRichard F. Hobson. sigcse 1978: 160-170 [doi]

1976

GPMS, a general purpose memory management system - user's memory - that isI. Ganapathy, Richard F. Hobson. apl 1976: 155-165 [doi]

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