An analytical, transistor-level energy model for SRAM-based caches

Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos. An analytical, transistor-level energy model for SRAM-based caches. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 198-201, IEEE, 1999. [doi]

Abstract

Abstract is missing.