Jiro Naganuma - researchr alias

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Viewing Publication 1 - 22 from 22

2012

An H.264/AVC High422 Profile and MPEG-2 422 Profile Encoder LSI for HDTV Broadcasting InfrastructuresKoyo Nitta, Hiroe Iwasaki, Takayuki Onishi, Takashi Sano, Atsushi Sagata, Yasuyuki Nakajima, Minoru Inamori, Ryuichi Tanida, Atsushi Shimizu, Ken Nakamura, Mitsuo Ikeda, Jiro Naganuma. ieicet, 95-C(4):432-440, 2012. [doi]

2010

MPEG-2 Transcoding Method for Reducing Re-quantization Noise Based on a Two-tiered Quantizer MatrixTakeshi Yoshitome, Jiro Naganuma, Yoshiyuki Yashima. imt, 5(1):129-138, 2010. [doi]

2008

2007

Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV LevelHiroe Iwasaki, Jiro Naganuma, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, Toshihiro Minami, Makoto Endo, Yoshiyuki Yashima. tvlsi, 15(9):1055-1059, 2007. [doi]

2006

Highly accurate de-jittering scheme for broadcast quality video transmissionTakayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima. scjapan, 37(10):81-88, 2006. [doi]

2005

New set-top box for interactive visual communication of home entertainment using MPEG-2 full-duplex CODEC LSIMinoru Inamori, Hiroe Iwasaki, Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Yoshiyuki Yashima. tce, 51(2):640-641, 2005. [doi]

MPEG-2 real-time software CODEC for full-duplex transmission application over IP networksHiroe Iwasaki, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima. scjapan, 36(2):33-41, 2005. [doi]

2004

A distributed TS-MUX architecture for multi-chip extension beyond the HDTV levelTakayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima. iscas 2004: 261-264

2003

2002

Advanced concurrent design environment for multimedia system LSIsHiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Takeshi Ogura. scjapan, 33(14):72-80, 2002. [doi]

1999

An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative ArchitectureMitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Jiro Naganuma, Takeshi Ogura. date 1999: 44 [doi]

SuperENC: MPEG-2 video encoder chipMitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Yutaka Tashiro, Hiroshi Watanabe, Naoki Kobayashi 0002, Tsuneo Okubo, Ryota Kasai. micro, 19(4):56-65, 1999. [doi]

A memory-based architecture for MPEG2 system protocol LSIsM. Inamori, Jiro Naganuma, Makoto Endo. tvlsi, 7(3):339-344, 1999. [doi]

On-Chip Multimedia Real-Time OS and its MPEG-2 ApplicationsHiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura. rtcsa 1999: 200-203 [doi]

High-speed Software-based Platform for Embedded Software of a Single-chip MPEG-2 Video Encoder LSI with HDTV ScalabilitKatsuyuki Ochiai, Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura. date 1999: 303-308 [doi]

1996

A Memory-based Architecture for MPEG2 System Protocol LSIsMinoru Inamori, Jiro Naganuma, Haruo Wakabayashi, Makoto Endo. date 1996: 500-507 [doi]

1994

A Highly OR-Parallel Inference Machine (Multi-ASCA) and Its Performance Evaluation: An Architecture and Its Load Balancing AlgorithmsJiro Naganuma, Takeshi Ogura. TC, 43(9):1062-1075, 1994.

High-Level Design Validation Using Algorithmic DebuggingJiro Naganuma, Takeshi Ogura, Tamio Hoshino. eurodac 1994: 474-480

1988

High-Speed CAM-Based Architecture for a Prolog Machine (ASCA)Jiro Naganuma, Takeshi Ogura, Shin-Ichiro Yamada, Takashi Kimura. TC, 37(11):1375-1383, 1988.

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