Toshio Kondo - researchr alias

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Viewing Publication 1 - 27 from 27

2018

Tile/line access cache memory based on a multi-level Z-order tiling data layoutBaokang Wang, Yuki Fukazawa, Toshio Kondo, Takahiro Sasaki. concurrency, 30(9), 2018. [doi]

2016

2015

Register Port Prediction for a Banked Register FileHiroaki Kawashima, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo. ic-nc 2015: 551-555 [doi]

An Architectural Framework of Snoopy Interconnection for Heterogeneous Cache SystemsSeiji Miyoshi, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo. ic-nc 2015: 561-565 [doi]

2014

Co-simulation framework for streamlining microprocessor development on standard ASIC design flowTomoyuki Nakabayashi, Tomoyuki Sugiyama, Takahiro Sasaki, Eric Rotenberg, Toshio Kondo. aspdac 2014: 400-405 [doi]

Detail Design and Evaluation of Fab CacheTakaki Okamoto, Tomoyuki Nakabayashi, Takahiro Sasaki, Toshio Kondo. ic-nc 2014: 591-595 [doi]

2013

2012

Measurement of Low-Energy Processor Chip Using Fine-Grain Variable Stages Pipeline ArchitectureTomoyuki Nakabayashi, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo. In ICNC. 2012: 293-297 [doi]

2011

Low power semi-static TSPC D-FFs using split-output latchTomoyuki Nakabayashi, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo. isocc 2011: 167-170 [doi]

Design and evaluation of variable stages pipeline processor chipTomoyuki Nakabayashi, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo. aspdac 2011: 95-96 [doi]

2010

Evaluation of Variable Level CacheNobuyuki Matsubara, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo. isia 2011: 227-233 [doi]

Design and Evaluation of Variable Stages Pipeline Processor ChipTomoyuki Nakabayashi, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo. isia 2011: 220-226 [doi]

2008

Evaluation of low-energy and high-performance processor using variable stages pipeline techniqueTakahiro Sasaki, Yuji Ichikawa, Tetsuo Hironaka, Toshiaki Kitamura, Toshio Kondo. iet-cdt, 2(3):230-238, 2008. [doi]

1999

1996

1989

Two-Dimensional Array Processor AAP2 and Its Programming LanguageToshio Kondo, Yoshi Sugiyama, Takayoshi Nakashima. scjapan, 20(12):14-22, 1989. [doi]

1986

Pseudo MIMD Array Processor - AAP2Toshio Kondo, Toshio Tsuchiya, Yoshihiro Kitamura, Yoshi Sugiyama, Takashi Kimura, Takayoshi Nakashima. isca 1986: 330-337

Automatic position findings of vehicle by means of laserKenichi Nishide, Moritomo Hanawa, Toshio Kondo. icra 1986: 1343-1348 [doi]

1985

A large scale cellular array processor: AAP-1Toshio Kondo, Tayoshi Nakashima, Toshio Tsuchiya, Yoshi Sugiyama, Tsuneta Sudo. acm 1985: 100-111 [doi]

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