Ashis Kumar Mal - researchr alias

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Viewing Publication 1 - 29 from 29

2023

Performance of Novel Adaptive Schemes for Cognitive Full-Duplex Relaying-Based Downlink Cooperative NOMAAmrita Mukherjee, Pratik Chakraborty, Shankar Prakriya, Ashis Kumar Mal. TWC, 22(5):3161-3179, May 2023. [doi]

An energy-efficient voice activity detector using reconfigurable Gaussian base normalization deep neural networkAnu Samanta, Indranil Hatai, Ashis Kumar Mal. mta, 82(18):27861-27882, July 2023. [doi]

2022

Fuzzy Logic-Based Energy-Optimal Collinear DF Relay Placement in Two-Hop η -μ Fading ChannelBiswajit Ghosh, Aniruddha Chandra, Ashis Kumar Mal. ijwin, 29(2):167-179, 2022. [doi]

Cooperative Mode Switching-Based Cognitive NOMA With Transmit Antenna and User SelectionAmrita Mukherjee, Pratik Chakraborty, Shankar Prakriya, Ashis Kumar Mal. tsipn, 8:932-945, 2022. [doi]

2021

A cost-effective alertness-rating tool to enable situational awareness among on-duty static security guards in Covid-19 pandemicDebabrata Bej, Shubhranil Chakraborty, Sekh Arif Mahammad, Ashis Kumar Mal. jrie, 7(4):341-353, 2021. [doi]

Performance of an Adaptive Cooperative NOMA Scheme with Transmit Antenna SelectionAmrita Mukherjee, Pratik Chakraborty, Shankar Prakriya, Ashis Kumar Mal. IEEEants 2021: 296-301 [doi]

2020

Optimal Design of Ultra-Low-Power 2.4 GHz LNA for IEEE 802.15.4/Bluetooth ApplicationsSumalya Ghosh, Bishnu Prasad De, Kanchan Baran Maji, Rajib Kar, Durbadal Mandal, Ashis Kumar Mal. jcsc, 29(16), 2020. [doi]

Time-Domain Smart Temperature Sensor Using Current Starved Inverters and Switched Ring Oscillator-Based Time-to-Digital ConverterR. S. S. M. R. Krishna, Ashis Kumar Mal, Rajat Mahapatra. cssp, 39(4):1751-1769, 2020. [doi]

2019

A cost-effective system for triggering alarm to distracted drivers/ nursesDebabrata Bej, Subhajit Rakshit, Ashis Kumar Mal, Rajat Mahapatra. cee, 76:24-39, 2019. [doi]

Symbiotic organisms search algorithm for optimal design of CMOS two-stage op-amp with nulling resistor and robust bias circuitSumalya Ghosh, Bishnu Prasad De, Rajib Kar, Ashis Kumar Mal. iet-cds, 13(5):679-688, 2019. [doi]

Optimal design of complementary metal-oxide-semiconductor analogue circuits: An evolutionary approachSumalya Ghosh, Bishnu Prasad De, Rajib Kar, Durbadal Mandal, Ashis Kumar Mal. cee, 80, 2019. [doi]

All MOS noise-shaped time-mode temperature sensorR. S. S. M. R. Krishna, Ashis Kumar Mal, Rajat Mahapatra. integration, 65:74-80, 2019. [doi]

Fast and optimised design of a differential VCO using symbolic technique and multi objective algorithmsMadhusmita Panda, Santosh Kumar Patnaik, Ashis Kumar Mal, Sumalya Ghosh. iet-cds, 13(8):1187-1195, 2019. [doi]

2018

Performance enhancement of a VCO using symbolic modelling and optimisationMadhusmita Panda, Santosh Kumar Patnaik, Ashis Kumar Mal. iet-cds, 12(2):196-202, 2018. [doi]

2015

An integrated routing and offset-time adaptation scheme for OBS networkS. Choudhury, V. Nair, Jaydeep Howlader, B. Choudhury, Ashis Kumar Mal. icdcn 2015: 28 [doi]

Sealed-bid auction: a cryptographic solution to bid-rigging attack in the collusive environmentJaydeep Howlader, Ashis Kumar Mal. scn, 8(18):3415-3440, 2015. [doi]

Analysis of resistive load ring oscillatorSaurav Mandal, Ashis Kumar Mal. retis 2015: 471-474 [doi]

2014

Practical Receipt-Free Sealed-Bid Auction in the Coercive EnvironmentJaydeep Howlader, Sanjit Kumar Roy, Ashis Kumar Mal. iacr, 2014:189, 2014. [doi]

2013

Practical Receipt-Free Sealed-Bid Auction in the Coercive EnvironmentJaydeep Howlader, Sanjit Kumar Roy, Ashis Kumar Mal. icisc 2014: 418-434 [doi]

A power efficient and digitally assisted CMOS complementary telescopic amplifier with wide input common mode rangeRishi Todani, Ashis Kumar Mal. isqed 2013: 416-421 [doi]

2012

Routing Scheme for OBS NetworksSubhrabrata Choudhury, Vivek Nair, Ashis Kumar Mal. jocnet, 4(10):799-811, 2012. [doi]

Coercion Resistant MIX for Electronic AuctionJaydeep Howlader, Jayanta Kar, Ashis Kumar Mal. iciss 2012: 238-248 [doi]

2010

Design of DXT architecture using current switched integratorAshis Kumar Mal, Om Prakash Hari, Rishi Todani, Anindya Sundar Dhar. apccas 2010: 576-579 [doi]

2008

Delay Estimation for On-Chip VLSI Interconnect using Weibull Distribution FunctionRajib Kar, Anuran Chattaraj, A. Chandra, Ashis Kumar Mal, A. K. Bhattacharjee. iciis 2008: 1-3 [doi]

2004

2003

Analog sampled data architecture for discrete Hartley transform for prime NAshis Kumar Mal, Anindya Sundar Dhar. icecsys 2003: 152-155 [doi]

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