Analyzing static noise margin for sub-threshold SRAM in 65nm CMOS

Benton H. Calhoun, Anantha P. Chandrakasan. Analyzing static noise margin for sub-threshold SRAM in 65nm CMOS. In Laurent Fesquet, Andreas Kaiser, Sorin Cristoloveanu, Michel Brillouët, editors, Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005. pages 363-366, IEEE, 2005. [doi]

Abstract

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