Chien-Ching Lin, Kai-Li Lin, Hsie-Chia Chang, Chen-Yi Lee. A 3.33Gb/s (1200,720) low-density parity check code decoder. In Laurent Fesquet, Andreas Kaiser, Sorin Cristoloveanu, Michel Brillouët, editors, Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005. pages 211-214, IEEE, 2005. [doi]
Abstract is missing.