A 1.2V CMOS multiplier for 10 Gbit/s equalization

Justin P. Abbott, Calvin Plett, John W. M. Rogers. A 1.2V CMOS multiplier for 10 Gbit/s equalization. In Laurent Fesquet, Andreas Kaiser, Sorin Cristoloveanu, Michel Brillouët, editors, Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005. pages 379-382, IEEE, 2005. [doi]

Abstract

Abstract is missing.