Hideo Yamasaki, Tadashi Shibata. A real-time image-feature-extraction and vector-generation VLSI employing arrayed-shift-register architecture. In Laurent Fesquet, Andreas Kaiser, Sorin Cristoloveanu, Michel Brillouët, editors, Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005. pages 121-124, IEEE, 2005. [doi]
Abstract is missing.