A 8Kb domino read SRAM with hit logic and parity checker

Antonio Pelella, Arthur Tuminaro, Ryan T. Freese, Yuen H. Chan. A 8Kb domino read SRAM with hit logic and parity checker. In Laurent Fesquet, Andreas Kaiser, Sorin Cristoloveanu, Michel Brillouët, editors, Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005. pages 359-362, IEEE, 2005. [doi]

Abstract

Abstract is missing.