Antonio Pelella, Arthur Tuminaro, Ryan T. Freese, Yuen H. Chan. A 8Kb domino read SRAM with hit logic and parity checker. In Laurent Fesquet, Andreas Kaiser, Sorin Cristoloveanu, Michel Brillouët, editors, Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005. pages 359-362, IEEE, 2005. [doi]
@inproceedings{PelellaTFC05,
title = {A 8Kb domino read SRAM with hit logic and parity checker},
author = {Antonio Pelella and Arthur Tuminaro and Ryan T. Freese and Yuen H. Chan},
year = {2005},
doi = {10.1109/ESSCIR.2005.1541634},
url = {https://doi.org/10.1109/ESSCIR.2005.1541634},
researchr = {https://researchr.org/publication/PelellaTFC05},
cites = {0},
citedby = {0},
pages = {359-362},
booktitle = {Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005},
editor = {Laurent Fesquet and Andreas Kaiser and Sorin Cristoloveanu and Michel Brillouët},
publisher = {IEEE},
isbn = {0-7803-9205-1},
}