FPGA Acceleration of the Horn and Schunck Hierarchical Algorithm

Ilias Bournias, Roselyne Chotin, Lionel Lacassagne. FPGA Acceleration of the Horn and Schunck Hierarchical Algorithm. In IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021. pages 1-5, IEEE, 2021. [doi]

@inproceedings{BourniasCL21,
  title = {FPGA Acceleration of the Horn and Schunck Hierarchical Algorithm},
  author = {Ilias Bournias and Roselyne Chotin and Lionel Lacassagne},
  year = {2021},
  doi = {10.1109/ISCAS51556.2021.9401068},
  url = {https://doi.org/10.1109/ISCAS51556.2021.9401068},
  researchr = {https://researchr.org/publication/BourniasCL21},
  cites = {0},
  citedby = {0},
  pages = {1-5},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021},
  publisher = {IEEE},
  isbn = {978-1-7281-9201-7},
}