Table of Contents

• Approximated Reconfigurable Transform Architecture for VVCYixuan Zeng, Heming Sun, Jiro Katto, Yibo Fan. 1-5 [doi]
• Virtual Network Embedding for Switch-Centric Data Center NetworksAna Laura Gonzalez Rios, Kamila Bekshentayeva, Maheeppartap Singh, Soroush Haeri, Ljiljana Trajkovic. 1-5 [doi]
• Empowering Traditional Carasau Bread Production Using Wireless Sensor NetworkMatteo Baire, Andrea Melis, Matteo Bruno Lodi, Luca Lodi, Alessandro Fanti, Giuseppe Mazzarella. 1-4 [doi]
• Design of a Seizure Detector Using Single Channel EEG SignalZijian Tang, Chao Zhang, Yahao Song, Milin Zhang. 1-4 [doi]
• Energy-Efficient Data Symbol Detection via Boosted Learning for Multi-Actuator Data Storage SystemsJiachen Xu, Ethan Chen, Vanessa Chen. 1-5 [doi]
• SpinSim: A Computer Architecture-Level Variation Aware STT-MRAM Performance Evaluation FrameworkHaoyuan Ma, You Wang, Rashid Ali, Zhengyi Hou, Deming Zhang, Erya Deng, Gefei Wang, Weisheng Zhao. 1-5 [doi]
• Estimation of MOSFET Channel Noise and Noise Performance of CMOS LNAs at Cryogenic TemperaturesXuesong Chen, Hazem Elgabra, Chih Hung Chen, Jonathan Baugh, Lan Wei. 1-5 [doi]
• Design of Tunable Analog Filters Using Memristive CrossbarsAnil Korkmaz, Chaoyi He, Linda P. B. Katehi, R. Stanley Williams, Samuel Palermo. 1-5 [doi]
• PCM-Trace: Scalable Synaptic Eligibility Traces with Resistivity Drift of Phase-Change MaterialsYigit Demirag, Filippo Moro, Thomas Dalgaty, Gabriele Navarro, Charlotte Frenkel, Giacomo Indiveri, Elisa Vianello, Melika Payvand. 1-5 [doi]
• Gradient Local Binary Pattern Layer to Initialize the Convolutional Neural NetworksNing Jiang, Jialiang Tang, Wenxin Yu, Jinjia Zhou, Liuwei Mai. 1-5 [doi]
• HSC: A Hybrid Spin/CMOS Logic Based In-Memory Engine with Area-Efficient Mapping StrategyYan Huang, Erya Deng, Jinyu Bai, Qing Yang, Wang Kang, Biao Pan. 1-5 [doi]
• High Convergence Rates of CMOS Invertible Logic Circuits Based on Many-Body HamiltoniansNaoya Onizawa, Takahiro Hanyu. 1-5 [doi]
• Efficient Machine Learning Algorithm for Embedded Tactile Data ProcessingMoustafa Saleh, Ali Ibrahim, Francesco Menichelli, Yasser Mohanna, Maurizio Valle. 1-5 [doi]
• A Novel Minimum-Phase Dual-Inductor Hybrid Boost Converter with PWM Voltage-Mode ControllerVan Ha Nguyen, Abdul Hafiz Alameh, Nam Ly, Yves Blaquière, Glenn E. R. Cowan. 1-5 [doi]
• Class-Specific Neural Network for Video Compressed SensingYifei Pei, Ying Liu, Nam Ling, Lingzhi Liu, Yongxiong Ren. 1-5 [doi]
• Live Demo: Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware DatapathsInbal Stanger, Netanel Shavit, Ramiro Taco, Marco Lanuzza, Alexander Fish. 1 [doi]
• Compact Modeling of Reaction-Diffusion-Advection Mechanisms for the Virtual Prototyping of Lab-on-ChipAlexi Bonament, Morgan Madec, Christophe Lallement. 1-5 [doi]
• BioCare: An Energy-Efficient CGRA for Bio-Signal Processing at the EdgeZahra Ebrahimi, Akash Kumar 0001. 1-5 [doi]
• MTJ-Based Dithering for Stochastic Analog-to-Digital ConversionAna Mitrovic, Eby G. Friedman. 1-5 [doi]
• A Pull-Up Adaptive Sense Amplifier Based on Dual-Gate IGZO TFTsSilin Lu, Lei Lu, Shengdong Zhang, Hailong Jiao. 1-5 [doi]
• A Power-Efficient, Wide-Frequency-Range Impedance Measurement IC Using Frequency-Shift TechniqueSong-I Cheon, Soon-Jae Kweon, Youngin Kim, Sohmyung Ha, Minkyu Je. 1-5 [doi]
• Demonstration of CAD Deployability for GPR Based Small-Signal Modelling of GaN HEMTSaddam Husain, Ahmad Khusro, Mohammad S. Hashmi, Galymzhan Nauryzbayev, Muhammad Akmal Chaudhary. 1-5 [doi]
• An Adaptively Biased LDO Regulator with 11nA Quiescent Current and 50mA Available LoadJing Li, Jiping Li, Jianyu Zhang, Yu He, Qiuzhen Xu, Pengda Qu, Weibo Hu, Zhiming Xiao. 1-5 [doi]
• A 28.5µW All-Analog Voice-Activity DetectorUdita Mukherjee, Tanmay Halder, Anand Kannan, Sovan Ghosh, Shanthi Pavan. 1-5 [doi]
• Event-Driven Sliding Mode Control of Discrete-Time 2-D Roesser SystemsRongni Yang, Wei Xing Zheng 0001. 1-5 [doi]
• A 12-Bit 100MS/s SAR ADC with Digital Error Correction and High-Speed LMS-Based Background CalibrationZhechong Lan, Li Dong 0007, Xixin Jing, Li Geng. 1-5 [doi]
• Efficient Integer-Arithmetic-Only Convolutional Networks with Bounded ReLUHengrui Zhao, Dong Liu, Houqiang Li. 1-5 [doi]
• Developing a Miniature Energy-Harvesting-Powered Edge Device with Multi-Exit Neural NetworkYuyang Li, Yawen Wu, Xincheng Zhang, Ehab Hamed, Jingtong Hu, Inhee Lee. 1-5 [doi]
• Fast Style Transfer with High Shape RetentionYujie Huang, Yi Ling, Ming-e Jing, Xiaoyong Xue, Xiaoyang Zeng, Yibo Fan. 1-5 [doi]
• A 64-84 GHz CMOS LNA with Excellent Gain Flatness for Wideband mmW ApplicationsXin Zhang, Chunqi Shi, Runxi Zhang, Hao Deng, Jinghong Chen. 1-5 [doi]
• A Ka-Band Quadrature-Hybrid LNA-PS with Gm- Boosting Technique in 40-nm CMOSZhengqi Xu, Ke Wu, Xiaoming Liu 0008, Chengyuan Liu, Jing Jin 0005, Jianjun Zhou. 1-5 [doi]
• A 57.2-Gb/s PAM4 Driver for a Segmented Silicon-Photonics Mach-Zehnder Modulator with Extinction Ratio >9-dB in 45-nm RF-SOI CMOS TechnologyQiang Fu, Min Tan, Dezhi Xing, Sizhu Shao, Zhipeng Hu, Junbo Feng. 1-5 [doi]
• A 0.9-V 22.7-ppm/°C Sub-Bandgap Voltage Reference with Single BJT and Two ResistorsLidan Wang, Chenchang Zhan, Jie Lin, Shuangxing Zhao, Nian Zhang. 1-4 [doi]
• Voltage-Source Parallel Resonant Class E OscillatorTakeru Kurumizawa, Hirotaka Koizumi. 1-5 [doi]
• PointNet-Based Jitter Decomposition on Point Cloud of Jitter HistogramNan Ren, Zaiming Fu, Dandan Zhou, Dexuan Kong, Shulin Tian. 1-5 [doi]
• Impact of Parasitic Wire Resistance on Accuracy and Size of Resistive CrossbarsLei Zhang, David Borggreve, Frank Vanselow, Ralf Brederlow. 1-5 [doi]
• SMT-Based Placement for System-on-Chip DesignSebastian Pointner, Sven Wenzek, Robert Wille. 1-5 [doi]
• A Minimal Memory Game-Based Distributed Algorithm to Vertex Cover of NetworksJie Chen, Xiang Li. 1-5 [doi]
• Towards Memristive Deep Learning Systems for Real-Time Mobile Epileptic Seizure PredictionCorey Lammie, Wei Xiang, Mostafa Rahimi Azghadi. 1-5 [doi]
• Efficient Multiple-Precision Posit MultiplierHao Zhang 0041, Seok-Bum Ko. 1-5 [doi]
• SPS: A Subjective Perception Score for Text-to-Image SynthesisXuewen Zhang, Wenxin Yu, Ning Jiang, Yunye Zhang, Zhiqiang Zhang. 1-5 [doi]
• Design of Computing-in-Memory (CIM) with Vertical Split-Gate Flash Memory for Deep Neural Network (DNN) Inference AcceleratorHang-Ting Lue, Han-Wen Hu, Tzu-Hsuan Hsu, Po-Kai Hsu, Keh-Chung Wang, Chih-Yuan Lu. 1-4 [doi]
• An Integrated Circuit for Decoupling and Tuning of Inverted-F Antennas in Cellular User EquipmentOguzhan Oezdamar, Robert Weigel, Amelie Hagelauer, Valentyn Solomko. 1-4 [doi]
• What Can a Remote Access Hardware Trojan do to a Network-on-Chip?M. Meraj Ahmed, Abhijitt Dhavlle, Naseef Mansoor, Sai Manoj Pudukotai Dinakarrao, Kanad Basu, Amlan Ganguly. 1-5 [doi]
• Design of Three-Stage OTAs from Settling-Time and Slew-Rate ConstraintsGianluca Giustolisi, Gaetano Palumbo. 1-5 [doi]
• A RRAM-Based Associative Memory CellYihan Pan, Patrick Foster, Alexander Serb, Themis Prodromakis. 1-5 [doi]
• Autonomous Wireless System for Robust and Efficient Inductive Power Transmission to Multi-Node ImplantsPeilong Feng, Timothy G. Constandinou. 1-5 [doi]
• Normalized Differential Power Analysis - for Ghost Peaks MitigationJuncheng Chen, Jun-Sheng Ng, Nay Aung Kyaw, Ne Kyaw Zwa Lwin, Weng-Geng Ho, Kwen-Siong Chong, Zhiping Lin, Joseph Sylvester Chang, Bah-Hwee Gwee. 1-5 [doi]
• A High Accuracy Multiple-Command Speech Recognition ASIC Based on Configurable One-Dimension Convolutional Neural NetworkLindong Wu, Zongwei Wang, Ming Zhao, Wei Hu, YiMao Cai, Ru Huang. 1-4 [doi]
• Resource and Energy Efficient Implementation of ECG Classifier Using Binarized CNN for Edge AI DevicesDavid Liang Tai Wong, Yongfu Li, Deepu John, Weng Khuen Ho, Chun-Huat Heng. 1-5 [doi]
• Training Multilayer Neural Networks Analytically Using Kernel ProjectionHuiping Zhuang, Zhiping Lin, Kar-Ann Toh. 1-5 [doi]
• Localization of Deep Video Inpainting Based on Spatiotemporal Convolution and Refinement NetworkXiangling Ding, Yifeng Pan, Kui Luo, Yanming Huang, Junlin Ouyang, Gaobo Yang. 1-5 [doi]
• An Integrated Bidirectional Multi-Channel Opto-Electro Arbitrary Waveform Stimulator for Treating Motor Neurone DiseaseDai Jiang, Yu Wu 0007, Noora Almarri, Maryam Habibollahi, Fangqi Liu, J. Barney Bryson, Linda Greensmith, Andreas Demosthenous. 1-4 [doi]
• Is It Time to Include High-Level Synthesis Design in Digital System Education for Undergraduate Computer Engineers?Isaac Nelson, Ricardo S. Ferreira, José Augusto Miranda Nacif, Peter Jamieson. 1-5 [doi]
• A Hybrid DC-DC Converter Capable of Supplying Heavy Load in Step-Up and Step-Down ModeJinwoo Jeon, Junyoung Maeng, Inho Park, Hyunjin Kim, Chulwoo Kim. 1-5 [doi]
• Towards CRYSTALS-Kyber: A M-LWE Cryptoprocessor with Area-Time Trade-OffKan Yao, Dur-e-Shahwar Kundi, Chenghua Wang, Máire O'Neill, Weiqiang Liu. 1-5 [doi]
• Smart Dysphagia Detection System with Adaptive Boosting Analysis of Throat SignalsShenghan Wang, Yangyang Jiang, Hengling Zhao, Xue Yang, Zhonghao Zhang, Ce Zhu, Ying Li, Yipeng Liu. 1-5 [doi]
• Dynamic Thermal Management in Many-Core Systems Leveraged by Abstract ModelingAlzemiro Henrique Lucas da Silva, Iaçanã I. Weber, André Luís Del Mestre Martins, Fernando Gehm Moraes. 1-5 [doi]
• Quasi Delay Insensitive FIFOs: Design Choices Exploration and ComparisonTaciano A. Rodolfo, Marcos L. L. Sartori, Matheus T. Moreira, Ney Laert Vilar Calazans. 1-5 [doi]
• A Memory Efficient Lock-Free Circular QueueNarasinga Rao Miniskar, Frank Liu, Jeffrey S. Vetter. 1-5 [doi]
• An Energy Efficient Functional near Infrared Spectroscopy System Employing Spatial Adaptive Sampling TechniqueZhenhong Liu, Linfeng Zhou, Cheng Chen, Zhouchen Ma, Guangpeng Shen, Yongfu Li, Jian Zhao. 1-5 [doi]
• DIRAC: Dynamic-IRregulAr Clustering Algorithm with Incremental Learning for RF-Based Trust Augmentation in IoT Device AuthenticationMd Faizul Bari, Baibhab Chatterjee, Shreyas Sen. 1-5 [doi]
• Video Anomaly Detection Based on Deep Generative NetworkSavath Saypadith, Takao Onoye. 1-5 [doi]
• Optimal PAM Order for Wireline CommunicationAsif Wahid, Rajath Bindiganavile, Armin Tajalli. 1-5 [doi]
• Energy-Efficient Read-Out IC for High-Precision DC Measurement System with Instrumentation Amplifier Power Reduction TechniqueSangmin Shin, MinSung Kim, Junyoung Park, Hyunjoong Lee, Suhwan Kim. 1-5 [doi]
• Cache Compression with Golomb-Rice Code and Quantization for Convolutional Neural NetworksSeung Hwan Bae, Hyuk-Jae Lee, Hyun Kim. 1-5 [doi]
• MetaplasticNet: Architecture with Probabilistic Metaplastic Synapses for Continual LearningFatima Tuz Zohora, Vedant Karia, Anurag Reddy Daram, Abdullah M. Zyarah, Dhireesha Kudithipudi. 1-5 [doi]
• A 1.6-GS/s 8b Flash-SAR Time-Interleaved ADC with Top-Plate Residue Based Gain CalibrationChe-Wei Hsu, Soon-Jyh Chang. 1-5 [doi]
• An Impedance Measurement SoC with Highly Digital Magnitude and Phase-to-Digital ConverterRameesha Qaiser, Muhammad Rizwan Khan, Wala Saadeh. 1-5 [doi]
• A 5.4-GHz 2/3/4-Modulus Fractional Frequency Divider Circuit in 28-nm CMOSTze Hin Cheung, Jussi Ryynänen, Aarno Pärssinen, Kari Stadius. 1-5 [doi]
• The Evolution of Submissive Strategies on the Clustered Scale-Free NetworksQian Zhao, Yajun Mao. 1-5 [doi]
• Continuous User Authentication Using IoT Wearable SensorsConor Smyth, Guoxin Wang, Rajesh Panicker, Avishek Nag, Barry Cardiff, Deepu John. 1-5 [doi]
• NMLib: A Nanomagnetic Logic Standard Cell LibraryLaysson Oliveira Luz, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar P. Vilela Neto. 1-5 [doi]
• Adaptive Input-to-Neuron Interlink Development in Training of Spike-Based Liquid State MachinesSangwoo Hwang, Junghyup Lee, Jaeha Kung. 1-5 [doi]
• Monocular Semantic Mapping Based on 3D Cuboids TrackingXingwu Ji, Zheng Gong, Ruihang Miao, Wuyang Xue, Rendong Ying. 1-5 [doi]
• Reference Voltage Buffer for Hybrid RC-DAC SAR ADCs in 130 nm CMOS ProcessUmanath Kamath, Lorenzo Rota, Aldo Pena-Perez, Bojan Markovic, Aseem Gupta, Camillo Tamma, Angelo Dragone. 1-4 [doi]
• BAFPN: An Optimization for YOLOHehe Li, Xin Li, Lianfeng Li, Junbin Pan, Shujia Zhu, Jinwei Du, Peng Wang. 1-5 [doi]
• Unsupervised Learning of Visual and Semantic Features for Video SummarizationYansen Huang, Rui Zhong, Wenjin Yao, Rui Wang. 1-5 [doi]
• Hardware Architecture of a Haar Classifier Based Face Detection System Using a Skip SchemeJongkil Hyun, Junghwan Kim, Cheol Ho Choi, Byungin Moon. 1-4 [doi]
• A Memory-Efficient Accelerator for DNA Sequence Alignment with Two-Piece Affine Gap TracebacksJing-Ping Wu, Yi-Chien Lin, Ying-Wei Wu, Shih-Wei Hsieh, Ching-Hsuan Tai, Yi-Chang Lu. 1-4 [doi]
• Tiny-FPU: Low-Cost Floating-Point Support for Small RISC-V MCU CoresLuca Bertaccini, Matteo Perotti, Stefan Mach, Pasquale Davide Schiavone, Florian Zaruba, Luca Benini. 1-5 [doi]
• Mutual Synchronization with 24 GHz OscillatorsChristian Hoyer, Dimitrios Prousalis, Lucas Wetzel, R. Riaz, Jens Wagner, Frank Jülicher, Frank Ellinger. 1-5 [doi]
• DC-AC: Deep Correlation-Based Adaptive Compression of Feature Map Planes in Convolutional Neural NetworksSeung Hwan Bae, Hyuk-Jae Lee, Hyun Kim. 1-5 [doi]
• FPGA Acceleration of the Horn and Schunck Hierarchical AlgorithmIlias Bournias, Roselyne Chotin, Lionel Lacassagne. 1-5 [doi]
• Instantaneous Stereo Depth Estimation of Real-World Stimuli with a Neuromorphic Stereo-Vision SetupNicoletta Risi, Enrico Calabrese, Giacomo Indiveri. 1-5 [doi]
• Automated Synthesis of Quantum Circuits Using Symbolic Abstractions and Decision ProceduresAlvaro Velasquez, Sumit Kumar Jha 0001, Rickard Ewetz, Susmit Jha. 1-5 [doi]
• Prosthesis Control Using Spike Rate Coding in the Retina Photoreceptor CellsCoen Arrow, Hancong Wu, Seungbum Baek, Herbert H. C. Iu, Kianoush Nazarpour, Jason Kamran Eshraghian. 1-5 [doi]
• Design Framework for SRAM-Based Computing-In-Memory Edge CNN AcceleratorsYimin Wang, Zhuo Zou, Lirong Zheng 0001. 1-5 [doi]
• Enhancing SAT-Attack Resiliency and Cost-Effectiveness of Reconfigurable-Logic-Based Circuit ObfuscationSubhajit Dutta Chowdhury, Gengyu Zhang, Yinghua Hu, Pierluigi Nuzzo. 1-5 [doi]
• A Dual-Sensing CMOS Array for Combined Impedance-pH Detection of DNA with Integrated Electric Field ManipulationZhengyu Wang, Lewis Keeble, Nicolas Moser, Tor Sverre Lande, Pantelis Georgiou. 1-5 [doi]
• Design Considerations for a Sub-25μW PLL with Multi-Phase Output and 1-450MHz Tuning RangeParikha Mehrotra, Baibhab Chatterjee, Shovan Maity, Shreyas Sen. 1-5 [doi]
• High PSR LDO with Adaptive-EFFRC for Wearable Biomedical ApplicationCipriano Rey Hipolito, Angelito Silverio, Renan Nuestro. 1-5 [doi]
• 4T Gain-Cell Providing Unlimited Availability through Hidden Refresh with 1W1R FunctionalityEinat Levy, Aharon Sfez, Roman Golman, Odem Harel, Adam Teman. 1-4 [doi]
• Accelerating Convolutional Neural Network Inference Based on a Reconfigurable Sliced Systolic ArrayYixuan Zeng, Heming Sun, Jiro Katto, Yibo Fan. 1-5 [doi]
• Fast FPGA-Based Emulation for ReRAM-Enabled Deep Neural Network AcceleratorYongquan Shi, Yongshuai Sun, Jianfei Jiang, Guanghui He, Qin Wang, Naifeng Jing. 1-5 [doi]
• Sequential Node Attack of Complex Networks Based on Q-Learning MethodWeijun Ma, Junyuan Fang, Jiajing Wu. 1-5 [doi]
• OFDM-Based Beam-Oriented Digital Predistortion for Massive MIMOChance Tarver, Alexios Balatsoukas-Stimming, Christoph Studer, Joseph R. Cavallaro. 1-5 [doi]
• TPDICE and Sim Based 4-Node-Upset Completely Hardened Latch Design for Highly Robust Computing in Harsh RadiationAibin Yan, Liang Ding, Chuanbo Shan, Haoran Cai, Xiaofeng Chen, Zhanjun Wei, Zhengfeng Huang, Xiaoqing Wen. 1-5 [doi]
• Attention-Based Multi-Task Learning for Speech-Enhancement and Speaker-Identification in Multi-Speaker Dialogue ScenarioChiang-Jen Peng, Yun-Ju Chan, Cheng Yu, Syu-Siang Wang, Yu Tsao 0001, Tai-Shih Chi. 1-5 [doi]
• A 5.9μW Ultra-Low-Power Dual-Resolution CIS Chip of Sensing-with-Computing for Always-on Intelligent Visual DevicesZiwei Li, Han Xu, Li Luo, Qi Wei, Fei Qiao. 1-5 [doi]
• A Heterogeneous Spiking Neural Network for Computationally Efficient Face RecognitionXichuan Zhou, Zhenghua Zhou, Zhengqing Zhong, Jianyi Yu, Tengxiao Wang, Min Tian, Ying Jiang, Cong Shi 0003. 1-5 [doi]
• Live Demonstration: An FPGA-Based Emulation of an Event-Based Vision Sensor Using Commercially Available CameraSamalika Lakmali Perera, Ying Xu, André van Schaik, Runchun Wang. 1 [doi]
• Symbolic Simulation Enhanced Coverage-Directed Fuzz Testing of RTL DesignTun Li, Hongji Zou, Dan Luo, WanXia Qu. 1-5 [doi]
• Circuit Techniques for Efficient Acceleration of Deep Neural Network Inference with Analog-AI (Invited)Kohji Hosokawa, Pritish Narayanan, Stefano Ambrogio, Hsinyu Tsai, Charles Mackin, Andrea Fasoli, Alexander Friz, An Chen, Jose Luquin, Katherine Spoon, Geoffrey W. Burr, Scott C. Lewis. 1-5 [doi]
• Lightweight Monitoring Scheme for Flooding DoS Attack Detection in Multi-Tenant MPSoCsCesar G. Chaves, Johanna Sepúlveda, Thomas Hollstein. 1-5 [doi]
• LSTMs for Keyword Spotting with ReRAM-Based Compute-In-Memory ArchitecturesClemens J. S. Schaefer, Mark Horeni, Pooria Taheri, Siddharth Joshi. 1-5 [doi]
• An Anti-Overcharged High-dV/dt-Immunity Capacitive Level Shifter with Dynamic Discharge Control for Half-Bridge GaN DriverYao Qin, Xin-ming, Zhiyi Lin, Yuanyuan Liu, Yongyu Zhang, Zhaoji Li, Bo Zhang. 1-5 [doi]
• Dynamic Switching Sequence to Compensate the Integral Nonlinearity in Current-Steering DACsYang Liu, Yushen Fu, Chengyu Huang, Huazhong Yang, Xueqing Li. 1-5 [doi]
• st-Order Passive Noise-Shaping SAR ADC with Improved NTF Assisted by Comparator Gain CalibrationHanrui Zhang, Nannan Li, Zihao Jiao, Jie Zhang, Xiaofei Wang, Hong Zhang. 1-5 [doi]
• Transform-Based Feature Map Compression for CNN InferenceYubo Shi, Meiqi Wang, Siyi Chen, Jinghe Wei, Zhongfeng Wang. 1-5 [doi]
• Priority-Aware Scheduling under Shared-Resource Contention on Chip Multicore ProcessorsShivam Kundan, Iraklis Anagnostopoulos. 1-5 [doi]
• Energy-Efficient Spin-Orbit Torque MRAM Operations for Neural Network ProcessorLiang Chang, Zixuan Zhu, Zhen Zhu, Siqi Yang, Weihang Li, Jun Zhou. 1-5 [doi]
• MIMO Noise Suppression Preserving Spatial Cues for Sound Source Localization in Mobile RobotJung Hee Kim, Jeong Hwan Choi, Jinyoung Son, Gyeong-Su Kim, Jihwan Park, Joon-Hyuk Chang. 1-5 [doi]
• Live Demonstration: A Cloud-Based Cell-Free Distributed Massive MIMO SystemDongming Wang, Chuan Zhang, Zhenhao Ji, Yongqiang Du, Jianing Zhao, Ming Jiang, Xiaohu You. 1 [doi]
• Hardware-Friendly Coding Unit Decision Scheme for HEVCHuang Ju, Xiaofeng Huang, Guoqing Xiang, Yuan Li 0014, Huizhu Jia, Xiaodong Xie. 1-5 [doi]
• Magnetoresistance Sensor with Analog Frontend for Lab-on-Chip Malaria Parasite DetectionYuchen Li, Siming Zuo, Jacob Thompson, Lisa Ranford-Cartwright, Nosrat Mirzai, Hadi Heidari. 1-5 [doi]
• An Offset Charge Compensating Biphasic Neuro - stimulation for Faradaic DC-Current ReductionDonghyeok Cho, Nahmil Koo, Taekwang Jang, SeongHwan Cho. 1-5 [doi]
• Comprehensive Analysis of EEG Datasets for Epileptic Seizure PredictionRihat Rahman, Shiva Maleki Varnosfaderani, Omar Makke, Nabil J. Sarhan, Eishi Asano, Aimee Luat, Mohammad Alhawari. 1-5 [doi]
• Generating Adversarial Patches Using Data-Driven MultiD-WGANWei Wang 0250, Yimeng Chai, Ziwen Wu, Litong Ge, Xuechun Han, Baohua Zhang, Chuang Wang, Yue Li 0013. 1-5 [doi]
• An Adaptive Metric for Node Substitution-Based BDD MinimizationAmad Ul Hassen, Fahad Ahmed Khan. 1-5 [doi]
• Channel Operating Margin as Transceiver Architecture Design ToolLuisa Fernanda Dovale, Elkim Roa. 1-5 [doi]
• Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells Using Swarm IntelligencePrasenjit Saha, Salman Ahmed, Hema Sai Kalluru, Zia Abbas. 1-5 [doi]
• FreePDK15TFET: An Open-Source Process Design Kit for 15nm CMOS and TFET devicesKaiquan Chen, Ce Ma, Qing Zhang, Yongfu Li, Jian Zhao, Mingyi Chen. 1-5 [doi]
• Analysis of Multi-Phase Trans-Inductor Voltage Regulator with Fast Transient Response for Large Load Current ApplicationsNian Zhang, Chenchang Zhan, Guanghua Ye, Chuqi Chen, Xuening Li, Jun Yi. 1-5 [doi]
• DeepScaleTool: A Tool for the Accurate Estimation of Technology Scaling in the Deep-Submicron EraSatyabrata Sarangi, Bevan Baas. 1-5 [doi]
• A Low-Voltage High-Performance Frequency Divider exploiting Folded MCMLFrancesco Centurelli, Giuseppe Scotti, Alessandro Trifiletti, Gaetano Palumbo. 1-5 [doi]
• Low-Power License Plate Detection and Recognition on a RISC-V Multi-Core MCU-Based Vision SystemLorenzo Lamberti, Manuele Rusci, Marco Fariselli, Francesco Paci, Luca Benini. 1-5 [doi]
• BN-254 Based Multi-Core, Multi-Pairing Crypto-Processor for Functional EncryptionRyohei Nakayama, Makoto Ikeda. 1-5 [doi]
• A Blockchain-Based Crypto-Anchor Platform for Interoperable Product AuthenticationMiguel A. Prada-Delgado, Gero Dittmann, Ilie Circiumaru, Jens Jelitto. 1-5 [doi]
• EMA2S: An End-to-End Multimodal Articulatory-to-Speech SystemYu-Wen Chen, Kuo-Hsuan Hung, Shang-Yi Chuang, Jonathan Sherman, Wen-Chin Huang, Xugang Lu, Yu Tsao 0001. 1-5 [doi]
• High-Efficient Nonbinary LDPC Decoder with Early Layer Decoding ScheduleThang Xuan Pham, Hanho Lee. 1-4 [doi]
• Hardware-Software Co-Design for Efficient and Scalable Real-Time Emulation of SNNs on the EdgeJosep Angel Oltra, Jordi Madrenas, Mireya Zapata, Bernardo Vallejo Mancero, Diana Mata-Hernandez, Shigeo Sato. 1-5 [doi]
• Power-Conversion Efficiency: Loss Dominance, Optimization, & Design InsightGuillaume Guérin, Gabriel A. Rincón-Mora. 1-5 [doi]
• FPCAM: Floating Point Configurable Approximate Multiplier for Error Resilient ApplicationsChandan Kumar Jha 0001, Sumit Walia, Gagan Kanojia, Joycee Mekie. 1-5 [doi]
• Controller Design for High-Order Sliding Mode Dynamics with Upper-Triangular UncertaintiesLu Liu, Wei Xing Zheng 0001, Shihong Ding. 1-5 [doi]
• A PVT-Insensitive Capacitance-to-Digital Converter Using Ring-Based Time-Domain QuantizerRongfeng Xu, Zenan Zeng, Run Chen, Zhenqi Chen, Yonggang Chen, Zhijian Chen, Zhijian Li, Zhaohui Wu 0001, Bin Li. 1-5 [doi]
• Naturalizing Neuromorphic Vision Event Streams Using Generative Adversarial NetworksDennis E. Robey, Wesley Thio, Herbert H. C. Iu, Jason Kamran Eshraghian. 1-5 [doi]
• A Highly Configurable and Extensible Spiral Capacitor Design for High Density or High Precision ApplicationsJiajie Huang, Lulu Wang, Yewangqing Lu, Ting Zhou, Zhiwen Gu, Mingyi Chen, Yongfu Li. 1-5 [doi]
• Blood Glucose Prediction in Type 1 Diabetes Using Deep Learning on the EdgeTaiyu Zhu, Lei Kuang, Kezhi Li, Junming Zeng, Pau Herrero, Pantelis Georgiou. 1-5 [doi]
• Attention-Based Bidirectional LSTM-CNN Model for Remaining Useful Life EstimationJou Won Song, Ye In Park, Jong-Ju Hong, Seonggyun Kim, Suk-Ju Kang. 1-5 [doi]
• A New 1P1R Image Sensor with In-Memory Computing Properties Based on Silicon Nitride DevicesNikolaos Vasileiadis, Vasileios G. Ntinas, Iosif-Angelos Fyrigos, Rafailia-Eleni Karamani, Vassilios Ioannou-Sougleridis, Pascal Normand, Ioannis Karafyllidis, Georgios Ch. Sirakoulis, Panagiotis Dimitrakis. 1-5 [doi]
• Towards Efficient Hardware Implementation of NTT for Kyber on FPGAsCong Zhang, Dongsheng Liu, Xingjie Liu, Xuecheng Zou, Guangda Niu, Bo Liu, Quming Jiang. 1-5 [doi]
• A Uniformly Segmented SC-Flip Decoder for Polar Codes with Memory Reduction MethodsUseok Lee, Jae Hong Roh, Chan Hwangbo, Myung Hoon Sunwoo. 1-5 [doi]
• A High-Performance OTA with Hybrid of Inverter-Based OTA and Nauta OTA for High Speed ApplicationsXiming Fu, Kamal El-Sankary, Yadong Yin. 1-5 [doi]
• SPACEMan: Wireless SoC for Concurrent Potentiometry and AmperometryDaryl Ma, Yiyang Chen, Sara S. Ghoreishizadeh, Pantelis Georgiou. 1-5 [doi]
• Design of an Area-Efficient Differential Distributed Amplifier Based on the Theory of Differential Transmission LinesKeisuke Kawahara, Yohtaro Umeda, Kyoya Takano. 1-5 [doi]
• Extended Cantor Arrays with Hole-Free Fourth-Order Difference Co-ArraysZixiang Yang, Qing Shen, Wei Liu 0001, Yonina C. Eldar, Wei Cui 0001. 1-5 [doi]
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