A 100 MHz 9.14-mW 8-Bit Shift Register Using Double-Edge Triggered Flip-Flop

Uday Kiran Naidu Ekkurthi, Venkatesh Dasari, Jyoshnavi Akiri, Chua-Chin Wang. A 100 MHz 9.14-mW 8-Bit Shift Register Using Double-Edge Triggered Flip-Flop. In IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021. pages 1-4, IEEE, 2021. [doi]

Abstract

Abstract is missing.