Khoirom Johnson Singh, Anand Bulusu, Sudeb Dasgupta. Harnessing Maximum Negative Capacitance Signature Voltage Window in P(VDF-TrFE) Gate Stack. In IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021. pages 1-5, IEEE, 2021. [doi]
Abstract is missing.